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radeon/llvm: Use alloca instructions for larger arrays [revert a revert]
This reverts commit f84e9d749f.
Bioshock Infinite no longer hangs.
This commit is contained in:
Marek Olšák
parent
8636a718b5
commit
c98c732158
2 changed files with 148 additions and 24 deletions
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@ -50,6 +50,11 @@ struct radeon_llvm_loop {
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LLVMBasicBlockRef endloop_block;
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};
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struct radeon_llvm_array {
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struct tgsi_declaration_range range;
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LLVMValueRef alloca;
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};
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struct radeon_llvm_context {
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struct lp_build_tgsi_soa_context soa;
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@ -96,7 +101,7 @@ struct radeon_llvm_context {
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unsigned loop_depth;
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unsigned loop_depth_max;
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struct tgsi_declaration_range *arrays;
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struct radeon_llvm_array *arrays;
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LLVMValueRef main_fn;
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LLVMTypeRef return_type;
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@ -112,11 +112,25 @@ static LLVMValueRef emit_swizzle(struct lp_build_tgsi_context *bld_base,
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static struct tgsi_declaration_range
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get_array_range(struct lp_build_tgsi_context *bld_base,
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unsigned File, const struct tgsi_ind_register *reg)
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unsigned File, unsigned reg_index,
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const struct tgsi_ind_register *reg)
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{
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struct radeon_llvm_context *ctx = radeon_llvm_context(bld_base);
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if (File != TGSI_FILE_TEMPORARY || reg->ArrayID == 0 ||
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if (!reg) {
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unsigned i;
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unsigned num_arrays = bld_base->info->array_max[TGSI_FILE_TEMPORARY];
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for (i = 0; i < num_arrays; i++) {
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const struct tgsi_declaration_range *range =
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&ctx->arrays[i].range;
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if (reg_index >= range->First && reg_index <= range->Last) {
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return ctx->arrays[i].range;
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}
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}
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}
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if (File != TGSI_FILE_TEMPORARY || !reg || reg->ArrayID == 0 ||
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reg->ArrayID > bld_base->info->array_max[TGSI_FILE_TEMPORARY]) {
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struct tgsi_declaration_range range;
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range.First = 0;
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@ -124,7 +138,30 @@ get_array_range(struct lp_build_tgsi_context *bld_base,
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return range;
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}
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return ctx->arrays[reg->ArrayID - 1];
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return ctx->arrays[reg->ArrayID - 1].range;
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}
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static LLVMValueRef get_alloca_for_array(struct lp_build_tgsi_context *bld_base,
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unsigned file,
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unsigned index)
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{
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unsigned i;
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unsigned num_arrays;
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struct radeon_llvm_context *ctx = radeon_llvm_context(bld_base);
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if (file != TGSI_FILE_TEMPORARY)
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return NULL;
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num_arrays = bld_base->info->array_max[TGSI_FILE_TEMPORARY];
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for (i = 0; i < num_arrays; i++) {
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const struct tgsi_declaration_range *range =
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&ctx->arrays[i].range;
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if (index >= range->First && index <= range->Last) {
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return ctx->arrays[i].alloca;
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}
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}
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return NULL;
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}
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static LLVMValueRef
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@ -134,6 +171,9 @@ emit_array_index(struct lp_build_tgsi_soa_context *bld,
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{
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struct gallivm_state *gallivm = bld->bld_base.base.gallivm;
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if (!reg) {
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return lp_build_const_int32(gallivm, offset);
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}
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LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, bld->addr[reg->Index][reg->Swizzle], "");
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return LLVMBuildAdd(gallivm->builder, addr, lp_build_const_int32(gallivm, offset), "");
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}
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@ -181,7 +221,7 @@ emit_array_fetch(struct lp_build_tgsi_context *bld_base,
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tmp_reg.Register.Index = i + range.First;
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LLVMValueRef temp = radeon_llvm_emit_fetch(bld_base, &tmp_reg, type, swizzle);
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result = LLVMBuildInsertElement(builder, result, temp,
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lp_build_const_int32(gallivm, i), "");
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lp_build_const_int32(gallivm, i), "array_vector");
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}
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return result;
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}
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@ -195,13 +235,35 @@ load_value_from_array(struct lp_build_tgsi_context *bld_base,
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const struct tgsi_ind_register *reg_indirect)
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{
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struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base);
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LLVMBuilderRef builder = bld_base->base.gallivm->builder;
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struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_indirect);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_index, reg_indirect);
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LLVMValueRef index = emit_array_index(bld, reg_indirect, reg_index - range.First);
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LLVMValueRef array = get_alloca_for_array(bld_base, file, reg_index);
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LLVMValueRef ptr, val, indices[2];
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return LLVMBuildExtractElement(builder,
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emit_array_fetch(bld_base, file, type, range, swizzle),
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emit_array_index(bld, reg_indirect, reg_index - range.First), "");
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if (!array) {
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/* Handle the case where the array is stored as a vector. */
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return LLVMBuildExtractElement(builder,
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emit_array_fetch(bld_base, file, type, range, swizzle),
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index, "");
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}
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index = LLVMBuildMul(builder, index, lp_build_const_int32(gallivm, TGSI_NUM_CHANNELS), "");
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index = LLVMBuildAdd(builder, index, lp_build_const_int32(gallivm, swizzle), "");
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indices[0] = bld_base->uint_bld.zero;
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indices[1] = index;
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ptr = LLVMBuildGEP(builder, array, indices, 2, "");
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val = LLVMBuildLoad(builder, ptr, "");
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if (tgsi_type_is_64bit(type)) {
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LLVMValueRef ptr_hi, val_hi;
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indices[0] = lp_build_const_int32(gallivm, 1);
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ptr_hi = LLVMBuildGEP(builder, ptr, indices, 1, "");
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val_hi = LLVMBuildLoad(builder, ptr_hi, "");
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val = radeon_llvm_emit_fetch_64bit(bld_base, type, val, val_hi);
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}
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return val;
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}
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static LLVMValueRef
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@ -213,13 +275,26 @@ store_value_to_array(struct lp_build_tgsi_context *bld_base,
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const struct tgsi_ind_register *reg_indirect)
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{
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struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base);
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LLVMBuilderRef builder = bld_base->base.gallivm->builder;
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struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_indirect);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_index, reg_indirect);
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LLVMValueRef index = emit_array_index(bld, reg_indirect, reg_index - range.First);
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LLVMValueRef array = get_alloca_for_array(bld_base, file, reg_index);
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return LLVMBuildInsertElement(builder,
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if (array) {
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LLVMValueRef indices[2];
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index = LLVMBuildMul(builder, index, lp_build_const_int32(gallivm, TGSI_NUM_CHANNELS), "");
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index = LLVMBuildAdd(builder, index, lp_build_const_int32(gallivm, chan_index), "");
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indices[0] = bld_base->uint_bld.zero;
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indices[1] = index;
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LLVMValueRef pointer = LLVMBuildGEP(builder, array, indices, 2, "");
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LLVMBuildStore(builder, value, pointer);
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return NULL;
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} else {
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return LLVMBuildInsertElement(builder,
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emit_array_fetch(bld_base, file, TGSI_TYPE_FLOAT, range, chan_index),
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value, emit_array_index(bld, reg_indirect, reg_index - range.First), "");
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return NULL;
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value, index, "");
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}
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}
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LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
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@ -243,8 +318,9 @@ LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
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}
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if (reg->Register.Indirect) {
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return load_value_from_array(bld_base, reg->Register.File, type,
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LLVMValueRef load = load_value_from_array(bld_base, reg->Register.File, type,
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swizzle, reg->Register.Index, ®->Indirect);
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return bitcast(bld_base, type, load);
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}
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switch(reg->Register.File) {
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@ -283,6 +359,11 @@ LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
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LLVMBuildLoad(builder, ptr, ""),
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LLVMBuildLoad(builder, ptr2, ""));
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}
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LLVMValueRef array = get_alloca_for_array(bld_base, reg->Register.File, reg->Register.Index);
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if (array) {
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return bitcast(bld_base, type, load_value_from_array(bld_base, reg->Register.File, type,
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swizzle, reg->Register.Index, NULL));
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}
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result = LLVMBuildLoad(builder, ptr, "");
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break;
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@ -333,6 +414,7 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
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const struct tgsi_full_declaration *decl)
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{
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struct radeon_llvm_context *ctx = radeon_llvm_context(bld_base);
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LLVMBuilderRef builder = bld_base->base.gallivm->builder;
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unsigned first, last, i, idx;
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switch(decl->Declaration.File) {
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case TGSI_FILE_ADDRESS:
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@ -350,13 +432,36 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
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}
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case TGSI_FILE_TEMPORARY:
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{
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unsigned decl_size;
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first = decl->Range.First;
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last = decl->Range.Last;
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decl_size = 4 * ((last - first) + 1);
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if (decl->Declaration.Array) {
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unsigned id = decl->Array.ArrayID - 1;
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if (!ctx->arrays) {
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int size = bld_base->info->array_max[TGSI_FILE_TEMPORARY];
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ctx->arrays = MALLOC(sizeof(ctx->arrays[0]) * size);
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ctx->arrays = CALLOC(size, sizeof(ctx->arrays[0]));
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for (i = 0; i < size; ++i) {
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assert(!ctx->arrays[i].alloca);}
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}
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ctx->arrays[decl->Array.ArrayID - 1] = decl->Range;
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ctx->arrays[id].range = decl->Range;
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/* If the array is more than 16 elements (each element
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* is 32-bits), then store it in a vector. Storing the
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* array in a vector will causes the compiler to store
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* the array in registers and access it using indirect
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* addressing. 16 is number of vector elements that
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* LLVM will store in a register.
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* FIXME: We shouldn't need to do this. LLVM should be
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* smart enough to promote allocas int registers when
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* profitable.
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*/
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if (decl_size > 16) {
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ctx->arrays[id].alloca = LLVMBuildAlloca(builder,
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LLVMArrayType(bld_base->base.vec_type, decl_size),"array");
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}
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}
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first = decl->Range.First;
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last = decl->Range.Last;
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@ -373,7 +478,7 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
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}
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}
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break;
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}
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case TGSI_FILE_INPUT:
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{
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unsigned idx;
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@ -482,11 +587,16 @@ void radeon_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
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if (reg->Register.Indirect) {
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struct tgsi_declaration_range range = get_array_range(bld_base,
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reg->Register.File, ®->Indirect);
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reg->Register.File, reg->Register.Index, ®->Indirect);
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unsigned i, size = range.Last - range.First + 1;
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LLVMValueRef array = store_value_to_array(bld_base, value, reg->Register.File, chan_index,
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reg->Register.Index, ®->Indirect);
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unsigned file = reg->Register.File;
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unsigned reg_index = reg->Register.Index;
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LLVMValueRef array = store_value_to_array(bld_base, value, file, chan_index,
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reg_index, ®->Indirect);
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if (get_alloca_for_array(bld_base, file, reg_index)) {
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continue;
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}
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for (i = 0; i < size; ++i) {
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switch(reg->Register.File) {
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case TGSI_FILE_OUTPUT:
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@ -500,7 +610,7 @@ void radeon_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
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break;
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default:
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return;
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continue;
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}
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value = LLVMBuildExtractElement(builder, array,
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lp_build_const_int32(gallivm, i), "");
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@ -516,14 +626,23 @@ void radeon_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
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break;
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case TGSI_FILE_TEMPORARY:
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{
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LLVMValueRef array;
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if (reg->Register.Index >= ctx->temps_count)
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continue;
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array = get_alloca_for_array(bld_base, reg->Register.File, reg->Register.Index);
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if (array) {
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store_value_to_array(bld_base, value, reg->Register.File, chan_index, reg->Register.Index,
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NULL);
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continue;
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}
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temp_ptr = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index];
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if (tgsi_type_is_64bit(dtype))
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temp_ptr2 = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index + 1];
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break;
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}
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default:
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return;
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}
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