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freedreno: drop needs_rb_fbd

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We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this
in fd_context is wrong when the gmem code executes asynchronously from
the flush_queue worker.  But in fact we don't really need to track it at
all.  We cannot assume previous value at the beginning of the batch
(because of other processes potentially using the GPU), so just drop the
tracking and emit it in _tile_init().

Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark 2016-07-19 13:22:01 -04:00
parent e6bfe1c773
commit 9f0eb69527
6 changed files with 12 additions and 31 deletions
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2
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
View file

@ -896,8 +896,6 @@ fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
fd_wfi(batch, ring);
fd_hw_query_enable(batch, ring);
ctx->needs_rb_fbd = true;
}
static void

15
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
View file

@ -924,6 +924,7 @@ static void
fd3_emit_tile_init(struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->gmem;
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
uint32_t rb_render_control;
@ -938,6 +939,11 @@ fd3_emit_tile_init(struct fd_batch *batch)
update_vsc_pipe(batch);
fd_wfi(batch, ring);
OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
if (use_hw_binning(batch)) {
/* emit hw binning pass: */
emit_binning_pass(batch);
@ -957,18 +963,9 @@ fd3_emit_tile_init(struct fd_batch *batch)
static void
fd3_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
{
struct fd_context *ctx = batch->ctx;
struct fd_ringbuffer *ring = batch->gmem;
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
if (ctx->needs_rb_fbd) {
fd_wfi(batch, ring);
OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
ctx->needs_rb_fbd = false;
}
OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1);
OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE |

2
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
View file

@ -887,8 +887,6 @@ fd4_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
OUT_RING(ring, 0x0);
fd_hw_query_enable(batch, ring);
ctx->needs_rb_fbd = true;
}
static void

14
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
View file

@ -664,6 +664,7 @@ static void
fd4_emit_tile_init(struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->gmem;
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
fd4_emit_restore(batch, ring);
@ -674,6 +675,11 @@ fd4_emit_tile_init(struct fd_batch *batch)
update_vsc_pipe(batch);
fd_wfi(batch, ring);
OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
if (use_hw_binning(batch)) {
OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
@ -744,14 +750,6 @@ fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
} else {
OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE));
}
if (ctx->needs_rb_fbd) {
fd_wfi(batch, ring);
OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
ctx->needs_rb_fbd = false;
}
}
/* before IB to rendering cmds: */

6
src/gallium/drivers/freedreno/freedreno_context.h
View file

@ -176,12 +176,6 @@ struct fd_context {
*/
bool in_blit : 1;
/* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION? At least on a3xx
* it is not a banked context register, so it needs a WFI to update.
* Keep track if it has actually changed, to avoid unneeded WFI.
* */
bool needs_rb_fbd : 1;
struct pipe_scissor_state scissor;
/* we don't have a disable/enable bit for scissor, so instead we keep

4
src/gallium/drivers/freedreno/freedreno_state.c
View file

@ -150,10 +150,6 @@ fd_set_framebuffer_state(struct pipe_context *pctx,
cso = &ctx->batch->framebuffer;
if ((cso->width != framebuffer->width) ||
(cso->height != framebuffer->height))
ctx->needs_rb_fbd = true;
util_copy_framebuffer_state(cso, framebuffer);
ctx->dirty |= FD_DIRTY_FRAMEBUFFER;