Commit graph

32694 commits

Author SHA1 Message Date
Ilia Mirkin
f317f72f73 r600g: use SIMPLE_FLOAT for blending to enable some optimizations
Radeonsi also sets this flag. Seems to avoid pulling up the desintation
RT value when the dst blend factor is zero if it's not otherwise being
loaded. Among other things, it allows blending to overwrite infinity/NaN
values in the destination RT.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-08 22:35:27 -05:00
Ilia Mirkin
35433494f3 nv50: make blending work so that zero wins in a multiplication
This matches nvc0 behavior, tested with the fbo-float-nan piglit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann<tobias.johannes.klausmann@mni.thm.de>
2017-11-08 22:32:43 -05:00
Timothy Arceri
87f02ddfd1 amdgpu: use simple mtx
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-09 12:07:48 +11:00
Timothy Arceri
f0857fe87b mesa: use simple mtx in core mesa
Results from x11perf -copywinwin10 on Eric's SKL:
   4.33338% ± 0.905054% (n=40)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Yogesh Marathe <yogesh.marathe@intel.com>
2017-11-09 12:07:48 +11:00
Andreas Boll
6e4d65f674 broadcom/vc5: Add vc5_drm.h to the release tarball
Fixes: 45bb8f2957 ("broadcom: Add V3D 3.3 gallium driver called "vc5",
       for BCM7268.")

Cc: 17.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-11-08 18:30:45 +00:00
Gert Wollny
6905d005ef clover: use the unified check for c++11 instead of the gcc version number
So far clover based its test for compiler support on the version of gcc,
while in reality support for c++11 is required. This patch replaces the
version check by the check unified for all modules that require c++11.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-11-08 16:03:38 +00:00
Gert Wollny
8f18528cea swr: Replace the check for c++11 by the unified version
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-11-08 16:03:38 +00:00
Emil Velikov
0cd0958544 targets/opencl: don't hardcode the icd file install to /etc/...
Use $(sysconfdir) instead of hardcoding /etc.

While the OpenCL spec expects the file in /etc, people building their
stack can override that, esp. !Linux users.

Furthermore this removes a fundamental violation, which results in the
system file being overwritten even as one explicitly sets --prefix
and/or DESTDIR.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-By: Aaron Watry <awatry@gmail.com>
2017-11-08 14:10:07 +00:00
Tobias Droste
5d61fa4e68 gallivm: Use new LLVM fast-math-flags API
LLVM 6 changed the API on the fast-math-flags:
https://reviews.llvm.org/rL317488

NOTE: This also enables the new flag 'ApproxFunc' to allow for
approximations for library functions (sin, cos, ...). I'm not completly
convinced, that this is something mesa should do.

Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2017-11-08 10:44:19 +01:00
Marek Olšák
7f33e94e43 amd/addrlib: update to latest version
This uses C++11 initializer lists.

I just overwrote all Mesa files with internal addrlib and discarded
hunks that we should probably keep, but I might have missed something.

The code depending on ADDR_AM_BUILD is removed. We can add it back next
time if needed.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-08 00:55:13 +01:00
Eric Anholt
3bfcd31e98 braodcom/vc5: Flush the job when it grows over 1GB.
Fixes GL_OUT_OF_MEMORY from streaming-texture-leak (and will hopefully
keep piglit from ooming on my no-swap platform, as well).
2017-11-07 12:58:03 -08:00
Eric Anholt
80da60947b broadcom/vc5: Fix pausing of transform feedback.
Gallium disables it by removing the streamout buffers, not by binding a
program that doesn't have TF outputs.  Fixes piglit
"ext_transform_feedback2/counting with pause"
2017-11-07 12:58:00 -08:00
Eric Anholt
25d199f67d broadcom/vc5: Add support for GL_RASTERIZER_DISCARD
Fixes piglit discard-drawarrays.
2017-11-07 12:57:49 -08:00
Eric Anholt
9ccb6621be broadcom/vc5: Add partial transform feedback query support.
We have to compute the queries in software, so we're counting the
primitives by hand.  We still need to make sure to not increment the
PRIMITIVES_EMITTED if we overflowed, but leave that for later.
2017-11-07 12:57:43 -08:00
Eric Anholt
4f33344e7a broadcom/vc5: Add occlusion query support.
Fixes all of piglit's OQ tests.
2017-11-07 12:56:40 -08:00
Eric Anholt
bd24f4890f broadcom/vc5: Skip emitting textures that aren't used.
Fixes crashes when ARB_fp uses texture[1] but not 0, as in piglit's
fp-fragment-position.
2017-11-07 09:40:25 -08:00
Eric Anholt
3d5e62dcfa broadcom/vc5: Add missing SRGBA8 ETC2 support.
Fixes piglit oes_compressed_etc2_texture-miptree srgb8-alpha8.
2017-11-07 09:40:25 -08:00
Eric Anholt
6079f7c3c3 broadcom/vc5: Disable early Z test when the FS writes Z.
Fixes piglit early-z.
2017-11-07 09:40:25 -08:00
Eric Anholt
eeb9e80272 broadcom/vc5: Shift the min/max lod fields by the BASE_LEVEL.
The lod clamping is what limits you between base and last level, and the
base level field is just there to help decide where the min/mag change
happens.

Fixes tex-miplevel-selection GL2:texture()
2017-11-07 09:40:25 -08:00
Eric Anholt
521e1d0275 broadcom/vc5: Add support for anisotropic filtering. 2017-11-07 09:40:25 -08:00
Eric Anholt
a266f78741 broadcom/vc5: Fix mipmap filtering enums.
The ordering of the values was even less obvious than I thought, with both
the mip filter and the min filter being in different bits depending on
whether the mip filter is none.

Fixes piglit fs-textureLod-miplevels.shader_test
2017-11-07 09:40:25 -08:00
Eric Anholt
73ec70bf13 broadcom/vc5: Fix height padding of small UIF slices.
The HW doesn't pad the slice's height to make a full 4x4 group of UIF
blocks.  We just need to pad to columns, and the start of the next column
appears in the bottom of the previous column's last block.

Fixes piglit fs-textureOffset-2D.
2017-11-07 09:40:24 -08:00
Eric Anholt
e23c6991be broadcom/vc5: Print the actual offsets in HW for our resource layout debug.
The alignment of level 0 is non-obvious, so it's hard to turn a faulting
address into a slice without this.
2017-11-07 09:40:24 -08:00
Eric Anholt
426c352336 broadcom/vc5: Set the available VS outputs to match the FS inputs.
Fixes piglit glsl-es-3.00/minimum-maximums.txt.
2017-11-07 09:40:24 -08:00
Eric Anholt
f1797928fd broadcom/vc5: Set the max texture LOD bias.
The field is signed 8.8, so the usual 16.0f fits.  Fixes piglit
gl-2.1-minmax.
2017-11-07 09:40:24 -08:00
Eric Anholt
47bd9dac19 broadcom/vc5: Fix translation of stencil ops.
They aren't quite in the same order as the gallium defines.  Fixes piglit
gl-2.0-two-sided-stencil.
2017-11-07 09:40:24 -08:00
Eric Anholt
3be820477f broadcom/vc5: Move stencil state packing to the CSO.
Only the stencil ref comes in as dynamic state at emit time.
2017-11-07 09:19:48 -08:00
Eric Anholt
3da39f2297 broadcom/vc5: Introduce a helper for pre-packing our V3DXX structs.
This is so much more pleasant to write than the manual
V3D33_whatever_pack() calls, and will be useful for when we start doing
actual per-V3D compiles.
2017-11-07 09:19:48 -08:00
Eric Anholt
078b163a9c broadcom/vc5: Add a cl_emit() variant for merging with a pre-packed struct.
Cleans up the hand-written code, at the cost of another ugly macro.
2017-11-07 09:19:48 -08:00
Eric Anholt
735b844b1b broadcom/vc5: Skip emitting depth offset while disabled.
The enable flag is also in the rasterizer state, so it will be emitted
once it's needed.
2017-11-07 09:19:48 -08:00
Eric Anholt
386e9362a5 broadcom/vc5: Don't emit stencil config if not doing stencil test.
As with blending, we'll have the bit flagged again when it gets reenabled
in CONFIGURATION_BITS, so there's no need to emit test state if we're not
testing.
2017-11-07 09:19:48 -08:00
Eric Anholt
f90ee6eb2b broadcom/vc5: Don't emit updated blend factors/funcs while disabled.
The dirty bit will be flagged again when re-enbaled.  Keeps us from
emitting blend state in CLs that never do blending.
2017-11-07 09:19:48 -08:00
Eric Anholt
949ac638bc broadcom/vc5: Make sure the TMU indirect struct is appropriately aligned.
I was hoping that this would help with fbo-generatemipmap hangs, but no
luck.
2017-11-07 09:19:48 -08:00
Eric Anholt
47dac5d2bc broadcom/vc5: Use DEPTH24_STENCIL8 for rendering to depth-only textures.
The HW puts the pad bits at the top for DEPTH_COMPONENT24, but we need it
at the bottom for texturing.  Using the format with stencil probably means
we won't be able to do Z24 and separate S8, but I wasn't planning on
supporting that anyway.

Fixes hiz-depth-read-fbo-d24-s0
2017-11-07 09:19:48 -08:00
Marek Olšák
33000e7c43 radeonsi: add si_screen::has_ls_vgpr_init_bug
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:40 +01:00
Marek Olšák
cde664ab81 radeonsi: use ac_create_target_machine
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:38 +01:00
Marek Olšák
81f81fdb54 radeonsi: use ac_get_llvm_processor_name
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:36 +01:00
Marek Olšák
c29f5fe41c radeonsi/gfx9: don't set gs_table_depth
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:33 +01:00
Marek Olšák
e616743dab radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:26:36 +01:00
Marek Olšák
24e9004708 radeonsi: remove unused field in the PCI ID table
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-07 17:26:36 +01:00
Michel Dänzer
cd3b55ad07 gallium: Guard assertions by NDEBUG instead of DEBUG
This matches the standard assert.h header.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-07 16:47:15 +01:00
Eric Engestrom
5be1b1a8ce meson: standardize .so version to major.minor.patch
This `version` field defines the filename for the .so.
The plan .so as well as .so.$major are always symlinks to this.

Unless I'm mistaken, only the major is ever used, so this shouldn't
matter, but for consistency with autotools (and in case it does matter),
let's always have all 3 major.minor.patch components.

(The soname isn't affected, and is always .so.$major)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-07 10:47:20 +00:00
Adam Jackson
791d06b23b drisw: Enable flush control for llvmpipe and softpipe
Hilariously this is a fairly big win.  Neil's multi-context-test
improves from ~24 to ~36 fps with llvmpipe on a Core i5-3317U.  softpipe
also improves, from about 2.25 to 3.09 fps (when it's that slow, you're
allowed to be that precise).

I'd have added it to swrast classic, but the testcase wants GL 3.0 and
shaders, and that's not a thing classic has, so I figured making it work
on softpipe was crime enough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Adam Jackson
5cc06bec19 gallium: Wire up flush control
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Neil Roberts
6d87500fe1 dri: Change __DriverApiRec::CreateContext to take a struct for attribs
Previously the CreateContext method of __DriverApiRec took a set of
arguments to describe the attribute values from the window system API's
CreateContextAttribs function. As more attributes get added this could
quickly get unworkable and every new attribute needs a modification for
every driver.

To fix that, pass the attribute values in a struct instead.  The struct
has a bitmask to specify which members are used. The first three members
(two for the GL version and one for the flags) are always set. If the
bit is not set in the attribute mask then it can be assumed the
attribute has the default value. Drivers will error if unknown bits in
the mask are set.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:02 -05:00
Wladimir J. van der Laan
96463614a3 etnaviv: Don't over-pad compressed textures
HALIGN_FOUR/SIXTEEN has no meaning for compressed textures, and we can't
render to them anyway. So use the tightest possible packing. This
avoids bugs with non-power-of-two block sizes.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:31:20 +01:00
Wladimir J. van der Laan
93ba3f29bb etnaviv: ASTC texture support
Add ASTC texture support for hardware that supports this
(currently only GC3000 on i.MX6qp is known to have this).

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:30:54 +01:00
Wladimir J. van der Laan
f1e1c60ff6 etnaviv: Update from rnndb
Updated as of etnav_viv commit 3b4a8ec.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:29:19 +01:00
Marek Olšák
71f5fe36b7 gallium/u_vbuf: use signed vertex buffers offsets for optimal uploads
Uploaded data must start at (stride * start), because we can't modify
start in all cases. If it's the first allocation, it's also the amount
of memory wasted. If the starting offset is larger than the size of
the upload buffer, the buffer is re-created, used for 1 upload, and then
thrown away. If the upload is small, most of the buffer space is unused
and wasted. Keep doing that and the OOM killer comes. It's actually
pretty quick.

With signed VB offsets, we can set min_out_offset = 0
in u_upload_alloc/u_upload_data.

This fixes OOM situations with SPECviewperf.
2017-11-06 19:09:12 +01:00
Marek Olšák
3f58988b81 radeonsi: enable signed vertex buffer offsets 2017-11-06 19:09:12 +01:00