Commit graph

111021 commits

Author SHA1 Message Date
Lionel Landwerlin
d06ccdf9dd spirv: don't discard access set by vtn_pointer_dereference
We can have a access flag already set here so just augment the
existing ones.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0fb61dfdeb ("spirv: propagate access qualifiers through ssa & pointer")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 7deb5ec0e8)
2019-07-31 07:58:43 +00:00
Andres Rodriguez
ad72ce1ad7 radv: fix queries with WAIT_BIT returning VK_NOT_READY
When vkGetQueryPoolResults() is called with VK_QUERY_RESULT_WAIT_BIT
set, the driver is supposed to wait for the query to become available
before returning.

Currently, radv returns once the query is indeed ready, but it returns
VK_NOT_READY. It also fails to populate the results.

The problem is a missing volatile in the secondary check for query
availability. This patch removes the secondary check altogether since it
is redundant with the preceding loop.

This bug was found with an unreleased version of SteamVR.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 2b71b4e793)
2019-07-31 07:52:52 +00:00
Andrii Simiklit
23eebaf2ec meson: add a warning for meson < 0.46.0
This could help somebody to be noticed about meson issue:
https://github.com/mesonbuild/meson/pull/3274
as result NDEBUG won't be defined even if b_ndebug is true
and buildtype is release.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109791
Cc: mesa-stable@lists.freedesktop.org
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
2019-07-30 11:44:55 +03:00
Eric Anholt
3ec136d583 freedreno: Fix data races with allocating/freeing struct ir3.
There is a single ir3_compiler in the screen, and each context may be
compiling ir3 shaders, which call ir3_create.  ralloc doesn't do any
locking on its own, so eventually you can end up racing to break
ralloc's linked lists.

We really don't want struct ir3 to live as long as the compiler (maybe
struct ir3_shader's lifetime, if anything), so you'd better be freeing
it anyway.

Fixes: 8fe2076243 ("freedreno/ir3: convert over to ralloc")
Reviewed-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 6e3b220ad3)
2019-07-30 08:33:26 +00:00
Bas Nieuwenhuizen
8fbadb152c radv: Take variable descriptor counts into account for buffer entries.
Fixes: b5e04e9217 "radv: Support allocating variable size descriptor sets."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111019
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit aac492901a)
2019-07-30 08:32:07 +00:00
Jason Ekstrand
b1df082b00 anv: Don't claim support for 24 and 48-bit formats on IVB
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 99d04a5bd6)
2019-07-30 08:31:00 +00:00
Jason Ekstrand
66ee5bd082 isl/formats: R8G8B8_UNORM_SRGB isn't supported on HSW
On Haswell, the format works but it doesn't properly do an sRGB decode.
It appears to act identically to R8G8B8_UNORM.  Only Vulkan uses this
format so this only affects Vulkan on HSW.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 7c1b39cf18)
2019-07-30 08:29:37 +00:00
Rhys Perry
7364cb04c5 ac/nir: fix txf_ms with an offset
Seems to fix some hair artifacts in Max Payne 3:
https://github.com/daniel-schuermann/mesa/issues/76

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: f4e499ec79 ('radv: add initial non-conformant radv vulkan driver')
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit a9f58af454)
2019-07-30 08:27:47 +00:00
Lionel Landwerlin
83d17d5730 spirv: propagate access qualifiers through ssa & pointer
Not only variables can be flagged as NonUniformEXT but also
expressions. We're currently ignoring it in an expression such as :

   imageLoad(data[nonuniformEXT(rIndex)], 0)

The associated SPIRV :

   OpDecorate %69 NonUniformEXT
   ...
   %69 = OpLoad %61 %68

This changes propagates access qualifiers through ssa & pointers so
that when it hits a OpLoad/OpStore style instructions, qualifiers are
not forgotten.

Fixes failure the following tests :

   dEQP-VK.descriptor_indexing.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8ed583fe52 ("spirv: Handle the NonUniformEXT decoration")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 0fb61dfdeb)
2019-07-30 08:25:46 +00:00
Lionel Landwerlin
0801a8b906 spirv: wrap push ssa/pointer values
This refactor allows for common code to apply decoration on all
ssa/pointer values. In particular this will allow to propagage access
qualifiers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 86b53770e1)
[Lionel Landwerlin: patch adapted for 19.1 branch]
2019-07-30 08:23:19 +00:00
Connor Abbott
e1fdca7492 nir: Allow qualifiers on copy_deref and image instructions
In the next commit, we'll properly handle access qualifiers on struct
members by propagating them to load/store instructions, but these
instructions had no way to specify the qualifier.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 6f20643b47)
2019-07-30 08:18:49 +00:00
Caio Marcelo de Oliveira Filho
57fc7a23e1 anv: Remove special allocation for anv_push_constants
The key reason for that mechanism is gone: all the extra optional data
that could be in the anv_push_constants was moved elsewhere.  At this
point, just put anv_push_constants directly in anv_cmd_state (part of
anv_cmd_buffer).

v2: Remove a NULL check we don't need anymore in
    anv_cmd_buffer_push_constants().  (Lionel)
    Fix size we consider for valid push params.  (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit f7d53fffa2)
2019-07-30 08:18:49 +00:00
Ilia Mirkin
630a2e4d97 nv50/ir: handle insn not being there for definition of CVT arg
This can happen if it's e.g. a uniform or a function argument.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111217
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 3e468ff2fe)
2019-07-29 11:08:14 +00:00
Ilia Mirkin
5f640b4692 nvc0: allow a non-user buffer to be bound at position 0
Previously the code only handled it for positions 1 and up (as would be
for UBO's in GL). It's not a lot of trouble to handle this, and vl or
vdpau want this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9f8ed5aa67)
2019-07-29 11:01:18 +00:00
Ilia Mirkin
645462fe85 nv50,nvc0: update sampler/view bind functions to accept NULL array
Apparently vl (or vdpau) wants to pass that in now. Handle it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c52b057e00)
2019-07-29 10:56:22 +00:00
Ilia Mirkin
e671e68238 gallium/vl: fix compute tgsi shaders to not process undefined components
This caused nouveau's function handling logic to think that the MAIN
function was due to receive external parameters, and cascaded some
failures after that. Instead avoid having the undefined components in
the first place.

Fixes: f6ac0b5d71 (gallium/auxiliary/vl: Add compute shader to support video compositor render)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111217
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit face27fdc5)
2019-07-29 10:53:54 +00:00
Boyuan Zhang
b521c3c0c8 radeon/vcn: enable rate control for hevc encoding
Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
off when rate control is disabled (e.g. constant qp).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-stable@lists.freedesktop.org

V2: fix typo and add bugzilla info

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit b0626c1f30)
2019-07-29 10:51:48 +00:00
Boyuan Zhang
5c7cffe1d4 radeon/uvd: enable rate control for hevc encoding
Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
off when rate control is disabled (e.g. constant qp).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-stable@lists.freedesktop.org

V2: fix typo and add bugzilla info

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit 5115c25bb8)
2019-07-29 10:50:33 +00:00
Boyuan Zhang
e2568bc6e4 radeon/vcn: fix poc for hevc encode
MaxPicOrderCntLsb should be at least 16 according to the spec,
therefore add minimum value check.

Also use poc value passed from st instead of calculation
in slice header encoding.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-stable@lists.freedesktop.org

V2: Fix typo

V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb
should be power of 2 according to spec.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit 9aaf3aaf5d)
2019-07-29 10:47:57 +00:00
Boyuan Zhang
7470b25b2b radeon/uvd: fix poc for hevc encode
MaxPicOrderCntLsb should be at least 16 according to the spec,
therefore add minimum value check.

Also use poc value passed from st instead of calculation
in slice header encoding.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-stable@lists.freedesktop.org

V2: Fix typo

V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb
should be power of 2 according to spec.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit 77cf700fa3)
2019-07-29 10:46:12 +00:00
Lionel Landwerlin
c45c624dce nir: add access to image_deref intrinsics
SPIRV added the ability to access variables and have expressions non
dynamically uniform and because spirv_to_nir generates deref
instructions, we'll need to have that access there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 8c330728f3)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/compiler/nir/nir.c
2019-07-29 10:23:45 +02:00
Mark Menzynski
2098b48fa0 nvc0/ir: Fix assert accessing null pointer
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111167

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann<tobias.klausmann@freenet.de>
(cherry picked from commit 7493fbf032)
2019-07-26 15:10:50 +00:00
Jason Ekstrand
eb24e60cdc anv: Disable transform feedback on gen7
It's totally implementable, it's just that the plumbing is a bit
different and we never hooked it up.  Don't advertise a broken feature.

Fixes: 36ee2fd61c "anv: Implement the basic form of VK_EXT_transform_feedback"
(cherry picked from commit 295e5a17da)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_extensions.py
2019-07-26 09:35:42 +02:00
Bas Nieuwenhuizen
204a36f270 radv: Set correct metadata size for GFX9+.
Without correct size, radeonsi assumes the metadata is incorrect,
which can and will cause issues.

Since the metadata is really incorrect without the size, let us
fix that.

Fixes: e43cc3e3af "radv/gfx9: handle GFX9 opaque metadata"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 7e1fe81f56)
2019-07-26 07:32:34 +00:00
Arcady Goldmints-Orlov
2329b87ff4 anv: report HOST_ALLOCATION as supported for images
Report VK_EXTERNAL_MEMORY_HANDLE_TYPE_HOST_ALLOCATION_BIT_EXT as
supported for images. It was being shown supported for buffers, but not
images.

Fixes: 69cc6272fb ("anv: Implement VK_EXT_external_memory_host")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 832cedfdee)
2019-07-26 07:29:18 +00:00
Daniel Schürmann
742f348d32 spirv: Fix order of barriers in SpvOpControlBarrier
Semantically, the memory barrier has to come first to wait
for the completion of pending memory requests.
Afterwards, the workgroups can be synchronized.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit e352b4d650)
2019-07-25 09:41:06 +00:00
Nicolas Dufresne
327a6b3a64 egl: Also query modifiers when exporting DMABuf
This fixes eglExportDMABUFImageQueryMESA() so it will report the
modififers of the underlying image. Without this information,
re-importing will likely be broken as it is rare these days that no
modifiers are used.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Fixes: 8f7338f284 ("egl: add initial EGL_MESA_image_dma_buf_export v2.4")
(cherry picked from commit 08f1cefecd)
2019-07-25 09:02:00 +00:00
Yevhenii Kolesnikov
4bb56fdd46 main: Fix memleaks in mesa_use_program
Add freeing of SubroutineIndexes to the _mesa_free_shader_state.

Fixes: 4566aaaa5b ("mesa/subroutines: start adding per-context
subroutine index support (v1.1)")
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 882fe09a74)
2019-07-25 08:34:56 +00:00
Andrii Simiklit
61117d653e intel/compiler: don't use a keyword struct for a class fs_reg
warning: struct 'fs_reg' was previously declared as a class
Fixes: e64be391 ("intel/compiler: generalize the combine constants pass")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit fa2fc68de1)
2019-07-25 08:14:29 +00:00
Eric Engestrom
97cfb89b73 gallium+mesa: fix tgsi_semantic array type
Fixes: ed23335a31 ("gallium: use enums in p_shader_tokens.h (v2)")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e7e31b18d6)
2019-07-24 10:38:00 +00:00
Eric Engestrom
d4a64ad09b util: fix no-op macro (bad number of arguments)
Fixes: b8e077daee ("util: no-op __builtin_types_compatible_p() for non-GCC compilers")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit f986741a91)
2019-07-24 10:29:18 +00:00
Dylan Baker
e9a284e8d0 meson: allow building all glx without any drivers
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111016
Fixes: a47c525f32
       ("meson: build glx")
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 7cf50af6f5)
2019-07-24 10:09:37 +00:00
Lionel Landwerlin
dccd75b60c anv: fix use of comma operator
This doesn't fix any bug at the moment because the next statement is
'true' which happens to be APIMODE_D3D, but if that changes it could.

The fixes tags is as far I could go but the error predates it (2016 is
probably far enough).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8db6f2e6eb ("anv/pipeline: Roll genX_pipeline_util.h into genX_pipeline.c")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 772a5f9814)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_pipeline.c
2019-07-24 12:06:57 +02:00
Eric Engestrom
aff5714c65 nir: don't return void
Fixes: 14531d676b ("nir: make nir_const_value scalar")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 3acc4278ad)
2019-07-24 10:02:48 +00:00
Dave Airlie
9305d9b142 st/nir: fix arb fragment stage conversion
The comment even justifies the wrongness wrongly.

We should be translating to pipe values properly here or else
fragment maps to tess ctrl.

Fixes: 3d7611e9a6 ("st/nir: use NIR for asm programs")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 365f24705f)
2019-07-23 11:50:52 +00:00
Kenneth Graunke
2570ee28f5 egl: Only expose 565 pbuffer configs if X can export them as DRI3 images
Glamor in xorg-server 1.20 cannot expose 16bpp pixmaps when running in
the usual 24bpp mode.  This meant our 565 pbuffer configs would
ultimately fail to create a backing pixmap, leading to crashes.

To hack around this, make a 16bpp pixmap and try and export it.
If it works, expose the configs.  Otherwise, just skip them.

This also disables them on DRI2.  These configs were only added to pass
conformance requirements, and I doubt anybody cares about testing out
565 pbuffer visuals on DRI2-only drivers.

v2: Don't leak the fds (caught by Eric Anholt)
v3: Don't free(fds), it's not malloc'd

Fixes: dacb11a585 ("egl: Add a 565 pbuffer-only EGL config under X11.")
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 82607f8a90)
2019-07-23 11:49:37 +00:00
Kenneth Graunke
f8c0b90f99 egl: Make the 565 pbuffer-only config single buffered.
In commit dacb11a585, Eric found the first
matching 565 pbuffer config, and stopped.  Our double-buffered configs
come first in the list, so we added that, making a pbuffer-only config
that claimed to be double buffered.  This doesn't make sense, since
pixmaps/pbuffers are fundamentally not double buffered.

When using that config, every call to eglCreatePbufferSurface would fail
with EGL_BAD_MATCH.  The call chain looks like this:

   - eglCreatePbufferSurface
   - dri3_create_pbuffer_surface
   - dri3_create_surface
   - dri2_get_dri_config

which eventually does:

   const bool double_buffer = surface_type == EGL_WINDOW_BIT;

and then fails to find a matching config, because it ends up looking
for a single-buffered config - and there aren't any.

To fix this, make the 565 pbuffer config single-buffered.  This fixes
at least 51 dEQP-EGL.* tests.

Fixes: dacb11a585 ("egl: Add a 565 pbuffer-only EGL config under X11.")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 6ad31c4ff3)
2019-07-23 11:47:55 +00:00
Kenneth Graunke
43f62d2003 egl: Quiet warning about front buffer rendering for pixmaps/pbuffers
pbuffer configs cause a million of these warnings to trigger, but
when using pixmaps or buffers, there is only one surface, so this
warning doesn't make much sense.  Retain it for window surfaces for now.

Fixes: dacb11a585 ("egl: Add a 565 pbuffer-only EGL config under X11.")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit fc21394bc4)
2019-07-23 11:46:43 +00:00
Kenneth Graunke
be12174820 mesa: Fix ReadBuffers with pbuffers
pbuffers are internally single-buffered.  Marek fixed DrawBuffers to
handle this case, but we need to fix ReadBuffers too.  Otherwise,
pretty much every conformance test fails because glReadPixels breaks.

v2: Refactor the switch into a helper (suggested by Eric Anholt)

Fixes: 35294f2eca ("mesa: fix pbuffers because internally they are front buffers")
Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 78164a3a6c)
2019-07-23 11:45:31 +00:00
Jason Ekstrand
3cd11985c0 intel/fs: Stop stack allocating large arrays
Normally, we haven't worried too much about stack sizes as Linux tends
to be fairly friendly towards large stacks.  However, when running DXVK
apps under wine, we're suddenly subject to Windows' more stringent stack
limitations and can run out of space more easily.  In particular, some
of the shaders in Elite Dangerous: Horizons have quite a few registers
and the arrays in split_virtual_grfs are large enough to blow a 1 MiB
stack leading to crashes during shader compilation.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108662
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit fa63fad333)
2019-07-23 11:43:54 +00:00
Nataraj Deshpande
87efbe488e egl/android: Update color_buffers querying for buffer age
color_buffers[] is currently hard coded to 3 for android which fails
in droid_window_dequeue_buffer when ANativeWindow creates color_buffers
>3 while querying buffer age during dEQP partial_update tests on chromeOS.

The patch removes static color_buffers[], queries for MIN_UNDEQUEUED_BUFFERS,
sets native window buffer count and allocates the correct number of
color_buffers as per android.

Fixes dEQP-EGL.functional.partial_update* tests on chromebooks with
enabling EGL_KHR_partial_update.

v2: update comment instead of removing (Eric Engestrom)
v3: change static array to dynamic allocated color_buffers
    querying MIN_UNDEQUEUED_BUFFERS (Chia-I Wu olv@chromium.org)

Fixes: 2acc69da8c "EGL/Android: Add EGL_EXT_buffer_age extension"
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
(cherry picked from commit 0661c357c6)
2019-07-23 11:42:30 +00:00
Samuel Pitoiset
e1800b20f4 radv: fix crash in vkCmdClearAttachments with unused attachment
depth_stencil_attachment and/or ds_resolve attachment can be NULL.

This fixes crashes with
dEQP-VK.renderpass.suballocation.unused_clear_attachments.*

Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit b5116d3cb7)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_meta_clear.c
2019-07-23 13:40:12 +02:00
Juan A. Suarez Romero
33e57d0ace docs: add sha256 checksums for 19.1.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-07-23 11:18:10 +00:00
Juan A. Suarez Romero
09a1b2bdba docs: add release notes for 19.1.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-07-23 11:07:52 +00:00
Juan A. Suarez Romero
58e93aef96 Update version to 19.1.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-07-23 11:04:20 +00:00
Dave Airlie
f17ff71f49 radv: fix crash in shader tracing.
Enabling tracing, and then having a vmfault, can leads to a segfault
before we print out the traces, as if a meta shader is executing
and we don't have the NIR for it.

Just pass the stage and give back a default.

Fixes: 9b9ccee4d6 ("radv: take LDS into account for compute shader occupancy stats")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 2ac2b98780)
2019-07-19 08:40:05 +00:00
Samuel Pitoiset
d86b14ecbb radv: fix VGT_GS_MODE if VS uses the primitive ID
Found by inspection.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 63d670e350)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_pipeline.c
2019-07-19 10:38:00 +02:00
Samuel Iglesias Gonsálvez
900bcab48b anv: fix alphaToCoverage when there is no color attachment
There are tests in CTS for alpha to coverage without a color attachment
that are failing. This happens because we remove the shader color
outputs when we don't have a valid color attachment for them, but when
alpha to coverage is enabled we still want to preserve the the output
at location 0 since we need the alpha component. In that case we will
also need to create a null render target for RT 0.

v2:
  - We already create a null rt when we don't have any, so reuse that
    for this case (Jason)
  - Simplify the code a bit (Iago)

v3:
  - Take alpha to coverage from the key and don't tie this to depth-only
    rendering only, we want the same behavior if we have multiple render
    targets but the one at location 0 is not used. (Jason).
  - Rewrite commit message (Iago)

v4:
  - Make sure we take into account the array length of the shader outputs,
    which we were no handling correctly either and make sure we also
    create null render targets for any invalid array entries too.

v5:
  - Simplify removal of unused outputs by using rt_used[] so we don't have
    to special case alpha to coverage there too.

Fixes the following CTS tests:
dEQP-VK.pipeline.multisample.alpha_to_coverage_no_color_attachment.*

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit bc66cebc0d)
2019-07-18 16:30:25 +00:00
Lionel Landwerlin
0b1ee72bbc anv: fix format mapping for depth/stencil formats
anv_format is supposed to have a pointer back to the associated
VkFormat, we were missed this for depth/stencil formats.

This doesn't fix anything afaict, but will be needed for future
changes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 465de47bad ("anv: associate vulkan formats with aspects")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 3adc32df92)
2019-07-18 08:36:51 +00:00
Lepton Wu
3dea2e2ffc virgl: Set meta data for textures from handle.
The set of meta data was removed by commit 8083464. It broke lots of
dEQP tests when running with pbuffer surface type.

Fixes: 8083464013 ("virgl: remove dead code")
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
(cherry picked from commit 6109df58e4)
2019-07-18 08:35:40 +00:00