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Author SHA1 Message Date
Georg Lehmann
330e88abb8 amd/drm-shim: add vega20 
Vega20 ISA is different enough from Vega10 that having it
in drm-shim is useful for testing compiler changes.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39188>
 2026-01-08 09:30:54 +00:00
Pierre-Eric Pelloux-Prayer
bfa8dcf3b3 ac/sdma: fix src/dst pitch for sdma < 4
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Fixes DRM_PRIME with AMD_DEBUG=notiling.

Fixes: 5f8fa6ae03 ("ac,radv,radeonsi: add ac_emit_sdma_copy_linear_sub_window()")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39019>
 2026-01-08 09:45:58 +01:00
Pierre-Eric Pelloux-Prayer
2f347b5725 ac/sdma: fix ac_sdma_get_tiled_header_dword for older gen 
The header should be 0 for older sdma as well. This fixes
DRI_PRIME support for radeonsi.

Fixes: f5ecc5ffd5 ("ac,radv,radeonsi: add ac_emit_sdma_copy_tiled_sub_window()")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39019>
 2026-01-08 09:45:48 +01:00
Georg Lehmann
a706769a0b nir: move exact bit to nir_fp_math_control 
Unifies nir per instruction float control.

In the future this can be split into contract/reassoc/transform
like SPIR-V.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (except SPIR-V)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>
 2026-01-07 09:40:57 +00:00
Georg Lehmann
eb4737a1dd nir: add nir_alu_instr_is_exact helper 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>
 2026-01-07 09:40:57 +00:00
Marek Olšák
492a176cbb util: increase SHA1_DIGEST_LENGTH to 32 (BLAKE3_KEY_LEN) 
The last 12 bytes are always 0 for now. With this, all SHA1 functions
can be internally implemented as BLAKE3, so that we can switch everything
to BLAKE3 by only changing the implementation of the sha1 utility.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39110>
 2026-01-07 08:32:33 +00:00
Marek Olšák
1912a00a91 ALL: use SHA1_DIGEST_LENGTH etc. instead of hardcoding the numbers 
only build_id is switched to use literal 20 instead of SHA1_DIGEST_LENGTH
because we will increase SHA1_DIGEST_LENGTH to BLAKE3_KEY_LEN

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39110>
 2026-01-07 08:32:33 +00:00
Samuel Pitoiset
9f5dd888b6 radv/sqtt: add a comment about the allocation strategy of the SQTT BO
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39172>
 2026-01-07 06:57:29 +00:00
Samuel Pitoiset
ffa343ed05 Revert "radv: allocate the SQTT BO in GTT for faster readback" 
This reverts commit da07f1ef3f.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14591
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39172>
 2026-01-07 06:57:29 +00:00
Marek Olšák
13cfd0176c ac/gpu_info: add #define AMD_MEMCHANNEL_INTERLEAVE_BYTES 
radeon_info::pipe_interleave_bytes is renamed to r600_pipe_interleave_bytes
where it can be 512 on some chips.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39120>
 2026-01-06 20:32:10 +00:00
Marek Olšák
92133bb0ab amd: demystify various optimizations we already have for memory channels 
Explain why we do what we do, and use the radeon_info field properly.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39120>
 2026-01-06 20:32:10 +00:00
Samuel Pitoiset
4fce09268a ac/perfcounter: rename ac_pc_block::num_global_instances to num_instances
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39155>
 2026-01-06 11:43:21 +00:00
Samuel Pitoiset
59dc20262c ac/perfcounter: rename ac_pc_block::num_instances to num_scoped_instances 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39155>
 2026-01-06 11:43:21 +00:00
Samuel Pitoiset
3658d9588f ac/perfcounter: add num_{16,32}bit_spm_counters to GPU blocks 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39155>
 2026-01-06 11:43:21 +00:00
Samuel Pitoiset
9a1b925400 ac/spm: use GPU block distribution mode to determine instances 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39155>
 2026-01-06 11:43:20 +00:00
Samuel Pitoiset
ac0423eb3f ac/spm: use GPU block distribution mode to determine broadcasting 
SPM is only implemented for GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39155>
 2026-01-06 11:43:19 +00:00
Rhys Perry
614437ead5 ac/nir: don't vectorize 16-bit shared loads to 8-bit 
Fixes an issue where a 2x16 load was vectorized with a 1x16 load into a
8x8 load. This became possible after 49d923078f increased
aligned_new_size from 6 bytes to 8 bytes.

fossil-db (navi31):
Totals from 5 (0.01% of 79825) affected shaders:
Instrs: 6994 -> 6257 (-10.54%)
CodeSize: 44000 -> 39464 (-10.31%)
Latency: 90482 -> 89795 (-0.76%)
InvThroughput: 202955 -> 201926 (-0.51%)
VClause: 560 -> 565 (+0.89%)
Copies: 1135 -> 1108 (-2.38%); split: -2.82%, +0.44%
PreVGPRs: 201 -> 199 (-1.00%)
VALU: 3882 -> 3201 (-17.54%)
SALU: 493 -> 479 (-2.84%)
VOPD: 262 -> 258 (-1.53%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 49d923078f ("ac/nir: fix calculation of aligned_new_size")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14500
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39156>
 2026-01-06 10:28:02 +00:00
Marek Olšák
3552028e87 ac/lower_ngg_mesh: fix a segfault accessing out_variables out of bounds
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component_addr_off (in bytes) was used to offset a component index (in dwords).

Cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39144>
 2026-01-05 22:23:42 +00:00
Marek Olšák
b340588119 ac/gpu_info: don't read uninitialized dev_filename 
This fixes radeonsi-run-tests.py not being able to read AMD_DEBUG=info.

Fixes: 8777894d3e - amd: remove radeon_info::dev_filename

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39145>
 2026-01-05 21:56:36 +00:00
Konstantin Seurer
405c93c665 radv: Optimize BVH4 acceleration structure updates
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It is more efficient to compute the child index of the current node
inside the parent node and write the bounds when available. The previous
code could load up to 16 AABBs to compute the new ones. The new code
also only needs 1/7 of the previously used scratch memory. The new code
seems to be around 30% faster (0.5ms) in GOTG on a 6700XT.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39139>
 2026-01-05 15:24:54 +00:00
Daniel Schürmann
2d0d5fc104 aco/validate: validate constant bus limit after register allocation based on PhysReg 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:54:00 +00:00
Daniel Schürmann
eb16f701a6 aco/tests: Add new test to pack 2x16 SGPRs into VGPR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:54:00 +00:00
Daniel Schürmann
61c1ec541d aco/tests: Add test for subdword extraction from SGPR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:54:00 +00:00
Daniel Schürmann
0674c9d30e aco/validate: Validate correct RegisterClasses after lowering to HW instructions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:53:59 +00:00
Daniel Schürmann
b087bf2fbf aco/lower_to_hw: Fix SGPR Operand RegClasses for pack_2x16 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:53:59 +00:00
Daniel Schürmann
9f5996ae8a aco/lower_to_hw: Don't use 2 SGPR operands before GFX10 in a single VOP3 instruction in do_pack_2x16() 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:53:58 +00:00
Daniel Schürmann
d8481fd7cc aco/lower_to_hw: Fix SGPR Operand RegClasses of subdword copies 
Extracting from an SGPR could cause a wrong RegClass on
the operand which could later lead to selecting VOPD
instructions which falsely operate on the corresponding
VGPR.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
 2026-01-05 14:53:58 +00:00
Samuel Pitoiset
48d30ce5bf ac/rgp: enable the new derived SPM chunk for performance counters on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:07 +00:00
Samuel Pitoiset
dcf9f630ff ac/spm: add support for Ray Tracing counters in RGP on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:07 +00:00
Samuel Pitoiset
179184c07e ac/spm: add support for new Memory percentage counters in RGP 2.6 on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:07 +00:00
Samuel Pitoiset
78bdc03282 ac/spm: add support for new Memory bytes counters in RGP 2.6 on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:07 +00:00
Samuel Pitoiset
4d7794f0b3 ac/spm: add support for new LDS counters in RGP 2.6 on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:07 +00:00
Samuel Pitoiset
e315bd0321 ac/spm: update the cache group on GFX12 
No L1 counter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:06 +00:00
Samuel Pitoiset
7349169745 ac/spm: rework indexing of the derived groups/counters/components 
RGP expects linear indexing across the number of counters/components.
Because a component can be used with different counters, its index
should be re-used when needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:06 +00:00
Samuel Pitoiset
11a12893d6 ac/perfcounter: add new GCEA_SE block definition on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:05 +00:00
Samuel Pitoiset
7f84c0056f ac/perfcounter: add new GCEA_CPWD block definition on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:05 +00:00
Samuel Pitoiset
3722ef141c ac/spm: fix a crash with the RT counters on GFX10 
They are only enabled on GFX10.3+.

Fixes: 8bc37d0d19 ("ac/spm: add support for Ray Tracing counters in RGP")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39127>
 2026-01-05 09:05:50 +00:00
Samuel Pitoiset
a057800300 ac/perfcounter: compute the number of block instance properly on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
87b938ce41 ac/perfcounter: update configuration of many blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
381e4f4c9f ac/perfcounter: fix the number of static instances for some blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
91fdbadacc ac/perfcounter: define a distribution mode for all perf blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:03 +00:00
Samuel Pitoiset
736ddb6ba8 ac/perfcounter: move configuration for GFX10 in a separate file 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:03 +00:00
Samuel Pitoiset
6374484123 ac/perfcounter: compute the number of block instance properly on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:02 +00:00
Samuel Pitoiset
a037feb40b ac/perfcounter: update configuration of many blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:02 +00:00
Samuel Pitoiset
b7c2e38019 ac/perfcounter: fix the number of static instances for some blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
1925d61a7b ac/perfcounter: define a distribution mode for all perf blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
f4bc670ddf ac/perfcounter: move configuration for GFX10.3 in a separate file 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
abc72740a7 ac/perfcounter: fix number of instances for GCEA 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:00 +00:00
Eric Engestrom
c63732463a radv/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39140>
 2026-01-03 16:27:56 +00:00
Timur Kristóf
c05d276473 radv: Mitigate GFX6-7 SMEM bug for robust OOB access
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Implement a mitigation for VM faults caused by SMEM reading
out of bounds when using robust buffer access.

- Pad uniform and storage buffer allocations with a readonly VM page
- Clamp SMEM offsets that can potentially read past the next page

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00