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aco/validate: Validate correct RegisterClasses after lowering to HW instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39107>
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1 changed files with 24 additions and 3 deletions
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@ -134,14 +134,35 @@ validate_ir(Program* program)
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for (Block& block : program->blocks) {
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for (aco_ptr<Instruction>& instr : block.instructions) {
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if (program->progress < CompilationProgress::after_lower_to_hw) {
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for (const Operand& op : instr->operands)
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/* Check that register assignment and register class are consistent. */
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for (const Operand& op : instr->operands) {
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if (program->progress < CompilationProgress::after_lower_to_hw)
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check(!op.isTemp() || op.regClass() == program->temp_rc[op.tempId()],
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"Operand RC not consistent.", instr.get());
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for (const Definition& def : instr->definitions)
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if (program->progress >= CompilationProgress::after_ra)
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check(op.isFixed(), "Operand without register assignment.", instr.get());
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check(!op.hasRegClass() || op.isUndefined() || !op.isFixed() ||
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(op.physReg().reg() >= 256
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? op.isOfType(RegType::vgpr)
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: (op.isOfType(RegType::sgpr) && op.physReg().byte() == 0)),
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"Operand RC and assignment not consistent.", instr.get());
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}
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for (const Definition& def : instr->definitions) {
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if (program->progress < CompilationProgress::after_lower_to_hw)
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check(!def.isTemp() || def.regClass() == program->temp_rc[def.tempId()],
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"Definition RC not consistent.", instr.get());
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if (program->progress >= CompilationProgress::after_ra)
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check(def.isFixed(), "Definition without register assignment.", instr.get());
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check(!def.isFixed() ||
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(def.physReg().reg() >= 256
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? def.regClass().type() == RegType::vgpr
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: (def.regClass().type() == RegType::sgpr && def.physReg().byte() == 0)),
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"Definition RC and assignment not consistent.", instr.get());
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}
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const aco_alu_opcode_info& opcode_info = instr_info.alu_opcode_infos[(int)instr->opcode];
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