Commit graph

220870 commits

Author SHA1 Message Date
Olle Lögdahl
c69da756d1 aco/isel: added test-case for iterative cf visitor
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isel.cf.deep_traversal is a new ACO test that verifies
that the iterative nir cf visitor allows arbitrary depth.
A depth of 10000 would cause a stack overflow on x86-64 linux
(4096 kB stack) for the old recursive code. This test
is by default not enabled.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
2026-04-09 13:46:23 +00:00
Olle Lögdahl
aa49d69ea0 aco/isel: use iterative visitor during traversal
When iterating control-flow recursively, we always run the
risk of causing a stack overflow if the control-flow
depth is too large. This patch resolves this by visiting
control-flow nodes in an iterative way, managing an explicit
stack on the heap.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
2026-04-09 13:46:23 +00:00
Daniel Schürmann
37e2deab74 aco/isel: Remove if_context* parameter from begin_if() / end_if() helper functions
We can transparently create the context inside the functions, now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
2026-04-09 13:46:23 +00:00
Daniel Schürmann
53836320a9 aco/isel: Remove loop_context* parameter from begin_loop() / end_loop() helper functions
We can transparently create the context inside the functions, now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
2026-04-09 13:46:22 +00:00
Olle Lögdahl
5c1dea7ee4 aco/isel: move if_context and loop_context to heap
if_context and loop_context are large structs and may cause
stack overflows during CF traversal. This fix moves them to
the heap.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
2026-04-09 13:46:22 +00:00
Collabora's Gfx CI Team
909e0026d8 Uprev VVL to cb2acdf7f49053406770ae73cbb315229a9131eb
adfdda5b66...cb2acdf7f4

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40618>
2026-04-09 12:59:00 +00:00
Janne Grunau
564b061981 hk: Increase maxFragmentCombinedOutputResources to HK_MAX_DESCRIPTORS
Backport-to: 26.0
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15249 for hk
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40859>
2026-04-09 12:35:40 +00:00
Icenowy Zheng
9b44def4e9 pvr: set has_usc_alu_roundingmode_rne for all B-series Rogue cores
All B-series Rogue cores seem to have USC rounding mode as RTE instead
of RTZ.

Set the has_usc_alu_roundingmode_rne feature flag for them (currently
only BXS-4-64 has it set).

Verified via testing on BXM-4-64 (36.52.104.182) by fixing CTS tests
dEQP-VK.spirv_assembly.instruction.*.float_controls.fp32.input_args.* ,
and via proprietary driver vulkaninfo result on BXE-2-32 (36.29.52.182),
BXE-4-32 (36.50.54.182) and BXM-4-64 (36.56.104.183) (checking
shaderRoundingModeRT?Float32 properties).

Fixes: 1db1038a61 ("pvr: add device info for BXM-4-64 (36.56.104.183)")
Fixes: e60e0c96ba ("pvr: add device info for BXE-2-32 (36.29.52.182)")
Fixes: 2743363a57 ("pvr: add device info for BXM-4-64 (36.52.104.182)")
Fixes: ea28791d40 ("pvr: add device info for BXE-4-32 (36.50.54.182)")
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40794>
2026-04-09 12:18:59 +00:00
Lars-Ivar Hesselberg Simonsen
affcc7fe54 pan/va/isa: Src for X16_TO* takes lane, not swizzle
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While the swizzle code was producing the correct encoding, the
disassembly was slightly weird and swz_16 required an extra argument
that was always "false".

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40865>
2026-04-09 11:23:36 +00:00
Christian Gmeiner
41b34334a6 panvk: Advertise VK_EXT_attachment_feedback_loop_dynamic_state
The Vulkan runtime provides the dynamic state infrastructure via
vk_common_CmdSetAttachmentFeedbackLoopEnableEXT(). This builds on the
attachment feedback loop layout support.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40498>
2026-04-09 12:30:21 +02:00
Christian Gmeiner
a2d9d2b5f8 panvk: Advertise VK_EXT_attachment_feedback_loop_layout
PanVK treats image layouts as no-ops and already disables Forward Pixel
Kill when the same render target is both read and written.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40498>
2026-04-09 12:30:19 +02:00
Lars-Ivar Hesselberg Simonsen
6cdc3cc1d2 pan: Add support for 64 bit gpu_id
While not currently required, it will be for future GPUs.

Also cleans up gpu_id as parameter to some functions that didn't use it.

Reviewed-by: Aksel Hjerpbakk <aksel.hjerpbakk@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40610>
2026-04-09 09:49:20 +00:00
Lars-Ivar Hesselberg Simonsen
f181cc5bca pan/model: Redo gpu_prod_id in the model
The current implementation is a bit awkward and becomes tricky when
adding support for 64 bit gpu_ids.

Rather than keeping a mask of bits in gpu_id to compare with the stored
gpu_prod_id value, rely on macro functions for fetching the information
required from gpu_id and creating the comparison value.

Reviewed-by: Aksel Hjerpbakk <aksel.hjerpbakk@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40610>
2026-04-09 09:49:20 +00:00
Caius-Moldovan-img
37bdb2b792 pco: Move part of legalization after register allocation
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Signed-off-by: Caius Moldovan <caius.moldovan@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40724>
2026-04-09 09:29:21 +00:00
Caius-Moldovan-img
75dc7ef8fd pco: Add pseudo instruction fencing for DITR and DITRP
Signed-off-by: Caius Moldovan <caius.moldovan@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40724>
2026-04-09 09:29:21 +00:00
Caius-Moldovan-img
092106d742 pco: Move DITR and DITRP fencing from translation to legalization
Signed-off-by: Caius Moldovan <caius.moldovan@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40724>
2026-04-09 09:29:21 +00:00
David Rosca
cc78a5dd4b radeonsi/video: Fix setting decode surface format for single plane formats
multi_plane_format is only valid when num_planes > 1.

Fixes: 26979becec ("radeonsi/video: Add video decoder using ac_video_dec")
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40811>
2026-04-09 08:16:05 +00:00
Georg Lehmann
44a061a034 aco/spill: fix mixed lds+scratch spill/reload
We shouldn't increment the scratch offset while accessing LDS.

Fixes: 133ef9f94b ("aco: spill VGPRs to LDS if it doesn't further limit occupancy")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40855>
2026-04-09 07:51:52 +00:00
Tapani Pälli
3ab9145393 intel/compiler: implement dummy mov for Wa_18035690555
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37804>
2026-04-09 07:30:01 +00:00
Tapani Pälli
4bb68d7474 intel/compiler: expose inferred_exec_pipe from scoreboarding
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37804>
2026-04-09 07:30:01 +00:00
Sagar Ghuge
2bf520340d intel/compiler: Remove unused brw_nir_memclear_global helper
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This is a dead code, we can remvoe it for now.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenz.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40801>
2026-04-09 05:06:05 +00:00
Silvio Vilerino
4cac78bb3c mediafoundation: MFTRegisterWorkQueue/MFTUnregisterWorkQueue to validate null param instead of crash
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Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40860>
2026-04-08 14:48:54 -07:00
Silvio Vilerino
6d1b209d0c d3d12: Check queues are registered before unregistering in unregister_work_queue
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40860>
2026-04-08 14:48:33 -07:00
Lars-Ivar Hesselberg Simonsen
1f0370616a pan: Centralize preload registers
Rather than having preload registers hardcoded over multiple files,
gather them in one place with an enum abstraction.

This should simplify updates to the preload registers.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40643>
2026-04-08 20:30:32 +00:00
José Roberto de Souza
1e052f0bb5 intel/brw: Remove unsed functions to get data port message type
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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40832>
2026-04-08 17:44:52 +00:00
José Roberto de Souza
667a58ab38 anv: Use helper to get anv_address in emit_simple_shader_dispatch()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40832>
2026-04-08 17:44:52 +00:00
José Roberto de Souza
a69e02d97c anv: Make use of anv_shader_get_scratch_surf() in genX_cmd_compute.c
genX_cmd_compute.c has 2 places that is had a code very similar to
anv_shader_get_scratch_surf() but we could not make use of this function without
change it parameters.

Now it takes the shader stage and the total_scratch instead of anv_shader because
cmd_buffer_trace_rays() don't have a shader.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40832>
2026-04-08 17:44:52 +00:00
José Roberto de Souza
fd420e80e2 anv: Rename and share get_scratch_surf() with other files
We will need to call get_scratch_surf() from other files, so here removing the
static and adding it to anv_private.h.

No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40832>
2026-04-08 17:44:51 +00:00
Samuel Pitoiset
5f1c22037b radv: advertise VK_EXT_primitive_restart_index
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40775>
2026-04-08 17:19:48 +00:00
Samuel Pitoiset
c9b2bd385b radv: implement VK_EXT_primitive_restart_index
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40775>
2026-04-08 17:19:48 +00:00
Samuel Pitoiset
8f33896822 radv: pre-compute the primitive restart index
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40775>
2026-04-08 17:19:48 +00:00
Kenneth Graunke
b391f2d888 anv: Use nir_lower_memory_model
This replaces NIR_MEMORY_MAKE_{AVALIABLE,VISIBLE} with COHERENT.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40833>
2026-04-08 16:07:35 +00:00
Kenneth Graunke
0c0fea1cdb nir: Increase tex opcode bits from 5 to 6 in nir_instr_set
We are already at our limit of 31 texture opcodes, and cannot add any
more without expanding the opcode hashing in nir_instr_set.  Thankfully,
it's at 29 bits, so adding one here is possible still.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40833>
2026-04-08 16:07:35 +00:00
Alyssa Rosenzweig
73701c305e brw: wire up MACL
New on Xe2, this instruction enables faster 32x32 integer multiply at the cost
of extra accumulator usage. Add it to the opcode list for future use.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40833>
2026-04-08 16:07:35 +00:00
Rhys Perry
01516746eb nir: use a u_dynarray for block predecessors
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A set is large and expensive to iterate.

This is faster (overall fossilize-replay difference):
Difference at 95.0% confidence
        -250 +/- 28.9257
        -2.04849% +/- 0.235211%
        (Student's t, pooled s = 34.1626)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40242>
2026-04-08 15:06:34 +00:00
Rhys Perry
99c5f48da9 nir/cf: don't remove block predecessors while iterating
This would have been fine for a set, but we're going to use a dynarray for
the predecessors in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40242>
2026-04-08 15:06:33 +00:00
Rhys Perry
ea148c9136 nir: add nir_loop_has_back_edge helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40242>
2026-04-08 15:06:32 +00:00
Rhys Perry
463e3643f2 nir: add and use block predecessor helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40242>
2026-04-08 15:06:32 +00:00
Eric Engestrom
705158562a Revert "ci-tron: ensure the test jobs start with a clean job folder"
This reverts commit aa39da8338.

This turned out to cause issues when rebuilding test docker images.

This will need further investigation, for now just revert it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40850>
2026-04-08 14:30:34 +00:00
Samuel Pitoiset
b402b98347 nir: allow heap image intrinsics in nir_rewrite_image_intrinsic()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40842>
2026-04-08 13:56:04 +00:00
Aitor Camacho
25cb744d35 kk: Demote events, query availabilities and queue writes to 32 bits
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Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40849>
2026-04-08 13:37:53 +00:00
Aitor Camacho
625254d6ae kk: Remove buffer arg from queue writes
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40849>
2026-04-08 13:37:53 +00:00
Aitor Camacho
d8b9ee99fa kk: Reset queries through compute dispatch instead of queue writes
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40849>
2026-04-08 13:37:52 +00:00
Samuel Pitoiset
4e00e1c3d0 radv/meta: fix computing extent for image->image with both compressed formats
If both src and dst are compressed formats, adjusting the extent isn't
necessary because it's required that texel block extent matches. The
previous division was also wrong because it was truncating partial
blocks causing issues in some tests.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40678>
2026-04-08 13:11:55 +00:00
Marc Alcala Prieto
0d08b197f2 pan/cs: Fix cs_run_fragment() calls with swapped arguments
Fix non-functional issue where calls to cs_run_fragment() had swapped
tile_order and enable_tem arguments. Both arguments evaluate to 0.
Hence, no functional change.

Fixes: 53f780ec91 ("panfrost: Remove progress_increment from all CS builders")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40840>
2026-04-08 12:14:23 +00:00
Ryan Zhang
eaf68f744b panvk/csf: rework IR descriptor handling for tiler OOM
Replace the old partial IR state snapshotting with prebuilt
per-pass IR descriptor buffers and a queue-attached scratch FBD.

1. emit FBD+DBD+RTDs for each IR-pass+layer
2. store it into some side-band GPU buffer that's passed around
through the queue context
3. in the execption handler, copy FBD+DBD+RTDs from the IR desc
buffer to some space that's attached to the queue context and
not the cmdbuf

Fixes: 46f611c9 ("panvk: Also use resolve shaders for Z/S")

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Ryan zhang <ryan.zhang@nxp.com>

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40625>
2026-04-08 11:33:15 +00:00
Valentine Burley
61a2e53b7b anv/ci: Add full VKCTS pre-merge job on Raptor Lake
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We have 11 new RPL-U Brya Chromebooks in the Collabora lab, allowing the
full VKCTS test suite to run pre-merge for the first time without a
fraction.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40782>
2026-04-08 11:11:17 +00:00
David Rosca
3dbbd94ffd radeonsi: Set multi plane format also for imported textures
multi_plane_format is used to correctly copy all planes for staging texture
copies, otherwise only the first plane gets copied.
It's now also used in si_video_dec, which doesn't work when decoding into
imported surfaces if multi_plane_format is not set.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15232
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40817>
2026-04-08 10:44:46 +00:00
David Rosca
363447b7d0 radv/video: Use quality level for encode preset instead of tuning mode
qualityLevel as a speed/quality tradeoff is better match for encode presets
than the tuning mode. In addition we can support more quality levels than
what is available from tuning modes, this adds support for High Quality
preset on VCN4+.
This also makes it possible to use Low Latency tuning with balance and
quality presets.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40765>
2026-04-08 10:19:29 +00:00
Samuel Pitoiset
a41724e923 nir: remove nir_intrinsic_global_addr_to_descriptor
It's no longer emitted by vk_nir_lower_descriptor_heaps().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40826>
2026-04-08 09:46:01 +00:00