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aco/isel: Remove if_context* parameter from begin_if() / end_if() helper functions

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We can transparently create the context inside the functions, now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40364>
This commit is contained in:
Daniel Schürmann 2026-04-08 09:23:00 +02:00 • committed by Marge Bot
parent 53836320a9
commit 37e2deab74
5 changed files with 103 additions and 108 deletions
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13
src/amd/compiler/instruction_selection/aco_instruction_selection.h
View file

@ -144,7 +144,6 @@ struct isel_context {
cf_context cf_info;
bool skipping_empty_exec = false;
if_context empty_exec_skip;
std::vector<if_context> if_stack;
std::vector<loop_context> loop_stack;
@ -250,14 +249,14 @@ void emit_loop_break(isel_context* ctx);
void emit_loop_continue(isel_context* ctx);
void begin_loop(isel_context* ctx);
void end_loop(isel_context* ctx);
void begin_uniform_if_then(isel_context* ctx, if_context* ic, Temp cond);
void begin_uniform_if_else(isel_context* ctx, if_context* ic, bool logical_else = true);
void end_uniform_if(isel_context* ctx, if_context* ic, bool logical_else = true);
void begin_divergent_if_then(isel_context* ctx, if_context* ic, Temp cond,
void begin_uniform_if_then(isel_context* ctx, Temp cond);
void begin_uniform_if_else(isel_context* ctx, bool logical_else = true);
void end_uniform_if(isel_context* ctx, bool logical_else = true);
void begin_divergent_if_then(isel_context* ctx, Temp cond,
nir_selection_control sel_ctrl = nir_selection_control_none);
void begin_divergent_if_else(isel_context* ctx, if_context* ic,
void begin_divergent_if_else(isel_context* ctx,
nir_selection_control sel_ctrl = nir_selection_control_none);
void end_divergent_if(isel_context* ctx, if_context* ic);
void end_divergent_if(isel_context* ctx);
void begin_empty_exec_skip(isel_context* ctx, nir_instr* after_instr, nir_block* block);
void end_empty_exec_skip(isel_context* ctx);

131
src/amd/compiler/instruction_selection/aco_isel_cfg.cpp
View file

@ -204,11 +204,11 @@ emit_loop_continue(isel_context* ctx)
}
void
begin_uniform_if_then(isel_context* ctx, if_context* ic, Temp cond)
begin_uniform_if_then(isel_context* ctx, Temp cond)
{
assert(!cond.id() || cond.regClass() == s1);
ic->cond = cond;
if_context ic;
ic.cond = cond;
append_logical_end(ctx);
ctx->block->kind |= block_kind_uniform;
@ -227,28 +227,30 @@ begin_uniform_if_then(isel_context* ctx, if_context* ic, Temp cond)
}
ctx->block->instructions.emplace_back(std::move(branch));
ic->BB_if_idx = ctx->block->index;
ic->BB_endif = Block();
ic->BB_endif.kind |= ctx->block->kind & block_kind_top_level;
ic.BB_if_idx = ctx->block->index;
ic.BB_endif = Block();
ic.BB_endif.kind |= ctx->block->kind & block_kind_top_level;
assert(!ctx->cf_info.has_branch && !ctx->cf_info.has_divergent_branch);
ic->cf_info_old = ctx->cf_info;
ic.cf_info_old = ctx->cf_info;
/** emit then block */
if (ic->cond.id())
if (ic.cond.id())
ctx->program->next_uniform_if_depth++;
Block* BB_then = ctx->program->create_and_insert_block();
add_edge(ic->BB_if_idx, BB_then);
add_edge(ic.BB_if_idx, BB_then);
append_logical_start(BB_then);
ctx->block = BB_then;
ctx->if_stack.push_back(std::move(ic));
}
void
begin_uniform_if_else(isel_context* ctx, if_context* ic, bool logical_else)
begin_uniform_if_else(isel_context* ctx, bool logical_else)
{
if (ctx->cf_info.has_branch)
return;
Block* BB_then = ctx->block;
if_context& ic = ctx->if_stack.back();
if (!ctx->cf_info.has_divergent_branch)
append_logical_end(ctx);
@ -257,34 +259,35 @@ begin_uniform_if_else(isel_context* ctx, if_context* ic, bool logical_else)
aco_ptr<Instruction> branch;
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_then->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_then->index, &ic->BB_endif);
add_linear_edge(BB_then->index, &ic.BB_endif);
if (!ctx->cf_info.has_divergent_branch)
add_logical_edge(BB_then->index, &ic->BB_endif);
add_logical_edge(BB_then->index, &ic.BB_endif);
BB_then->kind |= block_kind_uniform;
ctx->cf_info.has_branch = false;
ctx->cf_info.has_divergent_branch = false;
std::swap(ic->cf_info_old, ctx->cf_info);
std::swap(ic.cf_info_old, ctx->cf_info);
/** emit else block */
Block* BB_else = ctx->program->create_and_insert_block();
if (logical_else) {
add_edge(ic->BB_if_idx, BB_else);
add_edge(ic.BB_if_idx, BB_else);
append_logical_start(BB_else);
} else {
add_linear_edge(ic->BB_if_idx, BB_else);
add_linear_edge(ic.BB_if_idx, BB_else);
}
ctx->block = BB_else;
}
void
end_uniform_if(isel_context* ctx, if_context* ic, bool logical_else)
end_uniform_if(isel_context* ctx, bool logical_else)
{
Block* BB_else = ctx->block;
if_context& ic = ctx->if_stack.back();
if (ctx->cf_info.has_branch) {
/* If there is branch, it must be on the THEN side. No need to emit the ELSE. */
add_edge(ic->BB_if_idx, &ic->BB_endif);
add_edge(ic.BB_if_idx, &ic.BB_endif);
} else {
if (logical_else)
append_logical_end(ctx);
@ -292,35 +295,36 @@ end_uniform_if(isel_context* ctx, if_context* ic, bool logical_else)
aco_ptr<Instruction> branch;
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_else->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_else->index, &ic->BB_endif);
add_linear_edge(BB_else->index, &ic.BB_endif);
if (logical_else)
add_logical_edge(BB_else->index, &ic->BB_endif);
add_logical_edge(BB_else->index, &ic.BB_endif);
BB_else->kind |= block_kind_uniform;
}
assert(!ctx->cf_info.has_divergent_branch);
ctx->cf_info.has_branch = false;
ctx->cf_info.had_divergent_discard |= ic->cf_info_old.had_divergent_discard;
ctx->cf_info.had_divergent_discard |= ic.cf_info_old.had_divergent_discard;
ctx->cf_info.parent_loop.has_divergent_continue |=
ic->cf_info_old.parent_loop.has_divergent_continue;
ctx->cf_info.parent_loop.has_divergent_break |= ic->cf_info_old.parent_loop.has_divergent_break;
ctx->cf_info.in_divergent_cf |= ic->cf_info_old.in_divergent_cf;
ctx->cf_info.exec.combine(ic->cf_info_old.exec);
ic.cf_info_old.parent_loop.has_divergent_continue;
ctx->cf_info.parent_loop.has_divergent_break |= ic.cf_info_old.parent_loop.has_divergent_break;
ctx->cf_info.in_divergent_cf |= ic.cf_info_old.in_divergent_cf;
ctx->cf_info.exec.combine(ic.cf_info_old.exec);
/** emit endif merge block */
if (ic->cond.id())
if (ic.cond.id())
ctx->program->next_uniform_if_depth--;
ctx->block = ctx->program->insert_block(std::move(ic->BB_endif));
ctx->block = ctx->program->insert_block(std::move(ic.BB_endif));
append_logical_start(ctx->block);
ctx->if_stack.pop_back();
/* We shouldn't create unreachable blocks. */
assert(!ctx->block->logical_preds.empty());
}
void
begin_divergent_if_then(isel_context* ctx, if_context* ic, Temp cond,
nir_selection_control sel_ctrl)
begin_divergent_if_then(isel_context* ctx, Temp cond, nir_selection_control sel_ctrl)
{
if_context ic;
append_logical_end(ctx);
ctx->block->kind |= block_kind_branch;
@ -334,15 +338,15 @@ begin_divergent_if_then(isel_context* ctx, if_context* ic, Temp cond,
branch->branch().never_taken = never_taken;
ctx->block->instructions.push_back(std::move(branch));
ic->BB_if_idx = ctx->block->index;
ic->BB_invert = Block();
ic.BB_if_idx = ctx->block->index;
ic.BB_invert = Block();
/* Invert blocks are intentionally not marked as top level because they
* are not part of the logical cfg. */
ic->BB_invert.kind |= block_kind_invert;
ic->BB_endif = Block();
ic->BB_endif.kind |= (block_kind_merge | (ctx->block->kind & block_kind_top_level));
ic.BB_invert.kind |= block_kind_invert;
ic.BB_endif = Block();
ic.BB_endif.kind |= (block_kind_merge | (ctx->block->kind & block_kind_top_level));
ic->cf_info_old = ctx->cf_info;
ic.cf_info_old = ctx->cf_info;
ctx->cf_info.parent_if.is_divergent = true;
ctx->cf_info.in_divergent_cf = true;
@ -352,26 +356,28 @@ begin_divergent_if_then(isel_context* ctx, if_context* ic, Temp cond,
/** emit logical then block */
ctx->program->next_divergent_if_logical_depth++;
Block* BB_then_logical = ctx->program->create_and_insert_block();
add_edge(ic->BB_if_idx, BB_then_logical);
add_edge(ic.BB_if_idx, BB_then_logical);
ctx->block = BB_then_logical;
append_logical_start(BB_then_logical);
ctx->if_stack.push_back(std::move(ic));
}
void
begin_divergent_if_else(isel_context* ctx, if_context* ic, nir_selection_control sel_ctrl)
begin_divergent_if_else(isel_context* ctx, nir_selection_control sel_ctrl)
{
Block* BB_then_logical = ctx->block;
if (ctx->cf_info.has_divergent_branch)
return;
append_logical_end(ctx);
if_context& ic = ctx->if_stack.back();
/* branch from logical then block to invert block */
aco_ptr<Instruction> branch;
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_then_logical->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_then_logical->index, &ic->BB_invert);
add_logical_edge(BB_then_logical->index, &ic->BB_endif);
add_linear_edge(BB_then_logical->index, &ic.BB_invert);
add_logical_edge(BB_then_logical->index, &ic.BB_endif);
BB_then_logical->kind |= block_kind_uniform;
assert(!ctx->cf_info.has_branch);
ctx->cf_info.has_divergent_branch = false;
@ -380,15 +386,15 @@ begin_divergent_if_else(isel_context* ctx, if_context* ic, nir_selection_control
/** emit linear then block */
Block* BB_then_linear = ctx->program->create_and_insert_block();
BB_then_linear->kind |= block_kind_uniform;
add_linear_edge(ic->BB_if_idx, BB_then_linear);
add_linear_edge(ic.BB_if_idx, BB_then_linear);
/* branch from linear then block to invert block */
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_then_linear->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_then_linear->index, &ic->BB_invert);
add_linear_edge(BB_then_linear->index, &ic.BB_invert);
/** emit invert merge block */
ctx->block = ctx->program->insert_block(std::move(ic->BB_invert));
ic->invert_idx = ctx->block->index;
ctx->block = ctx->program->insert_block(std::move(ic.BB_invert));
ic.invert_idx = ctx->block->index;
/* branch to linear else block (skip else) */
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
@ -398,34 +404,36 @@ begin_divergent_if_else(isel_context* ctx, if_context* ic, nir_selection_control
ctx->block->instructions.push_back(std::move(branch));
/* We never enter an IF construct with empty exec mask. */
std::swap(ic->cf_info_old.exec, ctx->cf_info.exec);
std::swap(ic.cf_info_old.exec, ctx->cf_info.exec);
assert(!ctx->cf_info.exec.empty());
std::swap(ic->cf_info_old.had_divergent_discard, ctx->cf_info.had_divergent_discard);
std::swap(ic.cf_info_old.had_divergent_discard, ctx->cf_info.had_divergent_discard);
/** emit logical else block */
ctx->program->next_divergent_if_logical_depth++;
Block* BB_else_logical = ctx->program->create_and_insert_block();
add_logical_edge(ic->BB_if_idx, BB_else_logical);
add_linear_edge(ic->invert_idx, BB_else_logical);
add_logical_edge(ic.BB_if_idx, BB_else_logical);
add_linear_edge(ic.invert_idx, BB_else_logical);
ctx->block = BB_else_logical;
append_logical_start(BB_else_logical);
}
void
end_divergent_if(isel_context* ctx, if_context* ic)
end_divergent_if(isel_context* ctx)
{
Block* BB_else_logical = ctx->block;
if_context& ic = ctx->if_stack.back();
if (!ctx->cf_info.has_divergent_branch) {
append_logical_end(ctx);
add_logical_edge(BB_else_logical->index, &ic->BB_endif);
add_logical_edge(BB_else_logical->index, &ic.BB_endif);
}
/* branch from logical else block to endif block */
aco_ptr<Instruction> branch;
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_else_logical->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_else_logical->index, &ic->BB_endif);
add_linear_edge(BB_else_logical->index, &ic.BB_endif);
BB_else_logical->kind |= block_kind_uniform;
ctx->program->next_divergent_if_logical_depth--;
@ -435,29 +443,30 @@ end_divergent_if(isel_context* ctx, if_context* ic)
Block* BB_else_linear = ctx->program->create_and_insert_block();
BB_else_linear->kind |= block_kind_uniform;
if (ctx->cf_info.has_divergent_branch) {
add_linear_edge(ic->BB_if_idx, BB_else_linear);
add_logical_edge(ic->BB_if_idx, &ic->BB_endif);
add_linear_edge(ic.BB_if_idx, BB_else_linear);
add_logical_edge(ic.BB_if_idx, &ic.BB_endif);
} else {
add_linear_edge(ic->invert_idx, BB_else_linear);
add_linear_edge(ic.invert_idx, BB_else_linear);
}
/* branch from linear else block to endif block */
branch.reset(create_instruction(aco_opcode::p_branch, Format::PSEUDO_BRANCH, 0, 0));
BB_else_linear->instructions.emplace_back(std::move(branch));
add_linear_edge(BB_else_linear->index, &ic->BB_endif);
add_linear_edge(BB_else_linear->index, &ic.BB_endif);
/** emit endif merge block */
ctx->block = ctx->program->insert_block(std::move(ic->BB_endif));
ctx->block = ctx->program->insert_block(std::move(ic.BB_endif));
append_logical_start(ctx->block);
ctx->cf_info.has_divergent_branch = false;
ctx->cf_info.parent_if = ic->cf_info_old.parent_if;
ctx->cf_info.had_divergent_discard |= ic->cf_info_old.had_divergent_discard;
ctx->cf_info.in_divergent_cf = ic->cf_info_old.in_divergent_cf ||
ctx->cf_info.parent_if = ic.cf_info_old.parent_if;
ctx->cf_info.had_divergent_discard |= ic.cf_info_old.had_divergent_discard;
ctx->cf_info.in_divergent_cf = ic.cf_info_old.in_divergent_cf ||
ctx->cf_info.parent_loop.has_divergent_break ||
ctx->cf_info.parent_loop.has_divergent_continue;
ctx->cf_info.exec.combine(ic->cf_info_old.exec);
ctx->cf_info.exec.combine(ic.cf_info_old.exec);
update_exec_info(ctx);
ctx->if_stack.pop_back();
/* We shouldn't create unreachable blocks. */
assert(!ctx->block->logical_preds.empty());
@ -468,8 +477,8 @@ end_empty_exec_skip(isel_context* ctx)
{
if (ctx->skipping_empty_exec) {
assert(!ctx->cf_info.has_branch);
begin_uniform_if_else(ctx, &ctx->empty_exec_skip, false);
end_uniform_if(ctx, &ctx->empty_exec_skip, false);
begin_uniform_if_else(ctx, false);
end_uniform_if(ctx, false);
ctx->skipping_empty_exec = false;
}
}
@ -520,7 +529,7 @@ begin_empty_exec_skip(isel_context* ctx, nir_instr* after_instr, nir_block* bloc
/* Don't nest these skipping branches. It is not worth the complexity. */
end_empty_exec_skip(ctx);
begin_uniform_if_then(ctx, &ctx->empty_exec_skip, Temp());
begin_uniform_if_then(ctx, Temp());
ctx->skipping_empty_exec = true;
ctx->cf_info.exec = exec_info();

37
src/amd/compiler/instruction_selection/aco_select_nir.cpp
View file

@ -958,7 +958,6 @@ visit_if(isel_context* ctx, nir_if* if_stmt)
Temp cond = get_ssa_temp(ctx, if_stmt->condition.ssa);
Builder bld(ctx->program, ctx->block);
aco_ptr<Instruction> branch;
ctx->if_stack.push_back(if_context());
if (!nir_src_is_divergent(&if_stmt->condition)) { /* uniform condition */
/**
@ -980,13 +979,13 @@ visit_if(isel_context* ctx, nir_if* if_stmt)
assert(cond.regClass() == ctx->program->lane_mask);
cond = bool_to_scalar_condition(ctx, cond);
begin_uniform_if_then(ctx, &ctx->if_stack.back(), cond);
begin_uniform_if_then(ctx, cond);
visit_cf_list(ctx, &if_stmt->then_list);
begin_uniform_if_else(ctx, &ctx->if_stack.back());
begin_uniform_if_else(ctx);
visit_cf_list(ctx, &if_stmt->else_list);
end_uniform_if(ctx, &ctx->if_stack.back());
end_uniform_if(ctx);
} else { /* non-uniform condition */
/**
* To maintain a logical and linear CFG without critical edges,
@ -1023,16 +1022,14 @@ visit_if(isel_context* ctx, nir_if* if_stmt)
* BB_ENDIF
**/
begin_divergent_if_then(ctx, &ctx->if_stack.back(), cond, if_stmt->control);
begin_divergent_if_then(ctx, cond, if_stmt->control);
visit_cf_list(ctx, &if_stmt->then_list);
begin_divergent_if_else(ctx, &ctx->if_stack.back(), if_stmt->control);
begin_divergent_if_else(ctx, if_stmt->control);
visit_cf_list(ctx, &if_stmt->else_list);
end_divergent_if(ctx, &ctx->if_stack.back());
end_divergent_if(ctx);
}
ctx->if_stack.pop_back();
}
void
@ -1042,7 +1039,6 @@ visit_cf_list(isel_context* ctx, struct exec_list* list)
return;
bool skipping_empty_exec_old = ctx->skipping_empty_exec;
if_context empty_exec_skip_old = std::move(ctx->empty_exec_skip);
ctx->skipping_empty_exec = false;
foreach_list_typed (nir_cf_node, node, node, list) {
@ -1056,7 +1052,6 @@ visit_cf_list(isel_context* ctx, struct exec_list* list)
end_empty_exec_skip(ctx);
ctx->skipping_empty_exec = skipping_empty_exec_old;
ctx->empty_exec_skip = std::move(empty_exec_skip_old);
}
void
@ -1434,8 +1429,8 @@ create_end_for_merged_shader(isel_context* ctx)
void
select_shader(isel_context& ctx, nir_shader* nir, const bool need_startpgm, const bool need_endpgm,
const bool need_barrier, if_context* ic_merged_wave_info,
const bool check_merged_wave_info, const bool endif_merged_wave_info)
const bool need_barrier, const bool check_merged_wave_info,
const bool endif_merged_wave_info)
{
init_context(&ctx, nir);
setup_fp_mode(&ctx, nir);
@ -1467,7 +1462,7 @@ select_shader(isel_context& ctx, nir_shader* nir, const bool need_startpgm, cons
const unsigned i =
nir->info.stage == MESA_SHADER_VERTEX || nir->info.stage == MESA_SHADER_TESS_EVAL ? 0 : 1;
const Temp cond = merged_wave_info_to_mask(&ctx, i);
begin_divergent_if_then(&ctx, ic_merged_wave_info, cond);
begin_divergent_if_then(&ctx, cond);
}
if (need_barrier) {
@ -1497,8 +1492,8 @@ select_shader(isel_context& ctx, nir_shader* nir, const bool need_startpgm, cons
}
if (endif_merged_wave_info) {
begin_divergent_if_else(&ctx, ic_merged_wave_info);
end_divergent_if(&ctx, ic_merged_wave_info);
begin_divergent_if_else(&ctx);
end_divergent_if(&ctx);
}
bool is_first_stage_of_merged_shader = false;
@ -1534,7 +1529,6 @@ select_shader(isel_context& ctx, nir_shader* nir, const bool need_startpgm, cons
void
select_program_merged(isel_context& ctx, const unsigned shader_count, nir_shader* const* shaders)
{
if_context ic_merged_wave_info;
const bool ngg_gs = ctx.stage.hw == AC_HW_NEXT_GEN_GEOMETRY_SHADER && ctx.stage.has(SWStage::GS);
const bool hs = ctx.stage.hw == AC_HW_HULL_SHADER;
@ -1568,8 +1562,8 @@ select_program_merged(isel_context& ctx, const unsigned shader_count, nir_shader
/* A barrier is usually needed at the beginning of the second shader, with exceptions. */
const bool need_barrier = i != 0 && !ngg_gs && !tcs_skip_barrier;
select_shader(ctx, nir, need_startpgm, need_endpgm, need_barrier, &ic_merged_wave_info,
check_merged_wave_info, endif_merged_wave_info);
select_shader(ctx, nir, need_startpgm, need_endpgm, need_barrier, check_merged_wave_info,
endif_merged_wave_info);
if (i == 0 && ctx.stage == vertex_tess_control_hs && ctx.tcs_in_out_eq) {
/* Special handling when TCS input and output patch size is the same.
@ -1599,7 +1593,6 @@ select_program(Program* program, unsigned shader_count, struct nir_shader* const
select_program_merged(ctx, shader_count, shaders);
} else {
bool need_barrier = false, check_merged_wave_info = false, endif_merged_wave_info = false;
if_context ic_merged_wave_info;
/* Handle separate compilation of VS+TCS and {VS,TES}+GS on GFX9+. */
if (ctx.program->info.merged_shader_compiled_separately) {
@ -1616,8 +1609,8 @@ select_program(Program* program, unsigned shader_count, struct nir_shader* const
}
}
select_shader(ctx, shaders[0], true, true, need_barrier, &ic_merged_wave_info,
check_merged_wave_info, endif_merged_wave_info);
select_shader(ctx, shaders[0], true, true, need_barrier, check_merged_wave_info,
endif_merged_wave_info);
}
}

13
src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp
View file

@ -3713,8 +3713,7 @@ pops_await_overlapped_waves(isel_context* ctx)
/* Check if there's an overlap in the current wave - otherwise, the wait may result in a hang. */
const Temp did_overlap =
bld.sopc(aco_opcode::s_bitcmp1_b32, bld.def(s1, scc), collision, Operand::c32(31));
if_context did_overlap_if_context;
begin_uniform_if_then(ctx, &did_overlap_if_context, did_overlap);
begin_uniform_if_then(ctx, did_overlap);
bld.reset(ctx->block);
/* Set the packer register - after this, pops_exiting_wave_id can be polled. */
@ -3784,11 +3783,9 @@ pops_await_overlapped_waves(isel_context* ctx)
*/
const Temp newest_overlapped_wave_exited = bld.sopc(aco_opcode::s_cmp_lt_u32, bld.def(s1, scc),
newest_overlapped_wave_id, exiting_wave_id);
if_context newest_overlapped_wave_exited_if_context;
begin_uniform_if_then(ctx, &newest_overlapped_wave_exited_if_context,
newest_overlapped_wave_exited);
begin_uniform_if_then(ctx, newest_overlapped_wave_exited);
emit_loop_break(ctx);
end_uniform_if(ctx, &newest_overlapped_wave_exited_if_context);
end_uniform_if(ctx);
bld.reset(ctx->block);
/* Sleep before rechecking to let overlapped waves run for some time. */
@ -3800,8 +3797,8 @@ pops_await_overlapped_waves(isel_context* ctx)
/* Indicate the wait has been done to subsequent compilation stages. */
bld.pseudo(aco_opcode::p_pops_gfx9_overlapped_wave_wait_done);
begin_uniform_if_else(ctx, &did_overlap_if_context);
end_uniform_if(ctx, &did_overlap_if_context);
begin_uniform_if_else(ctx);
end_uniform_if(ctx);
bld.reset(ctx->block);
}

17
src/amd/compiler/instruction_selection/aco_select_trap_handler.cpp
View file

@ -169,12 +169,11 @@ dump_vgprs_to_mem(isel_context* ctx, Builder& bld, Operand rsrc)
const Temp cond = bld.sopc(aco_opcode::s_cmp_ge_u32, bld.def(s1, scc), Operand(soffset, s1),
Operand(num_vgprs, s1));
if_context loop_break;
begin_uniform_if_then(ctx, &loop_break, cond);
begin_uniform_if_then(ctx, cond);
{
emit_loop_break(ctx);
}
end_uniform_if(ctx, &loop_break);
end_uniform_if(ctx);
}
end_loop(ctx);
bld.reset(ctx->block);
@ -210,8 +209,7 @@ dump_lds_to_mem(isel_context* ctx, Builder& bld, Operand rsrc)
Temp lds_size_non_zero =
bld.sopc(aco_opcode::s_cmp_lg_i32, bld.def(s1, scc), Operand(lds_size, s1), Operand::c32(0));
if_context ic;
begin_uniform_if_then(ctx, &ic, lds_size_non_zero);
begin_uniform_if_then(ctx, lds_size_non_zero);
{
bld.reset(ctx->block);
@ -265,18 +263,17 @@ dump_lds_to_mem(isel_context* ctx, Builder& bld, Operand rsrc)
const Temp cond = bld.sopc(aco_opcode::s_cmp_ge_u32, bld.def(s1, scc),
Operand(soffset, s1), Operand(lds_size, s1));
if_context loop_break;
begin_uniform_if_then(ctx, &loop_break, cond);
begin_uniform_if_then(ctx, cond);
{
emit_loop_break(ctx);
}
end_uniform_if(ctx, &loop_break);
end_uniform_if(ctx);
}
end_loop(ctx);
bld.reset(ctx->block);
}
begin_uniform_if_else(ctx, &ic);
end_uniform_if(ctx, &ic);
begin_uniform_if_else(ctx);
end_uniform_if(ctx);
bld.reset(ctx->block);
disable_thread_indexing(ctx, rsrc);