Commit graph

142765 commits

Author SHA1 Message Date
Samuel Pitoiset
c63674ee71 radv: fix initializing the DS clear metadata value for separate aspects
We shouldn't overwrite the clear value of the other aspect (in case
separate depth/stencil layouts are used).

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12222>
(cherry picked from commit 1db36422b9)
2021-08-09 14:46:36 -07:00
Pierre-Eric Pelloux-Prayer
ee5df9e744 radeonsi: don't create an infinite number of variants
If a shader has code like this:

   uniform float timestamp;
   ...
   if (timestamp > 0.0)
      do_something()

And timestamp is modified each frame, we'll end up generating a new
variant per frame.

This commit introduces a hard limit on the number of variants we generate
for a single shader.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5121
Fixes: b7501184b9 ("radeonsi: implement inlinable uniforms")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12138>
(cherry picked from commit 9fe8ae3fcd)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
ccf4743977 util/fossilize_db: Add extra flock mutex.
The flock is per-fd, not per thread, and we do it outside of the main mutex. This was
done to avoid having to wait in the mutex, but we can get a case where one ends up running
the body with the flock unlocked.

Fix this by adding a mutex that doesn't need to be locked for reads.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
(cherry picked from commit 30a359d633)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
07581c4842 util/fossilize_db: Unlock the cache file if the entry already exists.
Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
(cherry picked from commit 75266ee44a)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
7b2a115225 util/fossilize_db: Use uint64_t for file size.
For those 32-bit systems with 4G of cache.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
(cherry picked from commit 1c4dce1aa7)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
ee56d2c88a util/fossilize_db: Only allocate entries after full read.
Should void leaking entries on read failure.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
(cherry picked from commit d2d642cc01)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
8441124d0b util/fossilize_db: Be conservative about header length check for locking.
Don't anticipate seeing any partial written headers but just in case we
should probably wait on the lock to make sure whatever header was being
written is finished being written.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
(cherry picked from commit 96bfefe8d1)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
b2d326fba1 util/fossilize_db: Flush files after header write.
We should probably flush before we unlock the file again.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
(cherry picked from commit 3091277052)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
15df61065d util/fossilize_db: Reset file position to parsed_offset on cache_offset read failure.
Otherwise we might restart reading from the middle of the entry.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
(cherry picked from commit 57ca07455c)
2021-08-09 14:46:36 -07:00
Bas Nieuwenhuizen
8d52e3cd38 util/fossilize_db: Update parsed_offset correctly.
If things went perfectly parsed_offset was never updated for the
final entry and we'd seek_set to the start of the last entry. Is
fun when appending to the file next.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
(cherry picked from commit 3c51a3aa95)
2021-08-09 14:46:36 -07:00
Chia-I Wu
568bbe0dd2 venus: free queues after vkDestroyDevice is emitted
Otherwise, another thread might reuse their object ids for other
objects.  For example,

  T1: free queue with object id X
  T2: reuse id X
  T2: emit vkCreateFoo with id X
  T1: emit vkDestroyDevice

virglrenderer happily accepts that which leads to double frees of the
queue: once when X is updated to point to another object and once when
vkDestroyDevice is executed.  virglrenderer should be fixed to catch
such invalid object id reuse as well.

Fixes
dEQP-VK.api.object_management.multithreaded_shared_resources.device_group.

Fixes: ddd7533055 ("venus: initial support for queue/fence/semaphore")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12252>
(cherry picked from commit da000ea2ef)
2021-08-09 14:46:36 -07:00
Dylan Baker
366abaca17 .pick_status.json: Update to 7ae3881a4b 2021-08-09 14:46:36 -07:00
Dave Airlie
3e228bc8a9 wl/shm: don't fetch formats if not requested.
This aligns the code with the drm format code

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11959>
2021-08-06 18:18:50 +00:00
Charmaine Lee
a7f1ebda2c aux/draw: Check for preferred IR to take nir-to-tgsi path in draw module
When a vertex program is translated to nir, it uses
nir_to_tgsi_compile_options for drivers with only nir-to-tgsi based
NIR support. But this compile option might not be the same as the NIR
compile option from llvmpipe, hence when the nir shader is bound
to the draw module, it hits an assertion in do_alu_action() when
encounters nir_op_fdot3.

With this patch, draw will take the nir-to-tgsi path if preferred IR
from the driver is TGSI.

Fixes assert running Maya on SVGA device.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: 21.2 mesa-stable

(cherry picked from commit 6751d832c5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12200>
2021-08-06 18:00:37 +00:00
Neha Bhende
3fd0ced541 aux/draw: use nir_to_tgsi for draw shader in llvm path
Some drivers doesn't support PIPE_SHADER_CAP_INTEGERS.
This leads to using load_ubo_vec4 which throws llvmpipe off the guard since
it doesn't expect load_ubo_vec4 in shader. Use nir_to_tgsi utility in
such a case.

This fixes crash seen with conform's mustpass.c, select.c and feedback.c.
Also, few gl-select related piglit tests exhibit same crash. Found in vmware's
internal testing

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emma Anholt <emma@anholt.net>

v2: incorporated Emma's comments. Added check for PIPE_SHADER_CAP_INTEGERS and
remove PIPE_SHADER_IR_TGSI check

v3: As per Emma's comment, removed expected crashes for i915 piglit

v4: update expetcted passes

(cherry picked from commit b5e782f5f4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12200>
2021-08-06 18:00:37 +00:00
Timur Kristóf
8d64d80d0a radv: Write RSRC2_GS for NGGC when pipeline is dirty but not emitted.
The radv_emit_ngg_culling_state function won't write the
SPI_SHADER_PGM_RSRC2_GS register when it knows in advance that
radv_emit_graphics_pipeline will overwrite it anyway.

However, there is an unhandled case:

radv_emit_graphics_pipeline will not emit anything (including this
register) when the pipeline is already emitted. Hence, improve
the check in radv_emit_ngg_culling_state to consider this.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12237>
(cherry picked from commit 74181ffcc5)
2021-08-06 10:24:24 -07:00
Pierre-Eric Pelloux-Prayer
57dfde801d st/pbo: set nir_tex_instr::is_array field
Otherwise the layer argument won't be used.

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download shaders. ")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12096>
(cherry picked from commit d2845cfcc4)
2021-08-06 10:24:24 -07:00
Pierre-Eric Pelloux-Prayer
54ba58e68e st/pbo: only use x coord when reading a PIPE_TEXTURE_1D
This fixes the following NIR validation error in the
st/pbo download FS:

	vec2 32 ssa_14 = mov ssa_4.xy
	vec2 32 ssa_15 = f2i32 ssa_14
	vec1 32 ssa_16 = deref_var &tex (uniform sampler1D)
	vec4 32 ssa_17 = (float32)txf ssa_16 (texture_deref), ssa_16 (sampler_deref), ssa_15 (coord)
error: nir_src_num_components(instr->src[i].src) == instr->coord_components (../src/compiler/nir/nir_validate.c:839)

With this change, the FS becomes:

	vec4 32 ssa_2 = intrinsic load_frag_coord () ()
	vec1 32 ssa_3 = f2i32 ssa_2.x
	[...]
	vec1 32 ssa_9 = deref_var &tex (uniform sampler1D)
	vec4 32 ssa_10 = (float32)txf ssa_9 (texture_deref), ssa_9 (sampler_deref), ssa_3 (coord), ssa_0 (lod)

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download shaders. ")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12096>
(cherry picked from commit ff7e339f1f)
2021-08-06 10:24:23 -07:00
Lionel Landwerlin
da56d74a45 anv: don't try to access Android swapchains
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5180
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12217>
(cherry picked from commit bc3c71b87a)
2021-08-06 10:24:22 -07:00
Dylan Baker
8e592e7581 .pick_status.json: Update to 0165fde82c 2021-08-06 10:24:19 -07:00
Chia-I Wu
1014272452 iris, crocus: add idep_genxml to per_hw target dependencies
Fixes

  In file included from ../src/gallium/drivers/iris/iris_query.c:49:
  ../src/gallium/drivers/iris/iris_genx_macros.h:81:10: fatal error: genxml/genX_bits.h: No such file or directory

and

  In file included from ../src/gallium/drivers/crocus/crocus_query.c:50:
  ../src/gallium/drivers/crocus/crocus_genx_macros.h:86:10: fatal error: genxml/genX_bits.h: No such file or directory

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12149>
(cherry picked from commit b4214adefc)
2021-08-05 09:35:29 -07:00
Dylan Baker
a96c2c5d7a bin/gen_release_notes: Fix commits with multiple Closes:
Currently we'd only handle the last one, not all of them. Which is
clearely not correct.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12201>
(cherry picked from commit da00a11bf2)
2021-08-05 09:26:05 -07:00
Dylan Baker
8e3b3f93a7 bin/gen_release_notes: Don't consider issues for other projects
We have enough commits in mesa that have external dependencies that we
need to be sure that a Closes: https://... is actually for mesa and not
for another project.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12201>
(cherry picked from commit 30f7b55e47)
2021-08-05 09:25:52 -07:00
Dylan Baker
d65d0603e3 bin/gen_release_notes: Add basic tests for parsing issues
Since test coverage here is pretty important for a heuristic like this.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12201>
(cherry picked from commit 9dc3672b00)
2021-08-05 09:25:39 -07:00
Michel Dänzer
3cb4a9ec0c ci: Drop "success" job
It was added to make sure every pipeline for a merge request has at
least one job which passes (otherwise it's not possible to merge the
MR). Now the "sanity" job always exists in such pipelines, so this
isn't needed anymore.

Fixes: 4c41d1900e "ci: Add jobs running ci-fairy checks"
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12198>
(cherry picked from commit 6ccf11ac2b)
2021-08-05 09:25:17 -07:00
Mike Blumenkrantz
260d1ecf1e zink: simplify else clause for mem info gathering
it doesn't matter if this is host-visible, it just has to not be device-local

Fixes: 73f6bff07f ("zink: fix mem info query to be more permissive")

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12199>
(cherry picked from commit c886ce2991)
2021-08-05 09:25:16 -07:00
Mike Blumenkrantz
d634d31c32 zink: sum available memory heaps instead of assigning
this is supposed to accumulate now

Fixes: 73f6bff07f ("zink: fix mem info query to be more permissive")

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12199>
(cherry picked from commit 42442a0d4e)
2021-08-05 09:25:16 -07:00
Dylan Baker
77c2a702df .pick_status.json: Update to 6ccf11ac2b 2021-08-05 09:25:13 -07:00
Timur Kristóf
84dde64fd3 aco: Use Navi 10 empty NGG output workaround on NGG culling shaders.
Navi 10 can hang when an NGG workgroup has no output,
so we work around that by always exporting a single zero-area
triangle with a single vertex that has all-NaN coordinates.

Thus far, we only employed this for NGG GS, because on all
other stages, the output can't be empty.

However, with NGG culling, the output can be empty, so let's
apply the same workaround there too.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12169>
(cherry picked from commit 448592b9ae)
2021-08-04 12:08:10 -07:00
Dave Airlie
217ed59b5d virgl: disable anisotropic filtering.
virgl doesn't yet support anisotropic filtering so don't advertise it.

Fixes: a8987b88ff ("virgl: add driver for virtio-gpu 3D (v2)")
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11944>
(cherry picked from commit e831c4a537)
2021-08-04 12:08:09 -07:00
Dylan Baker
a4e7d73f7a .pick_status.json: Update to 8918a809ce 2021-08-04 12:08:03 -07:00
Dylan Baker
e2889fb2d1 docs: Add sha256 sum for 21.2.0 2021-08-04 12:07:28 -07:00
Dylan Baker
33595f88d6 VERSION: bump for 21.2.0 release 2021-08-04 11:47:36 -07:00
Dylan Baker
c0623dbe16 docs: clear new_features for 21.2.0 release 2021-08-04 11:47:19 -07:00
Dylan Baker
2eb92dec11 docs: add release notes for 21.2.0 2021-08-04 11:44:40 -07:00
Lionel Landwerlin
18b65515a6 intel/disasm: fix missing oword index decoding
Also switch to array of strings to show high/low dwords.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: daba2894ff ("intel/disasm: decode/describe more send messages")
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12183>
(cherry picked from commit 97be8e42e4)
2021-08-03 11:07:19 -07:00
Pierre Moreau
ecfa127381 clover/nir: Set constant buffer pointer size to host
The `argument::size` is supposed to represent the size of a pointer on
the host and not on the device (for which argument::target_size`
exists).

v3: Use `sizeof(buf)` instead of `marg.size`. (Francisco Jerez)

Fixes: 7c6f1d3bf9 ("clover/nir: extract constant buffer into its own section")

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10256>
(cherry picked from commit b4e5bf0637)
2021-08-03 11:07:18 -07:00
Pierre Moreau
90645f3eea clover/spirv: Properly size 3-component vector args
This resolves clover returning `CL_INVALID_ARG_SIZE` whenever the OpenCL
CTS called `clSetKernelArg()` for 3-component vectors.

Fixes: 2147386505 ("clover/spirv: Add functions for parsing arguments, linking programs, etc.")

v2: Remove “api/clsetkernelarg/set kernel argument for cl_int3” from the
  expected fails for llvmpipe

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10256>
(cherry picked from commit a6c26a6ad9)
2021-08-03 11:07:17 -07:00
Erik Faye-Lund
432964005b d3d12: split up root parameter update and set
SRV descriptors can require state-transitions before it's legal to set
them on the command-list. We used to just set them right away, and get
away with is, because the validator didn't verify this because we used
to flag the parameters as volatile.

Now that we don't, we trigger validation errors when setting a root
parameter that needs a transition first.

So let's split up the logic a bit, so we can prepare the tables, then do
the transision, and finally set the tables. We do this for all tables
instead of just the SRVs, just because it makes the logic a bit easier to
follow. We leave root constants alone, because they will never require
this, and doing them late would just compilcate things.

Fixes: 1208290558 ("d3d12: Sets all SRV descriptors as data-static")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12187>
(cherry picked from commit cd79351f02)
2021-08-03 11:07:17 -07:00
Juan A. Suarez Romero
a5dec10d83 gallium/hud: initialize query
Most of the drivers don't set up the maximum value in the query info. So
when later hud_pane_set_max_value() is invoked, we are using a rather
"random" number.

Turns out that in some 32bit cases, this random number is big enough
that `leftmost_digit` is 0 because DIV_ROUND_UP() overflows, aborting
with an assertion.

Fixes: c91cf7d7d2 ("gallium: implement a heads-up display module")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12181>
(cherry picked from commit 10541d1fad)
2021-08-03 11:07:16 -07:00
Samuel Pitoiset
1d02d0743d radv: fix missing cache flushes when clearing HTILE levels on GFX10+
The driver should accumulate the cache flush bits because if it uses
CP DMA for clearing the last level, it won't flush.

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12170>
(cherry picked from commit ad83c06a5f)
2021-08-03 11:07:16 -07:00
Samuel Pitoiset
5b4b4b9ef6 radv: fix selecting the first active CU when profiling with SQTT
Fixes: d26bcc0f5c ("radv: always select the first active CU when profiling with SQTT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12167>
(cherry picked from commit ebea075feb)
2021-08-03 11:07:15 -07:00
Timothy Arceri
7deef80ef6 intel/compiler: make sure swizzle is applied to if condition
This fixes a hang in the following piglit test when GCM moves a
UBO load outside of the loop.

tests/shaders/ssa/fs-if-def-else-break.shader_test

The end NIR ends up looking like this:

	vec2 32 ssa_3 = intrinsic load_ubo (ssa_2, ssa_0) (0, 1073741824, 0, 0, 8)
	vec1 32 ssa_4 = mov ssa_3.x
	vec1 32 ssa_5 = inot ssa_3.y
	/* succs: block_1 */
	loop {
           ...
           if ssa_5 { }
        }

Fixes: 1edf67fc3f ("intel/fs: Generate if instructions with inverted conditions")

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
(cherry picked from commit a654e39f15)
2021-08-03 11:07:14 -07:00
Dylan Baker
1a1cf756d2 .pick_status.json: Update to 97be8e42e4 2021-08-03 11:07:12 -07:00
Dave Airlie
58bf0165ca crocus: add support for set alpha to one with blt.
This is ported from 965 and fixes
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.*rebind_tex2d_rgb*

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
(cherry picked from commit 842b8c8965)
2021-08-02 13:30:09 -07:00
Dave Airlie
9fc8ae0cd5 intel/genxml: fix raster operation field in blt genxml
This field should be a uint, further changes on top of previous
ones in this area

Fixes: 4d80ec8fcf ("intel/genxml: fix raster op fields on gen4/5")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
(cherry picked from commit de625dddee)
2021-08-02 13:30:08 -07:00
Dave Airlie
5b99334ba3 crocus/gen45: fix mapping compressed textures
I don't think iris ever hits this path, but probably has the same bug if
it did.

Fixes texsubimage on gfx4 + gfx4.5

Fixes: 5bf6ec31cc ("crocus/gen4: restrict memcpy mapping to gen5")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
(cherry picked from commit c12444ab88)
2021-08-02 13:30:08 -07:00
Yiwei Zhang
76a317170e venus: cache ahb backed buffer memory type bits requirement
To properly init buffer memory requirement for AHB, memory type bits
from dma_buf fd properties need to be masked. However, creating a test
AHB at buffer creation is too costy. This patch caches the ahb backed
buffer memory type bits at device creation time if the app is requesting
AHB extension.

Cc: 21.2 mesa-stable

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12171>
(cherry picked from commit e08960482a)
2021-08-02 13:30:07 -07:00
Lionel Landwerlin
97955560fd drm-shim: implement stat/fstat when xstat variants are not there
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 027095065d ("drm-shim: fix compile with glibc >= 2.33")
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12129>
(cherry picked from commit f86faee9f4)
2021-08-02 13:30:06 -07:00
Michel Zou
149473db82 meson: dont use missing dumpbin path
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Cc: 21.2 mesa-stable
Closes #5142

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12139>
(cherry picked from commit 80160a67ab)
2021-08-02 13:30:04 -07:00