Commit graph

82416 commits

Author SHA1 Message Date
Alejandro Piñeiro
1ff32ae8b2 i965: passthru formats cannot be used width edge flag enabled
Add an assertion to detect this case.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-17 07:34:40 +02:00
Antia Puentes
8b0a334b5e i965: Configure how to store *64*PASSTHRU vertex components
From the Broadwell specification, structure VERTEX_ELEMENT_STATE
description:

   "When SourceElementFormat is set to one of the *64*_PASSTHRU
    formats,  64-bit components are stored in the URB without any
    conversion. In this case, vertex elements must be written as 128
    or 256 bits, with VFCOMP_STORE_0 being used to pad the output
    as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into
    the URB, Component 1 must be specified as VFCOMP_STORE_0 (with
    Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit
    vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0
    in order to output a 256-bit vertex element. Likewise, use of
    R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0
    in order to output a 256-bit vertex element."

Uses 128-bits to write double and dvec2 vertex elements, and 256-bits for
dvec3 and dvec4 vertex elements.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Antia Puentes <apuentes@igalia.com>

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-17 07:34:40 +02:00
Alejandro Piñeiro
71150b73c8 i965: get the proper vertex surface type for doubles on gen8+
This commit adds support for PASSTHRU format when pushing
double-precision attributes.

Check glarray->Doubles in order to know if we should choose a format
that does a conversion to float, or just passthru the 64-bit double.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-17 07:34:40 +02:00
Ilia Mirkin
b1d74e9486 nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 result
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-05-17 01:27:29 -04:00
Timothy Arceri
4fb4fd0b6b glsl: make reserved_varying_slot() static
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-17 15:06:39 +10:00
Timothy Arceri
1d752823af glsl: include per-patch varyings when generating reserved slot bitfield
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-17 15:06:27 +10:00
Timothy Arceri
00441829e7 glsl: don't incorrectly eliminate patches with explicit locations
These varying have a separate location domain from per-vertex varyings
and need to be handled separately.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-17 15:06:21 +10:00
Timothy Arceri
3f477f0ea5 glsl: remove remainings tabs in link_varyings.cpp
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-17 15:06:16 +10:00
Timothy Arceri
6d5f7557fb glsl: fix location and component packing validation on patches
These varyings have a separate location domain from per-vertex varyings
and need to be handled separately.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-17 15:06:12 +10:00
Kenneth Graunke
aae0865dc0 i965: Enable ARB_shader_precision on Gen8+.
I recently fixed a bug in the Piglit tests:
https://lists.freedesktop.org/archives/piglit/2016-May/019802.html

With that patch in place, we pass all the tests.  So, turn it on.

We could probably expose this earlier than Gen8, but the extension
says that OpenGL 4.0 is required, and all of our tests are written
against GLSL 4.00 (which is only supported on Gen8+).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 17:52:45 -07:00
Jose Fonseca
cf010de6ee vl/dri: Move the DRI3 check out of sources include into C.
Fixes SCons build.

Trivial.  Built locally with SCons and autotools.
2016-05-16 21:50:43 +01:00
Leo Liu
5e2072c711 st/vdpau: add dri3 support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
c122c74dca vl/dri3: implement functions for get and set timestamp
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
9f50a79b8f vl/dri3: handle PresentCompleteNotify event
and get timestamp calculated based on the event's reply

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
e8282178ab st/va: add dri3 support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
8d7ac0a4e4 vl/dri3: implement DRI3 BufferFromPixmap
We also need render to the front buffer of temporary X pixmap,
this is the case of when we using opengl as video out for vaapi.
the basic implementation is to pass pixmap ID to X server, and
then X will return dma-buf fd, we will get the buffer object
through this dma-buf fd.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
858b329c2c vl/dri3: add support for resizing
When drawable size changed, PresentConfigureNotify event will be
emitted, by handling the event to re-allocate resized buffer.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
96580ad593 vl/dri3: implement funciton for get dirty area
This will clear presentation area not covered by video content

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
b0bd908284 vl/dri3: implement function for flush frontbuffer
Request drawable content in pixmap by calling DRI3 PresentPixmap,
and handle PresentIdleNotify event.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
e1223282db vl/dri3: add back buffers support
This implements DRI3 PixmapFromBuffer. Create buffer objects, and
associate it to a dma-buf fd, and then pass this fd with a pixmap
ID to X server for creating pixmap object; also add a function
for wait events.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
69ba9be4d2 vl/dri3: implement flushing for queued events
also place holder for present events handling

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
758b1bbaa7 vl/dri3: register present events
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
672e8d5e7e vl/dri3: set drawable geometry
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Leo Liu
12e5220e34 vl/dri3: add DRI3 support and implement create and destroy
Required functions into place for implementation, create screen
with device fd returned from X server, also bail out to DRI2
with certain conditions.

v2: -organize the error out path (Axel)
    -squash previous patch 1 and 2 into one (Emil)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-05-16 16:28:51 -04:00
Dave Airlie
30e437bd76 mesa/version.c: enable cull distance in version check.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-17 06:08:31 +10:00
Ian Romanick
11096ecc39 glsl/linker: Include the interface name for input and output blocks
On my oes_shader_io_blocks branch, this fixes 71
dEQP-GLES31.functional.program_interface_query.* tests.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2016-05-16 11:18:03 -07:00
Ian Romanick
7c11589eb4 glsl/linker: Use canonical format for ARB_program_interface_query spec quotes
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 11:18:03 -07:00
Mark Janes
fd854c1add i965: check tcs for NULL dereference
Coverity issue 1361544 found an instance where the tcs variable is
checked for NULL, but unconditionally dereferenced later in the same
function.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 11:11:11 -07:00
Matt Turner
bf91034d44 i965: Mark is_lossless_compressed_aux UNUSED to silence warning.
Used only in assert().
2016-05-16 11:08:55 -07:00
Matt Turner
1385018a72 genxml: Use llroundf() and store to appropriate type.
Both functions return uint64_t, so I expect the masking/shifting should
be done on 64-bit types.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2016-05-16 11:06:15 -07:00
Matt Turner
4191551262 nir: Mark nir_start_block()/nir_impl_last_block() with returns_nonnull.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 11:06:15 -07:00
Matt Turner
377ab2f2d7 util: Add ATTRIBUTE_RETURNS_NONNULL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 11:06:15 -07:00
Jan Vesely
40c6d54e76 clover: grid_offset should be padded with 0 not 1
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 13:58:14 -04:00
Iago Toral Quiroga
71465179fc i965: Expose OpenGL 4.0 for gen8+
ARB_gpu_shader_fp64 was the only feature missing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:34 +02:00
Iago Toral Quiroga
b1d21e1159 docs: Mark ARB_gpu_shader_fp64 as done for i965/gen8+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
309d285c6b i965: Enable ARB_gpu_shader_fp64 for gen8+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
58f304defe i965/tes/scalar: Fix load input for doubles
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
61197b8d5d i965/tcs/scalar: fix store output for doubles
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
cda3435ea8 i965/tcs/scalar: fix load input for doubles
v2: do not write to the original indirect_offset since that is
    an expression that could be used somewhere else (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
66192b3c16 i965/fs: fix nir_intrinsic_store_output for doubles
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
3cce67aff0 i965/fs: fix number of output components for doubles
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
0297f1021a i965/vec4: handle doubles in type_size_vec4()
The scalar backend uses this to check URB input sizes.

v2: Removed redundant break after return (Curro)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
8c6d147373 i965/fs: support doubles with shared variable stores
This is pretty much the same we do with SSBOs.

v2: do not shuffle in-place, it is not safe since the original 64-bit data
    could be used after the write, instead use a temporary like we do
    for SSBO stores (Iago)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
943f9442bf i965/fs: support doubles with ssbo stores
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
b9aa66aa51 i965/fs: add shuffle_64bit_data_for_32bit_write helper
This does the inverse operation of shuffle_32bit_load_result_to_64bit_data
and we will use it when we need to write 64-bit data in the layout expected
by untyped write messages.

v2 (curro):
- Use subscript() instead of stride()
- Assert on the input types rather than silently retyping.
- Use offset() instead of horiz_offset(), drop the multiplier definition.
- Drop the temporary vgrf and force_writemask_all.
- Make component_i const.
- Move to brw_fs_nir.cpp

v3 (curro):
- Pass dst and src by reference.
- Simplify allocation of tmp register.
- Move to brw_fs_nir.cpp.
- Get rid of the temporary.

v3 (Iago):
- Check that the src and dst regions do not overlap, since that would
  typically be a bug in the caller.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
33f7ec18ac i965/fs: support doubles with SSBO loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
8aa01ac596 i965/fs: support doubles with shared variable loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
6eab06b866 i965/fs: Add do_untyped_vector_read helper
We are going to need the same logic for anything that reads
doubles via untyped messages (CS shared variables and SSBOs). Add a
helper function with that logic so that we can reuse it.

v2:
- Make this a static function instead of a method of fs_visitor (Iago)
- We only support types with a size of 4 or 8 (Curro)
- Avoid retypes by using a separate vgrf for the packed result (Curro)
- Put dst parameter before source parameters (Curro)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
b86d4780ed i965/fs: support doubles with UBO loads
UBO loads with constant offset use the UNIFORM_PULL_CONSTANT_LOAD
instruction, which reads 16 bytes (a vec4) of data from memory. For dvec
types this only provides components x and y. Thus, if we are reading
more than 2 components we need to issue a second load at offset+16 to
read the next 16-byte chunk with components w and z.

UBO loads with non-constant offset emit a load for each component
in the vector (and rely in CSE to fix redundant loads), so we only
need to consider the size of the data type when computing the offset
of each element in a vector.

v2 (Sam):
- Adapt the code to use component() (Curro).

v3 (Sam):
- Use type_sz(dest.type) in VARYING_PULL_CONSTANT_LOAD() call (Curro).
- Add asserts to ensure std140 vector alignment rules are followed
  (Curro).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00
Iago Toral Quiroga
58f1804c4f i965/fs: fix pull constant load component selection for doubles
UNIFORM_PULL_CONSTANT_LOAD is used to load a contiguous vec4 starting at a
constant offset that is 16-byte aligned. If we need to access an unaligned
offset we emit a load with an aligned offset and use the remaining constant
offset to select the component into the vec4 result that we are interested
in. This component must be computed in units of the type size, since that
is what fs_reg::set_smear expects.

This patch does this change in the two places where we use this message:
In demote_pull_constants when we lower uniform access with constant offset
into the pull constant buffer and in UBO loads with constant offset.

v2 (Sam):
- Fix set_smear() in fs_visitor::lower_constant_loads(), take into account
source type instead and remove MAX2 (Curro).
- Improve changes to nir_intrinsic_load_ubo case in nir_emit_intrinsic()
(Curro).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-05-16 09:55:33 +02:00