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i965/fs: fix pull constant load component selection for doubles

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UNIFORM_PULL_CONSTANT_LOAD is used to load a contiguous vec4 starting at a
constant offset that is 16-byte aligned. If we need to access an unaligned
offset we emit a load with an aligned offset and use the remaining constant
offset to select the component into the vec4 result that we are interested
in. This component must be computed in units of the type size, since that
is what fs_reg::set_smear expects.

This patch does this change in the two places where we use this message:
In demote_pull_constants when we lower uniform access with constant offset
into the pull constant buffer and in UBO loads with constant offset.

v2 (Sam):
- Fix set_smear() in fs_visitor::lower_constant_loads(), take into account
source type instead and remove MAX2 (Curro).
- Improve changes to nir_intrinsic_load_ubo case in nir_emit_intrinsic()
(Curro).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
This commit is contained in:
Iago Toral Quiroga 2016-01-18 13:09:31 +01:00 • committed by Samuel Iglesias Gonsálvez
parent 71fd4942d1
commit 58f1804c4f
2 changed files with 5 additions and 11 deletions
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3
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -2249,7 +2249,8 @@ fs_visitor::lower_constant_loads()
inst->src[i].file = VGRF;
inst->src[i].nr = dst.nr;
inst->src[i].reg_offset = 0;
inst->src[i].set_smear(pull_index & 3);
inst->src[i].set_smear((pull_index & 3) * 4 /
type_sz(inst->src[i].type));
brw_mark_surface_used(prog_data, index);
}

13
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
View file

@ -3382,17 +3382,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
bld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, packed_consts,
surf_index, const_offset_reg);
for (unsigned i = 0; i < instr->num_components; i++) {
packed_consts.set_smear(const_offset->u32[0] % 16 / 4 + i);
const fs_reg consts = byte_offset(packed_consts, const_offset->u32[0] % 16);
/* The std140 packing rules don't allow vectors to cross 16-byte
* boundaries, and a reg is 32 bytes.
*/
assert(packed_consts.subreg_offset < 32);
bld.MOV(dest, packed_consts);
dest = offset(dest, bld, 1);
}
for (unsigned i = 0; i < instr->num_components; i++)
bld.MOV(offset(dest, bld, i), component(consts, i));
}
break;
}