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i965: Configure how to store *64*PASSTHRU vertex components
From the Broadwell specification, structure VERTEX_ELEMENT_STATE
description:
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in the URB without any
conversion. In this case, vertex elements must be written as 128
or 256 bits, with VFCOMP_STORE_0 being used to pad the output
as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into
the URB, Component 1 must be specified as VFCOMP_STORE_0 (with
Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit
vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element. Likewise, use of
R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element."
Uses 128-bits to write double and dvec2 vertex elements, and 256-bits for
dvec3 and dvec4 vertex elements.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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1 changed files with 35 additions and 0 deletions
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@ -217,6 +217,41 @@ gen8_emit_vertices(struct brw_context *brw)
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break;
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}
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/* From the BDW PRM, Volume 2d, page 586 (VERTEX_ELEMENT_STATE):
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*
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* "When SourceElementFormat is set to one of the *64*_PASSTHRU
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* formats, 64-bit components are stored in the URB without any
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* conversion. In this case, vertex elements must be written as 128
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* or 256 bits, with VFCOMP_STORE_0 being used to pad the output
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* as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red
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* component into the URB, Component 1 must be specified as
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* VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE)
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* in order to output a 128-bit vertex element, or Components 1-3 must
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* be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
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* element. Likewise, use of R64G64B64_PASSTHRU requires Component 3
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* to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
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* element."
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*/
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if (input->glarray->Doubles) {
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switch (input->glarray->Size) {
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case 0:
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case 1:
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case 2:
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/* Use 128-bits instead of 256-bits to write double and dvec2
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* vertex elements.
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*/
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comp2 = BRW_VE1_COMPONENT_NOSTORE;
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comp3 = BRW_VE1_COMPONENT_NOSTORE;
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break;
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case 3:
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/* Pad the output using VFCOMP_STORE_0 as suggested
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* by the BDW PRM.
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*/
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comp3 = BRW_VE1_COMPONENT_STORE_0;
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break;
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}
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}
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OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
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GEN6_VE0_VALID |
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(format << BRW_VE0_FORMAT_SHIFT) |
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