Commit graph

195497 commits

Author SHA1 Message Date
Lionel Landwerlin
c0cfd16da6 anv: move input coverage mask setup to runtime flush
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37060>
2025-08-28 19:08:33 +00:00
Antonio Ospite
b39046b9ba radv: fix building with libdrm as a submodule
Some checks are pending
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When building with libdrm as an internal fallback dependency, i.e.
a submodule, meson does not find `amdgpu.h` from the installed external
dep, failing to build with the following error:

-----------------------------------------------------------------------
In file included from ../src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c:10:
In file included from ../src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h:18:
../src/amd/common/ac_linux_drm.h:14:10: fatal error: 'amdgpu.h' file not found
   14 | #include "amdgpu.h"
      |          ^~~~~~~~~~
1 error generated.
-----------------------------------------------------------------------

Make libvulkan_radeon depend explicitly on dep_libdrm_amdgpu to also use
the include_directories declared for that dependency in case it's an
internal dependency.

Acked-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36932>
2025-08-28 18:08:20 +00:00
Antonio Ospite
18ef7b82c6 radv: don't include amdgpu.h directly
Don't include amdgpu.h directly in AMDGPU/RADV code, the only libdrm
pieces that are needed are handled in src/amd/common/ac_linux_drm.h
which already includes amdgpu.h

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36932>
2025-08-28 18:08:20 +00:00
Samuel Pitoiset
4022b5c94a radv: bind the vertex input state like a normal dynamic state
This is much cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
2f7e8751ea radv: replace an assertion with a check when emitting VS prolog
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
d29087d353 radv: use the dynamic state to store vertex input state
This is also a dynamic state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
d48096aed4 radv: remove unused parameter to radv_pipeline_init_dynamic_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:25 +00:00
Samuel Pitoiset
3eed98d122 radv: move VBO misaligned/unaligned info to radv_vertex_input_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:25 +00:00
Samuel Pitoiset
53ce957983 radv: move radv_vertex_input_state to radv_pipeline_graphics.h
Like other similar states that are shared between graphics pipeline
and command buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
d7f401c2bb radv: bind the vertex binding strides like a normal dynamic state
This is much cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
9a5c540b75 radv: use the dynamic state to store vertex binding strides
This is a dynamic state. This also replaces the stride by a 16-bit
value because it's required to not exceed
VkPhysicalDeviceLimits::maxVertexInputBindingStride which is defined
to 2048.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
9597a3c13f radv: only update vertex stride if pStrides is non-NULL when binding VBO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:23 +00:00
Mike Blumenkrantz
b1d07ae43a zink: enable single-aspected blitting of mixed z/s formats
not sure anyone supports this, but zink should handle it alright

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:52 +00:00
Mike Blumenkrantz
e83c7f2912 zink: always flush clears when doing single-aspect blit to avoid data loss
if doing e.g., clear(DEPTH|STENCIL) -> blit(DEPTH), the stencil clear would
previously have been discarded

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:52 +00:00
Mike Blumenkrantz
817077276a zink: also set msrtss stencil
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:51 +00:00
Rob Clark
807644b864 freedreno/a6xx: Drop VPC table magic
It is a bit annoying to have the resulting increased duplication, but
the table magic doesn't play nicely with variant regs.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
0f2f247f91 freedreno: Name a few events
And add them to the gpu_event helper so we don't need to open-code these
packets.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
77c42c1a57 freedreno/registers: Make TPL1_BICUBIC_WEIGHTS_TABLE an array
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
acde75ba4e freedreno/registers: Prep for upcoming things
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
16ca19d6f9 freedreno/registers: Move descriptor related enums
These are mostly the same for a8xx.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
611e47ddeb freedreno/registers: Cleanup the bin_cntl's
Factor out a common bitset.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
a84069cff4 freedreno/registers: De-open-code some offsets
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
fd93414496 freedreno/registers: Add implicit reg32 for empty arrays
Registers declared as a "naked" array, ie:

  <array offset="0x1234" name="SOME_REG" stride="1" .../>

were not getting register packers generated for them.  Insert an
implicit <reg32> child for them, so the above would be equivalent
to:

  <array offset="0x1234" name="SOME_REG" stride="1" .../>
    <reg32 offset="0" name="REG"/>
  </array>

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
622c6a1315 freedreno/registers: Fix variant ranges
When we have a variant range, we need to test against the inclusive
range.  Ie. if we have variants="A6XX-A7XX" we can't just test for
chip == A6XX.

So switch the variant key to preserve the range (ie. "A6XX-A7XX" instead
of just "A6XX"), add a helper to sanitize the range for symbol/#define
names, and handle the three possible cases when generating the if/else
ladder:

  - single variant, ie. variants="A6XX", keeps the current logic
  - open ended range, ie. variants="A6XX-", generates a >=
  - closed ended range, ie. variants="A6XX-A7XX", generates a
    (CHIP >= A6XX) && (CHIP <= A7XX)

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
2967337f2d freedreno/computerator: Convert to variant reg packers
And drop -DFD_NO_DEPRECATED_PACK

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
f4ca0093d5 freedreno/a6xx: Convert to variant reg packers
Convert the builders and drop the -DFD_NO_DEPRECATED_PACK

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
b3ac37c515 freedreno/registers: Generate variant builder always
Even if there is only a single variant currently.  This will allow
porting code to use the new builders independently from adding new
hw support.  Basically avoiding churny conflicty changes on a branch
during bringup.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
ae8907f270 freedreno/registers: Add a way to disable deprecated warnings
Intended for temporarily disabling the warnings when bringing up a new
gen.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
85cb5cef2a freedreno/drm-shim: Handle GET/SET_METADATA
We could actually pretend to implement this.. but ignoring them is good
enough.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
6fe310416f freedreno/decode: lua support for <stripe>
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
52738a5545 freedreno/decode: Fix ufixed/fixed decode of bitset fields
We need to copy over the radix value.  Also add missing xyzvalid fields,
although they do not appear to be used anywhere.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
f31883c20c freedreno/registers: pm4 cleanup
Use <stripe> to handle 32b vs 64b gpu differences.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Danylo Piliaiev
065d2547e7 ir3: Add EOLM and EOGM a7xx flags to NOP
Apparently the ignored bits have meaning.
- EOLM - Is set on a NOP after the last cat6 instruction.
         Must be set outside of control flow including preambles.
         Doesn't seem to affect correctness.
- EOGM - Is set on a NOP after the last cat5/cat6 instruction.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Philipp Zabel
0e6b24451d rusticl: Fix hidden lifetime warnings
Some checks are pending
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Fix the following warning, and others that are similar, as rustc
suggests:

warning: hiding a lifetime that's elided elsewhere is confusing
   --> ../src/gallium/frontends/rusticl/mesa/compiler/nir.rs:282:22
    |
282 |     pub fn variables(&mut self) -> ExecListIter<nir_variable> {
    |                      ^^^^^^^^^     -------------------------- the same lifetime is hidden here
    |                      |
    |                      the lifetime is elided here
    = help: the same lifetime is referred to in inconsistent ways, making the signature confusing
    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
help: use `'_` for type paths
    |
282 |     pub fn variables(&mut self) -> ExecListIter<'_, nir_variable> {
    |                                                 +++

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37059>
2025-08-28 16:39:53 +00:00
Karol Herbst
26c1ded905 nak: use ldsm
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:14 +02:00
Dave Airlie
c38170452d nir: add nir_intrinsic_cmat_load_shared_nv
This maps to NAK's OpLdsm

Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:07 +02:00
Karol Herbst
016159096f nak/hw_runner: add ldsm tests
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:03 +02:00
Karol Herbst
ad8df8407e nak/hw_runner: support shared memory
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:03 +02:00
Mary Guillemard
0e1761ccbe nak: add Ldsm
v2: Clean up (Karol)

Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:08:36 +02:00
Karol Herbst
05dca16143 nak: extract nir_intrinsic_cmat_load lowering into a function
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:07:21 +02:00
Mike Blumenkrantz
1d3f52f78f zink: fixes for flushing clears
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
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* immediately terminate renderpass after flushing
this otherwise could persist and trigger a bad state where the
zsbuf is eliminated

* no-op if already in renderpass
this function can be called from within a renderpass, at which time
it should do nothing because clears will be flushed automatically

Fixes: 5de34e47ad6 ("zink: unify/fix clear flushing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37052>
2025-08-28 13:32:53 +00:00
Rob Clark
b82e49f644 drirc: Work around ANGLE brokeness
ANGLE is completely broken on certain vendors, see
https://issues.angleproject.org/u/1/issues/431097618

Work around this by spoofing gl vendor.

Cc: mesa-stable
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36540>
2025-08-28 12:59:52 +00:00
Yonggang Luo
51f2314640 d3d10umd: Fixes gcc warning: enumeration value 'D3D11_SB_OPERAND_TYPE_FUNCTION_BODY' not handled in switch [-Wswitch]
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
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Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37040>
2025-08-28 08:55:04 +00:00
Arkadiusz Hiler
8abfd26534 wsi/display: Avoid connector reprobes in wsi_GetRandROutputDisplayEXT
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
Wine uses vkGetRandROutputDisplayEXT to query some GPU details on start
of a prefix that have to be exposed on the PE side.

Currently this causes minimum of 2 connector reprobes via
DRM_IOCTL_MODE_GETCONNECTOR. This can stall vblanks when timed just
right. In cases where prefixes are started over and over again (e.g.
Steam doing background processing) this causes periodic noticable
stutter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37026>
2025-08-28 07:26:52 +00:00
Georg Lehmann
38e32e39a9 aco: never end wqm early for vmem
The remaining cases where disable_wqm isn't set are either uniform loads
or loads that influence control flow. In the first case, not ending WQM early
is free, and in the second case it's likely still better to not block scheduling.

Foz-DB GFX1201:
Totals from 483 (0.60% of 80287) affected shaders:
MaxWaves: 12654 -> 12642 (-0.09%)
Instrs: 485234 -> 484830 (-0.08%); split: -0.19%, +0.11%
CodeSize: 2630876 -> 2629184 (-0.06%); split: -0.15%, +0.08%
VGPRs: 29980 -> 30004 (+0.08%)
Latency: 4908015 -> 4813167 (-1.93%); split: -1.95%, +0.02%
InvThroughput: 751059 -> 748582 (-0.33%); split: -0.35%, +0.02%
VClause: 8723 -> 8705 (-0.21%); split: -0.30%, +0.09%
SClause: 11085 -> 10986 (-0.89%); split: -1.45%, +0.56%
Copies: 25155 -> 25183 (+0.11%); split: -0.26%, +0.37%
Branches: 6203 -> 6204 (+0.02%)
PreSGPRs: 23763 -> 23780 (+0.07%)
VALU: 296576 -> 296593 (+0.01%); split: -0.01%, +0.02%
SALU: 49095 -> 49416 (+0.65%); split: -0.04%, +0.69%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:04 +00:00
Georg Lehmann
3d190f2e9c aco: implement skip_helpers for load_global_amd
Foz-DB GFX1201:
Totals from 119 (0.15% of 80287) affected shaders:
Instrs: 212449 -> 213452 (+0.47%)
CodeSize: 1120656 -> 1124708 (+0.36%)
Latency: 2854370 -> 2855772 (+0.05%); split: -0.02%, +0.07%
InvThroughput: 586142 -> 586210 (+0.01%); split: -0.00%, +0.01%
VClause: 3556 -> 3656 (+2.81%)
SClause: 2708 -> 2710 (+0.07%)
Copies: 14410 -> 14509 (+0.69%)
PreSGPRs: 6810 -> 6850 (+0.59%); split: -0.12%, +0.70%
VALU: 135945 -> 135942 (-0.00%); split: -0.01%, +0.01%
SALU: 22147 -> 23121 (+4.40%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:04 +00:00
Georg Lehmann
ee7069f875 aco: implement skip_helpers for load_scratch
Foz-DB GFX1201:
Totals from 2 (0.00% of 80287) affected shaders:
Instrs: 4016 -> 4054 (+0.95%)
CodeSize: 22104 -> 22256 (+0.69%)
Latency: 17123 -> 17129 (+0.04%)
Copies: 406 -> 415 (+2.22%)
SALU: 323 -> 353 (+9.29%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:04 +00:00
Georg Lehmann
2bfd8918a5 aco: implement skip_helpers for load_ssbo/ubo/constant
Foz-DB GFX1201:
Totals from 6676 (8.32% of 80287) affected shaders:
Instrs: 8786161 -> 8829091 (+0.49%); split: -0.01%, +0.50%
CodeSize: 47141800 -> 47320480 (+0.38%); split: -0.01%, +0.39%
VGPRs: 376624 -> 376600 (-0.01%)
SpillSGPRs: 1251 -> 1250 (-0.08%)
Latency: 99716626 -> 99642361 (-0.07%); split: -0.11%, +0.04%
InvThroughput: 14893179 -> 14898323 (+0.03%); split: -0.01%, +0.04%
VClause: 149425 -> 153539 (+2.75%); split: -0.04%, +2.79%
SClause: 251247 -> 251842 (+0.24%); split: -0.06%, +0.30%
Copies: 580304 -> 586424 (+1.05%); split: -0.21%, +1.26%
Branches: 163014 -> 163013 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 356548 -> 357109 (+0.16%); split: -0.18%, +0.33%
VALU: 5149733 -> 5149797 (+0.00%); split: -0.00%, +0.00%
SALU: 1082176 -> 1122718 (+3.75%); split: -0.06%, +3.80%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:03 +00:00
Georg Lehmann
bdae511b18 aco: implement skip_helpers for image loads
Foz-DB GFX1201:
Totals from 5 (0.01% of 80287) affected shaders:
Instrs: 1406 -> 1417 (+0.78%)
CodeSize: 8012 -> 8056 (+0.55%)
Latency: 7279 -> 7282 (+0.04%)
Copies: 84 -> 85 (+1.19%)
SALU: 170 -> 180 (+5.88%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:02 +00:00
Georg Lehmann
bf453a7c6a aco/isel: add init_disable_wqm helper
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36785>
2025-08-28 06:29:01 +00:00