Commit graph

32650 commits

Author SHA1 Message Date
Marek Olšák
cceb916456 radeonsi: use f32_0 and f32_1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
1516059ab1 radeonsi: fold *gallivm
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
e1b83c67da radeonsi: lp_type::length is always 1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
906ee3a3ba radeonsi: don't use bld.elem_type
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
723a23905f radeonsi: don't use lp_build_const_*
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
b4600b4740 radeonsi: use ctx->ac.context and ctx->types
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
d0751f6c1f radeonsi: use ctx->ac.builder
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
82dc72c8bd radeonsi: use ctx->i/f32 types more
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
dcbd3d470c radeonsi: use i32_0 and i32_1 more
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
bacdf5a928 radeonsi: use bitcast in a few places
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
ad7305aa96 radeonsi: use ac helpers for bitcasts
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
dbe16d7537 radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
44993bd26f radeonsi: use si_get_indirect_index for TEMP indexing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
e986a16c16 radeonsi: use si_get_indirect_index for CONST indexing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
212c612a63 tgsi/ureg: allow any register file in address operands
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
41b85158ab gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
cb686a340f tgsi/scan: scan address operands (v2)
v2: set swizzled usage mask

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
37714c6df2 tgsi/scan: set correct usage mask for tex offsets in scan_src_operand
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
5cc779197c tgsi/scan: take advantage of already swizzled usage mask in scan_src_operand
It has always been a usage mask *after* swizzling.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
ea85b76519 tgsi/scan: set non-valid src_index for tex offsets in scan_src_operand
tex offsets are not "Src" operands.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
be3ab867bd tgsi: implement tgsi_util_get_inst_usage_mask properly
All opcodes are handled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
bb8abc10bf tgsi: add docs for some existing pack opcodes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Daniel Stone
bbe2082e7d broadcom: Fix out-of-tree build include path
Reviewed-by: Eric Anholt <eric@anholt.net>
Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
2017-10-05 15:03:11 -07:00
Derek Foreman
17d78ece36 broadcom/vc4: Don't advertise tiled dmabuf modifiers if we can't use them
If the DRM_VC4_GET_TILING ioctl isn't present then we can't tell
if a dmabuf bo is tiled or linear, so will always assume it's
linear.

By not advertising tiled formats in this situation we ensure the
assumption is correct.

This fixes a bug where most attempts to render a gl wayland client
under weston will result in a client side abort.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com> (on irc)
2017-10-05 11:26:14 -07:00
Ben Crocker
1359af930e gallivm/ppc64le: allow environmental control of Altivec code generation
In check_os_altivec_support(), allow control of Altivec (first PPC vector
instruction set) code generation via a new environmental control,
GALLIVM_ALTIVEC, which is expected to take on a value of 1 or 0.
The default is to enable Altivec code generation.

This environmental control of Altivec code generation is initially
available only #ifdef DEBUG.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2017-10-05 02:14:14 +02:00
Ben Crocker
e93f056a4e gallivm/ppc64le: adjust VSX code generation control.
In lp_build_create_jit_compiler_for_module(), advance the minimum
version of LLVM for VSX code generation to 4.0; this is the minimum
revision at which several known VSX code generation bugs are fixed:

  https://llvm.org/bugs/show_bug.cgi?id=25503 (fixed in 3.8.1)
  https://llvm.org/bugs/show_bug.cgi?id=26775 (fixed in 3.8.1)
  https://llvm.org/bugs/show_bug.cgi?id=33531 (fixed in 4.0)

An llc performance bug introduced in LLVM 4.0,

  https://llvm.org/bugs/show_bug.cgi?id=34647

is still pending as of LLVM 5.0, but only has a pronounced effect on
one of the Piglit tests: ext_transform_feedback-max-varyings.

All changes tested via Piglit.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2017-10-05 02:13:47 +02:00
Ben Crocker
5c75f0c8bb gallivm: allow additional llc options
In init_native_targets, allow the passing of additional options to
the LLC compiler via new GALLIVM_LLC_OPTIONS environmental control.
This option is available only #ifdef DEBUG, initially.
At top, add #include <llvm-c/Support.h> for LLVMParseCommandLineOptions()
declaration.

v2: Fix compile error with old llvm versions (sroland)

Cc: "17.2" <mesa-stable@lists.freedesktop.org>

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-10-05 02:06:46 +02:00
Ben Crocker
3a9feb4db8 gallivm: fix typo in debug_printf message
In gallivm_compile_module, fix a typo in the
debug_printf("Invoke as \"llc ..." message.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-10-05 01:48:37 +02:00
Leo Liu
409491e778 st/va: add RGB support to vlVaPutSurface
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-04 09:22:33 -04:00
Leo Liu
0fa950ecd3 st/va: don't re-allocate interlaced buffer with pakced format
It caused corruption, when vlVaPutImage putting raw data to the fields

v2: add RGB formats since it got uploaded here as well

Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-04 09:22:33 -04:00
Leo Liu
327480d10f st/vdpau: don't re-allocate interlaced buffer with packed YUV format
It caused corruption, when vlVdpVideoSurfacePutBitsYCbCr putting YUV to the fields

Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-04 09:22:33 -04:00
Brian Paul
33122e8a3d llvmpipe: silence 'variable may be used uninitialized' warnings
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-10-03 14:33:00 -06:00
Brian Paul
980fe46d72 svga: wrap long comments in svga_tgsi_vgpu10.c
Trivial.
2017-10-03 12:07:05 -06:00
Brian Paul
362fb05b65 svga: tweak pre-VGPU10 rasterization offsets
It seems there's no perfect x/y biases for line drawing to satisfy all
applications.  Depending on the biases, either real apps produce results
similar to VGPU10 while Piglit's gl-1.0-ortho-pos fails, or vice versa.

Let's lean toward real applications (Solidworks, SolidEdge, Google Earth)
over Piglit.

Using (-0.5, -0.5) for points, lines and triangles, seems to generally
work well.

We don't seem to have these issues with VGPU10.

Tested with Piglit and CAD-oriented apitraces.  See VMware bugs 1775498
and 1905053.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-10-03 12:07:05 -06:00
Brian Paul
3e39abf6a0 svga: if we get nr_samples==1, store nr_samples=0
We need to be more careful not to treat nr_samples=1 as an msaa surface.
This patch prevents us from errantly declaring an MSAA shader resource
with 1 sample.

No Piglit regressions, fixes the above-described errors.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2017-10-03 12:07:05 -06:00
Charmaine Lee
3c71c42827 svga: emit sampler constants only if sampler view exists
It is possible to have holes in the shader emitter's sampler_target array.
0 sampler_target does not necessarily mean there is no sampler view
specified since texture buffer target has the value 0.
With this patch, a sampler_view array is added to the shader emitter structure
to specify if there is a sampler view for each texture unit. Only if there
is a sampler view, we will emit constant for texcoord scale factor or texture
buffer size for that sampler view.

Fixes a rendering issue with Turbine after commit 1020e960440.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-10-03 12:07:05 -06:00
Brian Paul
b7c08e5081 svga: fix incorrect case in svga_typeless_format()
For the case of SVGA3D_X32_G8X24_UINT we incorrectly returned
SVGA3D_R32_FLOAT_X8X24.  We should return SVGA3D_R32G8X24_TYPELESS.

Note that we never actually use SVGA3D_X32_G8X24_UINT so this has
no impact.

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-10-03 12:07:05 -06:00
Brian Paul
cbe72ae598 svga: add typeless switch cases in svga_typeless_format()
We sometimes pass typeless formats to this function.  By adding switch
cases we avoid the "Unexpected format XXX in svga_typeless_format"
warning messages.  No functional change.

No Piglit regressions, no above-mentioned warning messages.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-10-03 12:07:05 -06:00
Neha Bhende
9a7d42b71c svga: Allow sRGB format with PIPE_BIND_DISPLAY_TARGET binding flag on vgpu10.
This patch allows to use sRGB formats for DISPLAY_TARGET on vgpu10.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-10-03 12:07:05 -06:00
Wladimir J. van der Laan
df6b320a83 etnaviv: Set up unknown GC3000 states
Set up new states that the blob started setting for GC3000 consistently.

This makes sure that when another test or driver leaves the GPU in
unpredictable state, these states are set up correctly for our
rendering.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-10-03 19:52:07 +02:00
Wladimir J. van der Laan
a2132fbd79 etnaviv: Fix point sprite rendering on GC3000
Setting PA_VIEWPORT_UNK state correctly is necessary to make point sprite
rendering on GC3000 work.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-10-03 19:51:52 +02:00
Wladimir J. van der Laan
ec254f4bfa etnaviv: Add support for DP2 instruction
A two-component dot product instruction is supported with HALTI2, use it
on hardware that supports it.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-10-03 19:49:47 +02:00
Wladimir J. van der Laan
80f608b530 etnaviv: Support opcodes with bit 6 set in assembler
Support opcodes with bit 6 set in assembler, and assert that only ops
0x00..0x7f are used.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-10-03 19:49:38 +02:00
George Kyriazis
a8e4a0f609 gallium/u_tests: fix ifdef for sync_file fences
include libsync.h only when libdrm is compiled in

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-10-03 11:50:48 -05:00
Matt Turner
c17c47207b mesa: Remove force_s3tc_enable driconf variable
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-10-02 19:41:22 -07:00
Matt Turner
dc546a7bb3 gallium: Remove util_format_s3tc_init()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-10-02 19:41:22 -07:00
Matt Turner
3a8a5e77e8 gallium: Remove util_format_s3tc_enabled
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-10-02 19:41:22 -07:00
Marek Olšák
d50ead53b8 gallium/u_tests: test sync_file fences
This should be sufficient for testing all kernel/libdrm/radeonsi codepaths
that are used by radeonsi.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-03 01:27:18 +02:00
Rob Clark
7f3eab03fe freedreno/a5xx: fix missing restore state
RB_CLEAR_CNTL seems to be in a funny state after boot (at least on
8x96/a530).

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-10-02 13:17:15 -04:00
Emil Velikov
21e271024d swr/rast: do not crash on NULL strings returned by getenv
The current convenience function GetEnv feeds the results of getenv
directly into std::string(). That is a bad idea, since the variable
may be unset, thus we feed NULL into the C++ construct.

The latter of which is not allowed and leads to a crash.

v2: Better variable name, implicit char* -> std::string conversion (Eric)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101832
Fixes: a25093de71 ("swr/rast: Implement JIT shader caching to disk")
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: Laurent Carlier <lordheavym@gmail.com>
Cc: Bernhard Rosenkraenzer <bero@lindev.ch>
[Emil Velikov: make an actual commit from the misc diff]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Reviewed-by: Laurent Carlier <lordheavym@gmail.com> (v1)
2017-10-02 16:19:13 +01:00