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radeonsi: use f32_0 and f32_1

Browse source 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-09-29 16:49:14 +02:00
parent 1516059ab1
commit cceb916456
4 changed files with 26 additions and 26 deletions
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28
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1657,14 +1657,14 @@ void si_load_system_value(struct si_shader_context *ctx,
LLVMValueRef coord[4] = {
LLVMGetParam(ctx->main_fn, ctx->param_tes_u),
LLVMGetParam(ctx->main_fn, ctx->param_tes_v),
bld->zero,
bld->zero
ctx->ac.f32_0,
ctx->ac.f32_0
};
/* For triangles, the vector should be (u, v, 1-u-v). */
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_TES_PRIM_MODE] ==
PIPE_PRIM_TRIANGLES)
coord[2] = lp_build_sub(bld, bld->one,
coord[2] = lp_build_sub(bld, ctx->ac.f32_1,
lp_build_add(bld, coord[0], coord[1]));
value = lp_build_gather_values(&ctx->gallivm, coord, 4);
@ -2076,7 +2076,7 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
val[chan] = LLVMBuildFAdd(builder, val[chan],
LLVMBuildSelect(builder,
LLVMBuildFCmp(builder, LLVMRealOGE,
val[chan], base->zero, ""),
val[chan], ctx->ac.f32_0, ""),
LLVMConstReal(ctx->f32, 0.5),
LLVMConstReal(ctx->f32, -0.5), ""), "");
val[chan] = LLVMBuildFPToSI(builder, val[chan], ctx->i32, "");
@ -2452,7 +2452,6 @@ static void si_llvm_export_vs(struct lp_build_tgsi_context *bld_base,
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct si_shader *shader = ctx->shader;
struct lp_build_context *base = &bld_base->base;
struct ac_export_args pos_args[4] = {};
LLVMValueRef psize_value = NULL, edgeflag_value = NULL, layer_value = NULL, viewport_index_value = NULL;
unsigned pos_idx;
@ -2501,10 +2500,10 @@ static void si_llvm_export_vs(struct lp_build_tgsi_context *bld_base,
pos_args[0].done = 0; /* last export? */
pos_args[0].target = V_008DFC_SQ_EXP_POS;
pos_args[0].compr = 0; /* COMPR flag */
pos_args[0].out[0] = base->zero; /* X */
pos_args[0].out[1] = base->zero; /* Y */
pos_args[0].out[2] = base->zero; /* Z */
pos_args[0].out[3] = base->one; /* W */
pos_args[0].out[0] = ctx->ac.f32_0; /* X */
pos_args[0].out[1] = ctx->ac.f32_0; /* Y */
pos_args[0].out[2] = ctx->ac.f32_0; /* Z */
pos_args[0].out[3] = ctx->ac.f32_1; /* W */
}
/* Write the misc vector (point size, edgeflag, layer, viewport). */
@ -2520,10 +2519,10 @@ static void si_llvm_export_vs(struct lp_build_tgsi_context *bld_base,
pos_args[1].done = 0; /* last export? */
pos_args[1].target = V_008DFC_SQ_EXP_POS + 1;
pos_args[1].compr = 0; /* COMPR flag */
pos_args[1].out[0] = base->zero; /* X */
pos_args[1].out[1] = base->zero; /* Y */
pos_args[1].out[2] = base->zero; /* Z */
pos_args[1].out[3] = base->zero; /* W */
pos_args[1].out[0] = ctx->ac.f32_0; /* X */
pos_args[1].out[1] = ctx->ac.f32_0; /* Y */
pos_args[1].out[2] = ctx->ac.f32_0; /* Z */
pos_args[1].out[3] = ctx->ac.f32_0; /* W */
if (shader->selector->info.writes_psize)
pos_args[1].out[0] = psize_value;
@ -3331,7 +3330,6 @@ static void si_export_mrt_color(struct lp_build_tgsi_context *bld_base,
bool is_last, struct si_ps_exports *exp)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
int i;
/* Clamp color */
@ -3341,7 +3339,7 @@ static void si_export_mrt_color(struct lp_build_tgsi_context *bld_base,
/* Alpha to one */
if (ctx->shader->key.part.ps.epilog.alpha_to_one)
color[3] = base->one;
color[3] = ctx->ac.f32_1;
/* Alpha test */
if (index == 0 &&

18
src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
View file

@ -40,7 +40,7 @@ static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value,
bld_base->base.zero, "");
ctx->ac.f32_0, "");
}
/* Or the conditions together */
@ -52,7 +52,7 @@ static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
emit_data->arg_count = 1;
emit_data->args[0] = LLVMBuildSelect(builder, conds[0],
LLVMConstReal(ctx->f32, -1.0f),
bld_base->base.zero, "");
ctx->ac.f32_0, "");
}
static void kil_emit(const struct lp_build_tgsi_action *action,
@ -144,7 +144,7 @@ static void emit_cmp(const struct lp_build_tgsi_action *action,
LLVMValueRef cond, *args = emit_data->args;
cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealOLT, args[0],
bld_base->base.zero, "");
ctx->ac.f32_0, "");
emit_data->output[emit_data->chan] =
LLVMBuildSelect(ctx->ac.builder, cond, args[1], args[2], "");
@ -175,7 +175,7 @@ static void emit_set_cond(const struct lp_build_tgsi_action *action,
pred, emit_data->args[0], emit_data->args[1], "");
emit_data->output[emit_data->chan] = LLVMBuildSelect(ctx->ac.builder,
cond, bld_base->base.one, bld_base->base.zero, "");
cond, ctx->ac.f32_1, ctx->ac.f32_0, "");
}
static void emit_fcmp(const struct lp_build_tgsi_action *action,
@ -372,9 +372,9 @@ static void emit_ssg(const struct lp_build_tgsi_action *action,
cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->dbl_bld.zero, "");
val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->dbl_bld.elem_type, -1), "");
} else { // float SSG
cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->base.zero, "");
val = LLVMBuildSelect(builder, cmp, bld_base->base.one, emit_data->args[0], "");
cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->base.zero, "");
cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], ctx->ac.f32_0, "");
val = LLVMBuildSelect(builder, cmp, ctx->ac.f32_1, emit_data->args[0], "");
cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, ctx->ac.f32_0, "");
val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(ctx->f32, -1), "");
}
@ -710,13 +710,15 @@ static void emit_rsq(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef sqrt =
lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT,
emit_data->args[0]);
emit_data->output[emit_data->chan] =
lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV,
bld_base->base.one, sqrt);
ctx->ac.f32_1, sqrt);
}
static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,

4
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
View file

@ -1318,7 +1318,7 @@ static void tex_fetch_args(
}
if (opcode == TGSI_OPCODE_TXP)
coords[3] = bld_base->base.one;
coords[3] = ctx->ac.f32_1;
/* Pack offsets. */
if (has_offset &&
@ -1446,7 +1446,7 @@ static void tex_fetch_args(
for (chan = num_src_deriv_channels;
chan < num_dst_deriv_channels; chan++)
derivs[param * num_dst_deriv_channels + chan] =
bld_base->base.zero;
ctx->ac.f32_0;
}
}

2
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
View file

@ -1098,7 +1098,7 @@ static void if_emit(const struct lp_build_tgsi_action *action,
cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealUNE,
emit_data->args[0],
bld_base->base.zero, "");
ctx->ac.f32_0, "");
if_cond_emit(action, bld_base, emit_data, cond);
}