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radeonsi: use i32_0 and i32_1 more
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
bacdf5a928
commit
dcbd3d470c
2 changed files with 13 additions and 11 deletions
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@ -134,7 +134,7 @@ static void emit_ucmp(const struct lp_build_tgsi_action *action,
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LLVMValueRef arg0 = ac_to_integer(&ctx->ac, emit_data->args[0]);
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LLVMValueRef v = LLVMBuildICmp(builder, LLVMIntNE, arg0,
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bld_base->uint_bld.zero, "");
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ctx->i32_0, "");
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emit_data->output[emit_data->chan] =
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LLVMBuildSelect(builder, v, emit_data->args[1], emit_data->args[2], "");
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@ -360,6 +360,7 @@ static void emit_ssg(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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LLVMBuilderRef builder = bld_base->base.gallivm->builder;
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LLVMValueRef cmp, val;
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@ -370,9 +371,9 @@ static void emit_ssg(const struct lp_build_tgsi_action *action,
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cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, "");
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val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int64_bld.elem_type, -1, true), "");
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} else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
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cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int_bld.zero, "");
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val = LLVMBuildSelect(builder, cmp, bld_base->int_bld.one, emit_data->args[0], "");
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cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int_bld.zero, "");
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cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], ctx->i32_0, "");
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val = LLVMBuildSelect(builder, cmp, ctx->i32_1, emit_data->args[0], "");
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cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, ctx->i32_0, "");
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val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int_bld.elem_type, -1, true), "");
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} else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) {
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cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->dbl_bld.zero, "");
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@ -482,6 +483,7 @@ static void emit_bfi(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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LLVMValueRef bfi_args[3];
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@ -492,9 +494,9 @@ static void emit_bfi(const struct lp_build_tgsi_action *action,
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bfi_args[0] = LLVMBuildShl(builder,
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LLVMBuildSub(builder,
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LLVMBuildShl(builder,
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bld_base->int_bld.one,
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ctx->i32_1,
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emit_data->args[3], ""),
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bld_base->int_bld.one, ""),
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ctx->i32_1, ""),
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emit_data->args[2], "");
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bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
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@ -548,6 +550,7 @@ static void emit_lsb(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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LLVMValueRef args[2] = {
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@ -573,7 +576,7 @@ static void emit_lsb(const struct lp_build_tgsi_action *action,
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emit_data->output[emit_data->chan] =
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LLVMBuildSelect(builder,
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LLVMBuildICmp(builder, LLVMIntEQ, args[0],
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bld_base->uint_bld.zero, ""),
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ctx->i32_0, ""),
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lp_build_const_int32(gallivm, -1), lsb, "");
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}
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@ -415,11 +415,11 @@ si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
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result = LLVMBuildInsertElement(builder,
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result,
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ac_to_integer(&ctx->ac, ptr),
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bld_base->int_bld.zero, "");
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ctx->i32_0, "");
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result = LLVMBuildInsertElement(builder,
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result,
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ac_to_integer(&ctx->ac, ptr2),
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bld_base->int_bld.one, "");
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ctx->i32_1, "");
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return bitcast(bld_base, type, result);
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}
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@ -1131,8 +1131,7 @@ static void uif_emit(const struct lp_build_tgsi_action *action,
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LLVMValueRef cond;
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cond = LLVMBuildICmp(gallivm->builder, LLVMIntNE,
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ac_to_integer(&ctx->ac, emit_data->args[0]),
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bld_base->int_bld.zero, "");
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ac_to_integer(&ctx->ac, emit_data->args[0]), ctx->i32_0, "");
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if_cond_emit(action, bld_base, emit_data, cond);
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}
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