Commit graph

64894 commits

Author SHA1 Message Date
Matt Turner
b7d50beea4 i965/cfg: Add functions to test if a block is a successor/predecessor.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-08-22 10:23:33 -07:00
Eric Anholt
e51e20c35e vc4: Add support for fragment discards.
Fixes piglit glsl-fs-discard-01 and -03, and allows a lot of mesa demos to
start running.  glsl-fs-discard-02 has a problem where the first tile is
not getting stored on the first render.
2014-08-22 10:16:58 -07:00
Eric Anholt
0f894b2795 vc4: Make some helpers for setting condition codes in instructions. 2014-08-22 10:16:58 -07:00
Eric Anholt
cc68be2620 vc4: Avoid using undefined values when there's no color write.
The simulator assertion fails when you read-before-write a temporary
value, and there's no point in doing the packing if there was no color
written.
2014-08-22 10:16:58 -07:00
Eric Anholt
ae83955b1d vc4: Emit the scoreboard wait just when it's needed.
This should improve performance on real hardware by allowing more shader
instances to run in parallel.  It also fixes assertion failures in tests
that don't emit a fragment color, since otherwise we didn't have enough
instructions to fit our signals in.
2014-08-22 10:16:58 -07:00
Eric Anholt
c3c922289b vc4: Fix FLR for integer values less than 0.
If we didn't truncate at all, then we don't need to fix for truncation
happening in the wrong direction.

Fixes piglit builtin-functions/*-floor-*
2014-08-22 10:16:57 -07:00
Eric Anholt
2ab4e48f94 vc4: Fix totally broken assertions about inter-instruction reg conflicts.
The spec citation talked about A and B, and I proceeded to pay no
attention to whether the waddrs were for A or B.  As a result, this pair
of instructions would claim to conflict:

mov ra4, ra4 ; nop nop, r0, r0
mov.ns ra4, rb4 ; nop nop, r0, r0
2014-08-22 10:16:57 -07:00
Eric Anholt
b064c9103d vc4: Add support for all the texture and FBO formats we can.
Now that tiling is in place, we can expose the other formats.  Depth is
still broken (need to make changes in the shader), but if you don't expose
it things crash all over.  SNORM is dropped, but we could re-add it later
with some shader fixes to handle converting between [0,1] and [-1,1].
2014-08-22 10:16:57 -07:00
Eric Anholt
3a1efcc7f9 vc4: Add support for texture tiling.
This still treats everything as RGBA8888 for the most part, same as
before.  This is a prerequisite for handling other texture formats, since
only RGBA8888 has a raster-layout mode.
2014-08-22 10:16:57 -07:00
Eric Anholt
1b6dcaf40c vc4: Fix a typo in the validation for miplevels.
It meant that LUMALPHA was being marked as *many* miplevels, and
unsurprisingly wouldn't validate.  On the other hand, some miplevel counts
wouldn't get the small mips validated at all.
2014-08-22 10:16:57 -07:00
Eric Anholt
74ea87cde4 vc4: Convert to using an enum for texture data types 2014-08-22 10:16:57 -07:00
Eric Anholt
1cb5cfba85 vc4: Stop complaining about unknown texture channel types.
It doesn't matter to this code -- the sampler always returns 8-bit unorm
rgba.
2014-08-22 10:16:57 -07:00
Eric Anholt
b0a1e401a9 vc4: Include stdio/stdlib in headers so I don't have to include it per file.
There are a few tools I want to have always available, and fprintf() and
abort() are among them.
2014-08-22 10:16:57 -07:00
Matt Turner
d77f5603a5 i965: Fix JIP/UIP calculations.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82846
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82929
2014-08-22 09:30:03 -07:00
Aaron Watry
2a553e4dc9 st/clover: Change platform name from Default to Clover
Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2014-08-22 10:02:31 -05:00
Emil Velikov
e7f2f2dea5 dri/radeon: nuke the remaining references to sarea
Remainder of the dri1 times.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-08-21 21:47:44 +01:00
Emil Velikov
515ffb6c93 dri/radeon: cleanup the radeon_context vtbl
Remove the set-but-unused, and set-but-empty vtable entries.
Most likely a leftover from the dri1 days.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-08-21 21:47:40 +01:00
Emil Velikov
dd46f0926d include: move sarea.h next to it's only user
The header is used by DRI1 drivers, which we've removed a while
back. Now only the dri1 loader in libGL is using it, so let's
move it in src/glx, and prefix it accordingly.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-08-21 21:47:37 +01:00
Emil Velikov
7550a24fa6 dri/radeon: drop obsolete radeon_{dri,macros}.h headers
Both have been unused for at least a couple of years.
For example the last user of radeon_macros.h was removed with

commit 8c11f0a883
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Oct 14 13:27:02 2011 -0700

    radeon: Drop the legacy BO manager code.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-08-21 21:47:22 +01:00
Vinson Lee
1748ea8b2b SCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.
Fix SCons build error introduced with commit
3fe7daec14.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
2014-08-21 12:22:18 -07:00
Connor Abbott
06ef631573 glsl/linker: pass through the is_intrinsic flag
This flag was set to true for the atomic counter intrinsics, but it
never got plumbed through the linker, so by the time it got to the
backends it would always be set to the false. The current i965 backend
code doesn't use is_intrinsic, so this should not change any existing
code, but it's useful for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
2014-08-21 11:46:13 -07:00
Carl Worth
619505ac7c docs: Update instructions for creating a release
This captures all of the steps I have been following in making releases for
the past year or so. This way, the instructions should be sound for anyone who
would like to take over the release process going forward.
2014-08-21 10:46:02 -07:00
Roland Scheidegger
eb4541ebaf llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition
This change will double cache size for branches which have a lower
LP_MAX_SHADER_VARIANTS limit (it will not do anything on master).
The reason is that nowadays shaders tend to be quite a bit larger than they
were (they were big when llvmpipe didn't have a fs loop, got much smaller with
that loop, and since then have gradually increased quite a bit though still
smaller than without the fs loop for various reasons - among them being d3d10
compliance, usage of 8-wide vectors, non-swizzled blend code). Thus effectively
less shaders would be cached (unless they were very small and the variant limit
was hit first). Also, since we're getting rid of the IR nowadays, the cached
shaders shouldn't need all that much memory actually.
2014-08-21 19:00:29 +02:00
Carl Worth
399b4e2227 docs: Add my notes on stable-branch patch criteria
This captures the set of rules I have been using for stable-branch management,
(starting with a discussion on the mesa-dev mailing list on July 2013, and
then refined through my own experience of performing stable-branch releases
since then).
2014-08-21 09:46:57 -07:00
Carl Worth
46d03d37bf Makefile: Switch from md5sums to sha256sums
We switched to these several stable releases ago, (since the MD5 algorithm has
been broken for some time), but only now did I get around to fixing this in
the Makefile rather than just performing this step manually.

CC: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-08-21 09:05:01 -07:00
Jon TURNEY
3fe7daec14 glx: Fix build since 679c2ef "glx/drisw: add support for DRI2rendererQueryExtension", when only building drisw renderer
v2:
- Move dri*_query_renderer_* into their respective dri*_priv.h headers
- Drop then unnneeded include of dri2.h from dri2_query_renderer.c
- Rename dri2_query_renderer.c as dri_common_query_renderer.c, as it's contents
now are used for more than dri[23]

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-08-21 16:59:48 +01:00
Carl Worth
ea565108ae Increment version to 10.4.0-devel
Now that the 10.3 branch has been created
2014-08-21 08:38:24 -07:00
Alex Deucher
153df68834 radeonsi: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2014-08-21 11:16:15 -04:00
Alex Deucher
f50b6b4895 radeonsi: add new CIK pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2014-08-21 11:13:17 -04:00
Glenn Kennard
0fb221065e r600g: Fix flat/smooth shade state toggle
If only the flat/smooth shade state changed between
two render calls the prior code would miss updating the
hardware state.

Also add check for sprite coord, potentially same type
of issue otherwise for it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81967
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-08-21 16:20:38 +02:00
Tom Stellard
bf7a60f41d r600g/compute: Don't initialize vertex_buffer_state masks to 0x2
cs_vertex_buffer_state.enabled_mask and
cs_vertex_buffer_state.dirty_mask are both updated when
r600_set_constant_buffer() is called, so we don't need to manually
update these values.

This fixes a crash with OpenCL programs that have a kernel with no
arguments.

https://bugs.freedesktop.org/show_bug.cgi?id=82671

CC: "10.2" <mesa-stable@lists.freedesktop.org>
2014-08-21 06:12:12 -07:00
Tom Stellard
a9f0b08bac r600g/compute: Use the first parameter in evergreen_set_global_binding() 2014-08-21 06:12:12 -07:00
Tom Stellard
43d954342e pipe-loader: Fix memory leak v2
v2:
  - Change driver_name to char*

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
CC: "10.2" <mesa-stable@lists.freedesktop.org>
2014-08-21 06:12:12 -07:00
Tom Stellard
8109664ded radeon: Add work-around for missing Hainan support in clang < 3.6 v2
v2:
  - Add missing break.

https://bugs.freedesktop.org/show_bug.cgi?id=82709

CC: "10.2" <mesa-stable@lists.freedesktop.org>
2014-08-21 06:12:11 -07:00
Michel Dänzer
3ba225c1ab st/clover: Fix build against LLVM SVN >= r215967 v2
v2: Tom Stellard
  - Properly destroy the Module

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2014-08-21 07:55:23 -04:00
Kenneth Graunke
d682ebec0b i965,meta: Stop unlocking the texture to try and prevent deadlocks.
Unlocking the texture is not safe: another thread could come in and grab
it.  Now that we use a recursive mutex, this should work.  This also fixes
texture lock deadlocks in the new meta fast clear path.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
2014-08-20 17:31:19 -07:00
Kenneth Graunke
0871028188 mesa: Use a recursive mutex for the texture lock.
This avoids problems with things like meta operations calling functions
that want to take the lock while the lock is already held.  Basically,
the point is to guard against API reentrancy across threads...not to
guard against ourselves.

Dave Airlie opposed this change, but it makes master usable again and no
one proposed a better solution.  We can revert this if/when someone
does.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
2014-08-20 17:31:19 -07:00
Carl Worth
f90b7e0f2b glcpp: Fix glcpp-test-cr-lf "make check" test for Mac OS X
There were two problems with the way this script used sed on OS X:

  1. The OS X sed doesn't interpret "\r" in a replacement list as a
     carriage-return character, (instead it was inserting a literal
     'r' character).

     We fix this by putting an actual ^M character into the source of
     the script, (rather than a two-character escape sequence hoping
     for sed to do the right thing).

  2. When generating the test files with LF-CR ("\n\r") newlines, the
     OS X sed was adding an undesired final newline ("\n") at the end
     of the file. We avoid this by first using sed to add the ^M
     before the newlines, then using tr to swap the \r and \n
     characters. This way, sed never sees any lines ending with
     anything but \n, so it doesn't get confused and doesn't add any
     bogus extra newlines.

Tested-by: Vinson Lee <vlee@freedesktop.org>

Vinson's testing confirmed that this patch fixes FreeBSD as well.
2014-08-20 16:42:46 -07:00
Carl Worth
c09a8b0e3b glcpp: Use printf instead of "echo -n" in glcpp-test
I noticed that with /bin/sh on Mac OS X, "echo -n" does not work as
desired, (it actually prints "-n" rather than suppressing the final
newline). There is a /bin/echo that could be used (it actually works)
instead of the builtin echo.

But I decided it's more robust to just use printf rather than
hardcoding /bin/echo into the script.
2014-08-20 16:41:38 -07:00
Matt Turner
04895f5c60 i965/vec4: Allow reswizzling writemasks when swizzle is single-valued.
total instructions in shared programs: 4288033 -> 4266151 (-0.51%)
instructions in affected programs:     930915 -> 909033 (-2.35%)
2014-08-20 13:01:18 -07:00
Jon TURNEY
bde2a62af7 Teach os_get_total_physical_memory about Cygwin
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-08-20 17:18:39 +01:00
Michel Dänzer
cd765cf7ee r300g: Fix path to test programs for out-of-tree builds
Fixes make check in that case.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-08-20 16:12:51 +09:00
Vinson Lee
c04a6d5c29 gallivm: Fix build with LLVM >= 3.6 r215967.
This LLVM 3.6 commit changed EngineBuilder constructor.

commit 3f4ed32b4398eaf4fe0080d8001ba01e6c2f43c8
Author: Rafael Espindola <rafael.espindola@gmail.com>
Date:   Tue Aug 19 04:04:25 2014 +0000

    Make it explicit that ExecutionEngine takes ownership of the modules.

    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967 91177308-0d34-0410-b5e6-96231b3b80d8

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2014-08-20 15:24:44 +09:00
Timothy Arceri
a1853eaea7 glsl: Use the without_array predicate in some more places
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
2014-08-19 17:44:06 -07:00
Kristian Høgsberg
e6a53533b7 i965: Flush the RC and TC before doing a fast clear resolve
The docs say "When performing a render target resolve, PIPE_CONTROL with end
of pipe sync must be delivered.", which doesn't actually tell us whether we
need to do it before or after.  Blorp did it before and after, and doing it
before certainly makes sense.  The resolve operation needs to read from the
MCS and if we don't flush the render cache it won't get up-to-date data.

On the other hand, doing it after should not be necessary, since we call
brw_render_cache_set_check_flush() after the resolve.

Fixes rendering corruption in kwin's cover switch effect and various steam
games.

Missing flush spotted by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2014-08-19 17:21:39 -07:00
Carl Worth
8791cfedde docs: Import 10.2.6 release notes, add news item. 2014-08-19 15:21:09 -07:00
Chris Forbes
1c4f141a54 docs: Mark off ARB_conditional_render_inverted for i965
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-08-20 07:49:17 +12:00
Chris Forbes
06ca96daad i965: Enable ARB_conditional_render_inverted on Gen6+.
The extension requires GL 3.0, so enable on just the generations
exposing that.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-08-20 07:49:17 +12:00
Chris Forbes
3f8ad32627 mesa: Add support for inverted s/w conditional rendering
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-08-20 07:49:17 +12:00
Matt Turner
9a071e3339 i965/vec4: Add a pass to reduce swizzles.
total instructions in shared programs: 4344280 -> 4288033 (-1.29%)
instructions in affected programs:     397468 -> 341221 (-14.15%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-08-19 12:37:11 -07:00