Similar to nir_ssa_dest_init, but with fewer call sites to churn through.
This was done with the help of Coccinelle:
@@
expression A, B, C, D;
@@
-nir_ssa_dest_init_for_type(A, B, C, D);
+nir_ssa_dest_init_for_type(A, B, C);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23078>
Since 624e799cc3 ("nir: Drop nir_ssa_def::name and nir_register::name"), SSA
defs don't have names, making the name argument unused. Drop it from the
signature and fix the call sites. This was done with the help of the following
Coccinelle semantic patch:
@@
expression A, B, C, D, E;
@@
-nir_ssa_dest_init(A, B, C, D, E);
+nir_ssa_dest_init(A, B, C, D);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23078>
Include the expected and actual values in the errors -- since
very frequently we care about them to diagnose issues.
Since these helpers are meant to be inlined, also pull the
failure code out of the way into a separate function (not meant to
be inlined). This way, extra calls to to_string will not harm
the existing client code size. Verified this with GCC release build.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22977>
Most of the compressed writes are tracked by the driver, for
instances :
- blorp writes
- render target writes
But we don't have any tracking for storage images (which have gained
compression support on DG2+). So inspect the layout transition and
when we see a layout/access that can do writes outside of our driver
tracking, update the image state tracking.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8946
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22988>
Fix issue by handling the OpString instructions when walking through
the preamble for validation.
The gl_spirv_validation() creates a vtn_builder() and walks the
instructions looking for a subset of the information. However
our current way to walk the instructions will also perform tracking
of OpLine/OpNoLine, that may make references to OpString instructions
that were being previously ignored by gl_spirv_validation().
This would cause the parsing to fail.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9004
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22973>
It make sense to enable CS stall so that it guarantees that the fast
clear will start after tile cache flush has completed.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23063>
Not doing so all the reads/writes go to the scratch page on i915.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f9fa09ec92 ("anv/image: Add ANV_IMAGE_MEMORY_BINDING_PRIVATE")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22957>
0x5698 is now reserved for future use
From Matt Roper in linux
3a38be31ec82 ("drm/i915/dg2: Drop one PCI ID")
Fixes: 65c9a810ee ("intel/pci_ids: Add dg2 0x5698 pci-id")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22985>
In copy to buffer region, set dest rect to region size.
The rectangle must be block size adjusted in case of block compressed
format.
Fix test: dEQP-VK.api.copy_and_blit.core.image_to_buffer.regions
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
The transfer command "struct pvr_transfer_cmd" has support for
features not used by Vulkan: colour key, pattern, rop blit and
alpha blending
The whole "struct pvr_transfer_blit" can be removed. Also all code
related to transfer alpha blending can be removed.
This is an optimisation and doesn't fix any dEQP tests.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
The mask should be inverted.
Fixes tests in dEQP-VK.api.copy_and_blit.* using the texel unwind workaround.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
Fix the rectangle mappings used with texel unwind workaround (unaligned address).
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
The byte unwind workaround can be used when source texture virtual
address doesn't meet HW requirements (is unaligned) and the pixel
format can't be changed i.e. destination is compressed. If
destination texture is not compressed the simpler texel extend
workaround can be used.
Currently byte unwind workaround has bugs so removing the
workaround fixes tests in
dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests.* when they
instead use texel extend workaround.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
The rectangles in "struct pvr_rect_mapping" are unsigned so a
flipped rectangle mapping isn't possible. Add new struct members
flip_x and flip_y to specify flipped mapping.
Add support for flipped rectangles in transfer copy blit path.
Support for flipped rectangles in the clip blit path is not done
in this change.
The new booleans are false by default because transfer command
"struct pvr_transfer_cmd" is zeroed on allocation in
pvr_transfer_cmd_alloc (pvr_blit.c).
Fixes:
dEQP test case: dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests
.mirror_xy.nearest
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
Block compressed formats with 3d twiddled memory layout not supported.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
Twiddled surfaces don't use stride but printing info about ignored
stride is not useful on debug driver.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
The swizzle of pipe formats is described in
"struct util_format_description". The struct has array
"unsigned char swizzle[4];". The index of the array is the colour
channel (in the order R, G, B and A). The value is what position
the colour channel is sourced from.
In PBE register settings (REG_SWIZ_CHAN[0-3]) the register index is
output channel position (and not colour). The colours are in the PBE
source channels - SWIZ_SOURCE_CHAN0 typically red.
The function pvr_get_pbe_hw_swizzle doesn't translate the swizzle
correctly. Remove function and replace with switch for each colour.
This could be done in a for loop, but there is just as much code
in the loop, it involves pointers and it's less readable for humans.
That's why I opted for this implementation.
Fixed test:
dEQP-VK.api.copy_and_blit.core.image_to_image
.all_formats.color.2d.r4g4b4a4_unorm_pack16.b4g4r4a4_unorm_pack16
and other with this pixel format.
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
this makes all the structs have the same baseline members for
resources and aniso_filter_table.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
