Commit graph

23921 commits

Author SHA1 Message Date
Eric Anholt
afc981ee46 intel: Update Mesa state before span setup in glReadPixels.
We could have mapped the wrong set of draw buffers.  Noticed while looking
into a DRI2 glean ReadPixels issue.
2009-06-19 22:17:46 -07:00
Eric Anholt
dcfe0d66bf intel: Move intel_pixel_read.c to shared for use with i965. 2009-06-19 22:16:16 -07:00
Eric Anholt
3b08a43f32 intel: Don't map regions with drm_intel_gem_bo_map_gtt() unless they're tiled.
This fixes a regression in region read performance that came in with the
texture tiling changes.  Ideally we'd have an access flag coming in so we
could also use bo_map_gtt for writing, like we do for buffer objects.

Bug #22190
2009-06-19 17:25:20 -07:00
Eric Anholt
405300bb19 intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.
Fixes oglconform zbfunc.c and pxtrans-cidraw.c, at least.
2009-06-19 16:43:45 -07:00
Eric Anholt
64edde1004 intel: Fix glClear behavior versus display lists.
The CALL_DrawArrays was leaking the clear's primitives into the display
list with GL_COMPILE_AND_EXECUTE.  Use _mesa_DrawArrays instead, which
doesn't appear to leak.  Fixes piglit dlist-clear test.
2009-06-19 16:43:45 -07:00
Eric Anholt
396b4043f0 mesa: Make VBO dlist printing use the same path as other dlist printing.
I was rather confused when mesa_print_display_list didn't show any of
my glBegin()..glEnd().  Nothing but print_list appears to call
this function, so matching its behavior seems like a good idea.
2009-06-19 16:43:45 -07:00
Chia-I Wu
cca30245bd intel: Do not access pbo's buffer directly when attaching.
pbo might be system buffer based or attached to another region.  Call
intel_bufferobj_buffer to make sure pbo has a buffer of its own.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Chia-I Wu
ed91389618 intel: Data are copied in the wrong direction when breaking COW tie.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Chia-I Wu
1a7ec317ef intel: Fix migration from sys_buffer in intel_bufferobj_buffer.
intel_bufferobj_subdata is called to migrate data from sys_buffer, and
it expects only one of buffer or sys_buffer is non-NULL.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Roland Scheidegger
402df41c1c radeon: make cubemap mipmap generation work
need to pass target parameter to radeon_teximage/radeon_subteximage functions
otherwise mipmap generation for cube maps can't work (assert/segfault in
_mesa_generate_mipmap)
2009-06-20 00:28:39 +02:00
Roland Scheidegger
7a5c5b9af3 demos: make cubemap work without EXT_fbo support
use SGIS_generate_mipmap if EXT_fbo support (for manual mipmap generation)
is not available.
2009-06-20 00:28:38 +02:00
Michel Dänzer
dd26899ca3 intel: Fixups for 'mesa: create/destroy buffer objects via driver functions'.
Initialize all driver function hooks before calling _mesa_initialize_context(),
and handle all buffer objects in intel_buffer_object().

Fixes assertion failure when running glxinfo.
2009-06-19 23:55:55 +02:00
Roland Scheidegger
4d2b392a0a radeon: fix cube maps for non-mm path
drm cmd checker would refuse cube emits
also fix an issue in the cs path which would calculate the register
offset off by one dword.
Only same testing done as original code (none except compile tested).
2009-06-19 22:56:32 +02:00
Brian Paul
fa5b81ea8b st/mesa: restore some parameter checking buffer object functions
These functions may be called from the VBO code (not just user GL calls)
so do some parameter sanity checking.
2009-06-19 14:43:55 -06:00
Roland Scheidegger
ffae82da4c r200: fix cube maps for non-mm path
drm cmd checker rightfully fell over any cube emit
2009-06-19 22:32:06 +02:00
Brian Paul
e90d6a3cbf i965: initial code for loops in vertex programs 2009-06-19 12:19:33 -06:00
Brian Paul
fd7d764514 i965: asst clean-ups, etc in brw_vs_emit() 2009-06-19 12:19:33 -06:00
Brian Paul
752204d362 i965: asst clean-ups, var renaming in brw_wm_emit_glsl() 2009-06-19 12:19:33 -06:00
Brian Paul
9d029e0e20 st/mesa: remove redundant st_buffer_object::size field and error checks
Just use the gl_buffer_object::Size field.  Remove unnecessary size/offset
error checks.  Core Mesa will have already done these checks before these
functions are called.
2009-06-19 12:19:15 -06:00
Brian Paul
1ffd074436 st/mesa: no longer special-case buffer object 0 in st_buffer_object() cast wrapper
Since commit 6629a35559 "mesa: create/destroy
buffer objects via driver functions" this is no longer needed, and actually
was causing a crash during context tear-down.
2009-06-19 12:13:15 -06:00
Roland Scheidegger
7ce814b25f radeons: use dp4 for position invariant vertex programs
Fixes #22181. R200 requires this since DP4 is used in hw tnl mode.
R300 prefers it (should be faster due to no instruction dependencies), but
both methods should be correct (when sw tcl is used though, MUL/MAD might
be faster). Probably doesn't make much difference for R100 since vertex progs
are executed in software anyway, but let's just keep it the same there too.
2009-06-19 20:01:14 +02:00
Brian Paul
a8da1feb23 mesa: make query-related driver fallback functions static
Plug them in via _mesa_init_query_object_functions().
2009-06-19 10:05:08 -06:00
Brian Paul
331eb58f68 mesa: make buffer object-related driver fallback functions static
Plug them in via _mesa_init_buffer_object_functions().
2009-06-19 10:00:03 -06:00
Brian Paul
6629a35559 mesa: create/destroy buffer objects via driver functions 2009-06-19 09:58:51 -06:00
Brian Paul
e164210f65 i965simple: use u_reduced_prim() function 2009-06-19 09:48:43 -06:00
Brian Paul
d2e4643767 draw: use u_reduced_prim() function 2009-06-19 09:45:23 -06:00
Brian Paul
09da78c235 softpipe: use u_reduced_prim() 2009-06-19 09:42:37 -06:00
Brian Paul
157d52143a gallium/util: s/boolean/unsigned/ 2009-06-19 09:39:56 -06:00
Brian Paul
b0b8832e6f softpipe: whitespace, reformatting 2009-06-19 09:38:12 -06:00
Brian Paul
9038b6c8bb Merge branch 'ext-provoking-vertex'
Conflicts:

	docs/relnotes-7.6.html
	progs/tests/Makefile
	src/gallium/drivers/softpipe/sp_prim_vbuf.c
	src/glx/x11/indirect.c
	src/mesa/glapi/Makefile
	src/mesa/glapi/dispatch.h
	src/mesa/glapi/glapioffsets.h
	src/mesa/glapi/glapitable.h
	src/mesa/glapi/glapitemp.h
	src/mesa/glapi/glprocs.h
	src/mesa/main/dlist.c
	src/mesa/main/enums.c
	src/mesa/sparc/glapi_sparc.S
	src/mesa/x86-64/glapi_x86-64.S
	src/mesa/x86/glapi_x86.S
2009-06-19 09:15:34 -06:00
Brian Paul
0ddc4dbe43 draw: use flatfirst variable 2009-06-18 23:00:37 -06:00
Brian Paul
9205a871e7 draw: remove debug code 2009-06-18 22:51:41 -06:00
Brian Paul
af5fff9c23 draw: fix first provoking vertex mode for quads, quad strips and polygons 2009-06-18 22:48:51 -06:00
Brian Paul
950171be3c draw: fix first provoking vertex mode for unfilled quads 2009-06-18 22:47:46 -06:00
Brian Paul
601065f153 mesa: fix first provoking vertex mode for unfilled tri strips 2009-06-18 22:45:57 -06:00
Brian Paul
c70a529d7c draw: clean up indentation 2009-06-18 18:33:29 -06:00
Thomas Hellstrom
0342229289 gallium dri st: Probe the driver for supported surface formats.
This is done when constructing the fbconfigs, and the result is saved
for window system framebuffer creation.

Note: For dri2 the server needs to have an identical format selection
logic. Otherwise the dri state-tracker and the xorg driver (state-tracker)
will disagree on which format to use for the attachments. Some more work
is needed in this area.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2009-06-17 03:07:01 +02:00
Thomas Hellstrom
c9f19571da mesa driconf: Add macro to specify an option with a quoted default value.
The default values true and false will expand to "1" and "0" when
gcc -std=c99, causing bool option defaults to generate runtime failures.

One solution is to specify bool option defaults quoted as "true" and "false".
Add a macro to assist this.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2009-06-17 03:07:00 +02:00
Jakob Bornecrantz
edbec6b112 progs/rbug: Add small program to add block rules 2009-06-18 14:36:19 +02:00
Eric Anholt
3addc4e307 i965: Add decode for the G4X x,y offset in surface state. 2009-06-17 21:01:48 -07:00
Eric Anholt
6c3f696891 i965: Fix up texture layout for small things with wide pitches (tiled)
We were packing according to the pitch, while the hardware appears to base
it on the base level width.

With this and the previous commit, fbo-cubemap now matches untiled behavior.
2009-06-17 21:01:48 -07:00
Eric Anholt
0f328c90db i965: Fall back or appropriately adjust offsets of drawing to tiled regions.
3D rendering to tiled textures was being done with non-tile-aligned offsets.
The G4X hardware has fields to let us support it easily and correctly, while
the pre-G4X hardware requires a path full of suffering, so we just fall back.
2009-06-17 21:01:48 -07:00
Dave Airlie
46000cecc3 r300: use vbo_split_prims to split up large vertex buffers.
This lets ut2004 avoid hitting the elt warning.
2009-06-18 13:25:38 +10:00
Eric Anholt
bd10f0e84f i965: Fix tiling for FBO depth attachments by making DEPTH_COMPONENT Y tiled.
This may hurt if miptree relayout occurs, since we can't blit Y tiled
objects.  But it corrects depth tests on FBOs using textures.
2009-06-17 20:19:19 -07:00
Dave Airlie
b165fa7d45 radeon: don't re-add BOs to validate list
if its on the list its on the list don't go readding it.

multitexturing from the same texture could cause this.
2009-06-18 13:16:06 +10:00
Brian Paul
3817a54912 glsl: call _mesa_postprocess_program(), disabled 2009-06-17 09:58:29 -06:00
Brian Paul
516d20fd26 mesa: silence warning 2009-06-17 09:58:29 -06:00
Brian Paul
ec6ad7ba3c mesa: added _mesa_postprocess_program() to aid shader debugging 2009-06-17 09:58:29 -06:00
Jerome Glisse
f806a03361 radeon: Flush command buffer on viewport change
We flush the command buffer so we don't emit mixed
state (with new and previous buffer size) command
buffer, this is especialy affecting zbuffer states.
2009-06-17 16:33:14 +02:00
Jerome Glisse
2506c4e8b1 r300: don't emit vap index offset on r5xx hw when using cs
vap index offset is programmed to 0 by the kernel, it
would add work to kernel checker to allow userspace
programming of this so it's now disallowed with CS
on KMS.
2009-06-17 13:54:09 +02:00