Commit graph

201550 commits

Author SHA1 Message Date
Caterina Shablia
aed66adbd2 panfrost: don't overwrite push uniforms and sysvals UBO with user's UBO
ss->info.ubo_mask includes the push+sysval UBO so if there's a user
UBO bound at the same index as the push+sysval UBO, without this
change we end up writing a descriptor for the user UBO at that index.

Fixes: 3b3cd59f ("panfrost: Launch transform feedback shaders")

Cc: mesa-stable

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit 6948ab727f)
2025-04-15 23:54:46 +02:00
Alyssa Rosenzweig
5ad25a98ef panfrost: invert and rename no_ubo_to_push flag
only the GL driver actually wants this, neither panvk nor internal shaders do.

Cc'd as a prereq to the next patch

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34193>
(cherry picked from commit f179f6952f)
2025-04-15 23:54:45 +02:00
Eric Engestrom
4fde719367 .pick_status.json: Update to 58321cf2e5 2025-04-15 23:49:17 +02:00
Samuel Pitoiset
3c6e241f0d radv: apply the workaround for buggy HiZ/HiS on GFX12 for DGC
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit d2da54e6f3)
2025-04-15 17:24:55 +02:00
Samuel Pitoiset
3c932e7824 radv: add a workaround for buggy HiZ/HiS on GFX12
HiZ/HiS is buggy and can cause random GPU hangs when stencil is enabled.
There are basically two alternatives but RADV follows RadeonSI and emit
a dummy RELEASE_MEM packet after every draw which should workaround the
issue and maintain performance.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12944
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit 6388db03c8)
2025-04-15 17:24:05 +02:00
Samuel Pitoiset
5449bd2eb7 radv: determine if HiZ/HiS is enabled earlier on GFX12
To lower CPU overhead of the hardware workaround.

Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
(cherry picked from commit 11b6d2ba60)
2025-04-10 18:06:29 +02:00
Patrick Lerda
9315eb140f i915: fix draw_create_fragment_shader() related memory leak
For instance, this issue is triggered with "piglit/bin/fcc-blit-between-clears -auto -fbo":
Direct leak of 16400 byte(s) in 5 object(s) allocated from:
    #0 0xb720689a in __interceptor_calloc (/usr/lib/libasan.so.6+0xb289a)
    #1 0xaf10f896 in draw_create_fragment_shader ../src/gallium/auxiliary/draw/draw_fs.c:47
    #2 0xaef64619 in i915_create_fs_state ../src/gallium/drivers/i915/i915_state.c:550
    #3 0xae16a955 in ureg_create_shader ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2194
    #4 0xae17f45f in ureg_create_shader_with_so_and_destroy ../src/gallium/auxiliary/tgsi/tgsi_ureg.h:150
    #5 0xae17f45f in ureg_create_shader_and_destroy ../src/gallium/auxiliary/tgsi/tgsi_ureg.h:159
    #6 0xae17f45f in util_make_fs_blit_zs ../src/gallium/auxiliary/util/u_simple_shaders.c:365
    #7 0xaf13300e in blitter_get_fs_texfetch_depth ../src/gallium/auxiliary/util/u_blitter.c:1157
    #8 0xaf13300e in util_blitter_cache_all_shaders ../src/gallium/auxiliary/util/u_blitter.c:1322
    #9 0xaef6b738 in i915_create_context ../src/gallium/drivers/i915/i915_context.c:233
    #10 0xacb33c49 in st_api_create_context ../src/mesa/state_tracker/st_manager.c:986
    #11 0xac845740 in dri_create_context ../src/gallium/frontends/dri/dri_context.c:178
    #12 0xac854d97 in driCreateContextAttribs ../src/gallium/frontends/dri/dri_util.c:631
    #13 0xb6ce79a3 in dri2_create_context_attribs ../src/glx/dri2_glx.c:240
    #14 0xb6c9606f in dri_common_create_context ../src/glx/dri_common.c:665
    #15 0xb6ca4f00 in CreateContext ../src/glx/glxcmds.c:322
    #16 0xb6ca5c0b in glXCreateNewContext ../src/glx/glxcmds.c:1449

Fixes: 1a69b50b3b ("i915g: Fix point sprites.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit f0cfc1bbdc)
2025-04-10 17:12:25 +02:00
Patrick Lerda
737b18393b i915: fix nir_to_tgsi() related memory leak
For instance, this issue is triggered with "piglit/bin/glx-multithread-texture -auto -fbo":
Direct leak of 256 byte(s) in 1 object(s) allocated from:
    #0 0xb71eda62 in __interceptor_realloc (/usr/lib/libasan.so.6+0xb2a62)
    #1 0xadd5a32f in tokens_expand ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:239
    #2 0xadd5a32f in get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:262
    #3 0xadd62519 in copy_instructions ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2079
    #4 0xadd62519 in ureg_finalize ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2129
    #5 0xadd64bde in ureg_get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2206
    #6 0xade377d0 in nir_to_tgsi_options ../src/gallium/auxiliary/nir/nir_to_tgsi.c:4043
    #7 0xade3da63 in nir_to_tgsi ../src/gallium/auxiliary/nir/nir_to_tgsi.c:3831
    #8 0xaeb606c9 in i915_create_vs_state ../src/gallium/drivers/i915/i915_state.c:662
    #9 0xac781a2c in st_create_common_variant ../src/mesa/state_tracker/st_program.c:720
    #10 0xac78e8a4 in st_get_common_variant ../src/mesa/state_tracker/st_program.c:773
    #11 0xac78fc10 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:1259
    #12 0xac78fc10 in st_finalize_program ../src/mesa/state_tracker/st_program.c:1345
    #13 0xac790b1a in st_program_string_notify ../src/mesa/state_tracker/st_program.c:1378
    #14 0xace457a9 in _mesa_get_fixed_func_vertex_program ../src/mesa/main/ffvertex_prog.c:1397
    #15 0xac5ef8db in update_program ../src/mesa/main/state.c:281
    #16 0xac5f0ece in _mesa_update_state_locked ../src/mesa/main/state.c:560
    #17 0xac5f1653 in _mesa_update_state ../src/mesa/main/state.c:593
    #18 0xacdf9fe2 in _mesa_DrawArrays ../src/mesa/main/draw.c:1403

Fixes: 487a493325 ("i915g: Add support for per-vertex point size.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit 5af5f508b1)
2025-04-10 17:12:25 +02:00
Patrick Lerda
35ad8014cf i915: fix slab_create() related memory leaks
For instance, this issue is triggered with "piglit/bin/fcc-blit-between-clears -auto -fbo":
Direct leak of 836 byte(s) in 1 object(s) allocated from:
    #0 0xb71eb6f2 in malloc (/usr/lib/libasan.so.6+0xb26f2)
    #1 0xaefadc78 in slab_add_new_page ../src/util/slab.c:179
    #2 0xaefadc78 in slab_alloc ../src/util/slab.c:221
    #3 0xaef7d461 in i915_texture_transfer_map ../src/gallium/drivers/i915/i915_resource_texture.c:789
    #4 0xac9e931e in pipe_texture_map ../src/gallium/auxiliary/util/u_inlines.h:555
    #5 0xac9e931e in _mesa_map_renderbuffer ../src/mesa/main/renderbuffer.c:494
    #6 0xad49c5e4 in readpixels_memcpy ../src/mesa/main/readpix.c:260
    #7 0xad49c5e4 in _mesa_readpixels ../src/mesa/main/readpix.c:898
    #8 0xad5d8cfe in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:568
    #9 0xad4a0caf in read_pixels ../src/mesa/main/readpix.c:1199
    #10 0xad4a0caf in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1216
    #11 0xad4a155b in _mesa_ReadPixels ../src/mesa/main/readpix.c:1231

or "piglit/bin/fcc-read-to-pbo-after-clear -auto":
Direct leak of 772 byte(s) in 1 object(s) allocated from:
    #0 0xb726b6f2 in malloc (/usr/lib/libasan.so.6+0xb26f2)
    #1 0xaf0adc88 in slab_add_new_page ../src/util/slab.c:179
    #2 0xaf0adc88 in slab_alloc ../src/util/slab.c:221
    #3 0xaf07aad7 in i915_buffer_transfer_map ../src/gallium/drivers/i915/i915_resource_buffer.c:75
    #4 0xad10de74 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:398
    #5 0xad10de74 in _mesa_bufferobj_map_range ../src/mesa/main/bufferobj.c:499
    #6 0xad5677ce in _mesa_map_pbo_dest ../src/mesa/main/pbo.c:308
    #7 0xad59be3b in _mesa_readpixels ../src/mesa/main/readpix.c:894
    #8 0xad6d8cfe in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:568
    #9 0xad5a0caf in read_pixels ../src/mesa/main/readpix.c:1199
    #10 0xad5a0caf in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1216
    #11 0xad5a155b in _mesa_ReadPixels ../src/mesa/main/readpix.c:1231

Fixes: e7a73b75a0 ("gallium: switch drivers to the slab allocator in src/util")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27570>
(cherry picked from commit 92802ea90a)
2025-04-10 17:12:25 +02:00
Ian Romanick
3e789ce50d brw/nir: Use offset() for all uses of offs in emit_pixel_interpolater_alu_at_offset
This is necessary to appropriately uniformize the first component
access of a convergent vector. Without this, this is produced:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0:F, 0.5f
    add(32) %22:F, %18+2.0<0>:F, 0.5f

This is the correct code:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0<0>:F, 0.5f
    add(32) %22:F, %18+2.0<0>:F, 0.5f

Without 38b58e286f, the code generated was more incorrect, but happened
to work for this test case:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0<0>:F, 0.5f
    add(32) %22:F, %18+0.4<0>:F, 0.5f

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 38b58e286f ("brw/nir: Fix source handling of nir_intrinsic_load_barycentric_at_offset")
Closes: #12969
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34427>
(cherry picked from commit cb69d019cf)
2025-04-10 17:12:25 +02:00
Patrick Lerda
885b1cfd36 i915: fix i915_set_vertex_buffers() related refcnt imbalance and remove redundancies
Indeed, this resource was assigned twice and was not properly freed.

For instance, this issue is triggered with:
"piglit/bin/glsl-fs-pointcoord -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 0278d1fa32 ("gallium: add unbind_num_trailing_slots to set_vertex_buffers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27572>
(cherry picked from commit 22c399320b)
2025-04-10 17:12:25 +02:00
Faith Ekstrand
217ed7f108 nak: Allow predicates in nir_intrinsic_as_uniform
As of 76e542e92a ("nak: Add nak_nir_mark_lcssa_invariants"), we can
now get predicates as inputs to as_uniform.  We can't assume the result
will always be a UGPR.

Fixes: 76e542e92a ("nak: Add nak_nir_mark_lcssa_invariants")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12970
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34434>
(cherry picked from commit 4d1399629b)
2025-04-10 17:12:25 +02:00
Natalie Vock
1fdd97ea51 aco: Make private_segment_buffer/scratch_offset per-resume
We need different Temps for each resume shader, because registers aren't
preserved across resume boundaries.

This was likely fine in practice because arg registers are the same for
each shader, but resulted in invalid IR and asserts.

Fixes crashes in Indiana Jones RT with assertions enabled on GFX8.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
(cherry picked from commit 3d8db3cbbb)
2025-04-10 17:12:25 +02:00
Lionel Landwerlin
2e6281ea34 brw: fix shuffle with scalar/uniform index
The fixes commit isn't actually the source of the bug but likely the
biggest enabler because it creates scalar values that more easily end
up in the shuffle operations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1b24612c57 ("brw/nir: Treat load_*_uniform_block_intel as convergent")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12927
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12688
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12570
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12905
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12734
Reviewed-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34393>
(cherry picked from commit 19e4dda9a2)
2025-04-10 17:12:25 +02:00
Alyssa Rosenzweig
1830d233a7 nir/lower_blend: disable logic ops for unsupported formats
Fixes new Vulkan CTS cases on Honeykrisp (and probably panvk and whatever)

dEQP-VK.pipeline.shader_object_unlinked_binary.logic_op_na_formats.*

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34426>
(cherry picked from commit c23201ad8a)
2025-04-10 17:12:25 +02:00
Alyssa Rosenzweig
41b93a8d0d nir/lower_blend: refactor logicop variables
This pulls out the logicop_func variable from the options struct, so we can
modify it in the next commit in a central place. It then refactors out the
format variable from the options struct since we end up duplicating
options->format[rt] a zillion times and passing in both an options struct and a
logicop func override is confusing so this will just make everything neater and
self-contained next commit.

no functional change.

Cc'd to make the next commit cherrypickable.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34426>
(cherry picked from commit 54ccc8ed0b)
2025-04-10 17:12:25 +02:00
Felix DeGrood
0a9cb4e833 vk/overlay-layer: fix regression in non-control pathway
Fixes regression introduced by prior commit. Prior commit fixed
the control pathway to starting overlay-layer but broke non-
control pathway. Now both pathways should be working.

Fixes: 06423b1792 ("defer log creation to swapchain creation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12884
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34413>
(cherry picked from commit b895c0ec05)
2025-04-10 17:12:25 +02:00
Rob Clark
939859348d tu/vdrm: Fix userspace fence cmds
Somehow the update of the fence value to write was dropped, so the
cmdstream that wrote the fence value would simply write zero over and
over again.

Fixes: 84d6eedd5e ("tu: Refactor the submit path")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33433>
(cherry picked from commit 081869e591)
2025-04-10 17:12:25 +02:00
Patrick Lerda
f7f729287a r600: fix points clipping
This is the backport of eca57f85ee ("radeonsi: fix
gl_ClipDistance and gl_ClipVertex for points").

This change was tested on rv770, palm, barts and cayman. It
fixes 450 khr-gl tests and 64 khr-gles tests on evergreen
and cayman gpus. Here is the list:
spec/glsl-1.20/execution/clipping/vs-clip-vertex-primitives: fail pass
spec/glsl-1.30/execution/clipping/vs-clip-distance-primitives: fail pass
spec/glsl-1.50/execution/compatibility/clipping/gs-clip-vertex-primitives-points: fail pass
khr-gl(3[0-3]|4[0-5])/clip_distance/functional: fail pass
khr-gl(33|4[0-5])/cull_distance/functional_test_item_[0-8]_primitive_mode_points_max_culldist_[0-7]: fail pass
khr-gles3/clip_distance/functional: fail pass
khr-gles3/cull_distance/functional_test_item_[0-8]_primitive_mode_points_max_culldist_[0-7]: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 58ddf6aaf0)
2025-04-10 17:12:25 +02:00
Patrick Lerda
76c1b49b18 r600: fix pa_su_vtx_cntl rounding mode
This is the backport of 9c49550163. This rounding functionality
is available on all the gpus of the r600 family.

This change was tested on rv770, palm and cayman. This change fixes
at least the "turn-on-off" tests on all these gpus and it does not
add any regression. Here are the tests fixed on palm:
spec/ext_framebuffer_multisample/interpolation 6 centroid-edges: fail pass
spec/ext_framebuffer_multisample/interpolation 8 centroid-edges: fail pass
spec/ext_framebuffer_multisample/turn-on-off 2: fail pass
spec/ext_framebuffer_multisample/turn-on-off 4: fail pass
spec/ext_framebuffer_multisample/turn-on-off 6: fail pass
spec/ext_framebuffer_multisample/turn-on-off 8: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 8fc01db1ac)
2025-04-10 17:12:25 +02:00
Patrick Lerda
17a744e8e1 r600: fallback to util_blitter_draw_rectangle when required
This is the backport of dc293ffe50 ("radeonsi:
fallback to util_blitter_draw_rectangle").

This change was tested on rv770, palm and cayman. Here is
the test fixed:
spec/ext_framebuffer_blit/fbo-blit-check-limits: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34403>
(cherry picked from commit 4d17f8d10a)
2025-04-10 17:12:25 +02:00
Lars-Ivar Hesselberg Simonsen
7e787e683a panvk: Add barrier for interleaved ZS copy cmds
When executing CopyBufferToImage or CopyImage with multiple regions of
both depth and stencil aspects targeting an interleaved depth stencil
image, we must split the regions into one copy-command for each aspect
and add a barrier between them to avoid a write-after-write race.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 5067921349 ("panvk: Switch to vk_meta")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34384>
(cherry picked from commit 37595775a0)
2025-04-10 17:12:25 +02:00
Marek Olšák
4135fd731b radeonsi: work around a primitive restart bug on gfx10-10.3
Using the GE instead of the VGT register has no effect because it's
the same value. SQ_NON_EVENT is the fix.

Discovered by Samuel Pitoiset.

Cc: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
(cherry picked from commit a82705911e)
2025-04-10 17:12:25 +02:00
Mike Blumenkrantz
510e0cf34f tu: check for valid descriptor set when binding descriptors
these pointers can be null, and they are checked as null in
pipeline layout creation, but here if the pointer is null it will crash

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34412>
(cherry picked from commit b14c8128bf)
2025-04-10 17:12:24 +02:00
Ian Romanick
4480876188 brw/algebraic: Optimize derivative of convergent value
This is mostly defensive. If a convergent value ever ended up as a
source of a DDX or DDY, the eu_emit code will ignore the stride. This
will result in bad code being generated.

No shader-db or fossil-db changes on any Intel platform.

v2: DDX and DDY will always be float, but brw_imm_for_type only works
with integer types.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Suggested-by: Ken
Fixes: d5d7ae22ae ("brw/nir: Fix up handling of sources that might be convergent vectors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33007>
(cherry picked from commit dee49f4206)
2025-04-10 17:12:24 +02:00
Ian Romanick
58f3ddadf1 brw/nir: Fix source handling of nir_intrinsic_load_barycentric_at_offset
The source of nir_intrinsic_load_barycentric_at_offset is a vector, so
-1 should be passed to get_nir_src. This is also done for texture
sampling intrinsics.

I skimmed the other user of get_nir_src, and I believe they are
correct. This one was just missed as LNL support landed an many, many
rebases of the original MR occurred.

v2: Fix another get_nir_src call. Suggested by Lionel.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v1]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: d5d7ae22ae ("brw/nir: Fix up handling of sources that might be convergent vectors")
Closes: #12464
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33007>
(cherry picked from commit 38b58e286f)
2025-04-10 17:12:24 +02:00
Eric R. Smith
a29fa8d084 panfrost,lima: use index size in panfrost minmax_cache
Bifrost keeps a cache of information about buffers being
used as indices. Unfortunately, it was not keeping information
about the size of the indices (probably because this rarely
changes). If a program deliberately re-interprets the indices
as a different type (e.g. UNSIGNED_INT instead of UNSIGNED_SHORT)
then we will use incorrect values from the cache. This actually
showed up in a test program we were running.

Fix by saving the index size in the cache key.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34011>
(cherry picked from commit 739da17f6e)
2025-04-10 17:12:24 +02:00
Patrick Lerda
ced585e3f4 r600: fix textures with swizzles limited to zero and one
This issue seems to be specific to textureGather() which could
fail when processing some surfaces. These surfaces are configured
with non-standard one and zero swizzles. The gpu doesn't support
this very specific setup with all the possible hardware formats.
This change selects a compatible configuration when this is
possible.

This change was tested on palm, barts and cayman. This change
fixes the 216 remaining arb_texture_gather tests:
spec/arb_texture_gather/texturegather/.*-zero-.*: fail pass
spec/arb_texture_gather/texturegather/.*-one-.*: fail pass
spec/arb_texture_gather/texturegatheroffset/.*-zero-.*: fail pass
spec/arb_texture_gather/texturegatheroffset/.*-one-.*: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34293>
(cherry picked from commit f0c0997277)
2025-04-10 17:12:24 +02:00
Patrick Lerda
c207f96862 r600: move stores to the end of shader when required
This change is inspired from 1e0e521a7d ("broadcom/compiler:
move stores to the end of shader") and makes the khr cull_distance
tests which were broken after dae57e184a functionals again.

Fixes: dae57e184a ("glsl,st/mesa: always lower IO for GLSL, unlower IO for drivers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34154>
(cherry picked from commit 4c2b2c82b0)
2025-04-10 17:12:24 +02:00
Juan A. Suarez Romero
50594727bd v3dv: don't check if DRM device is master
This was added to ensure we can get its resources, but they can be
obtained also from non master.

Fixes: 2af12c5b36 ("v3dv: Check multiple DRM primary nodes before picking the display fd")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12641
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34366>
(cherry picked from commit 8742927d8f)
2025-04-10 17:12:24 +02:00
Georg Lehmann
4bb8d70fd6 spirv: fix cooperative matrix by value function params
The vtn_ssa_value for a cmat is not backed by a nir_def, but by a nir_variable, so
can't be used directly when calling a function.  In most cases the cmat is used by
reference so code will take the value of deref for it (which is a `nir_def`).

When passing a cooperative matrix to a function by value, let the caller pass the deref
value, and the callee copy to a new local variable from that deref.

Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34364>
(cherry picked from commit 0cad7b0968)
2025-04-10 17:12:24 +02:00
Timothy Arceri
6ae1a65ec5 glsl: fix regression in ubo cloning
Fixes KHR-GL46.layout_binding.block_layout_binding_block_VertexShader
with radeonsi.

Fixes: 2b2132d2ac ("nir: fix uniform cloning helper")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34337>
(cherry picked from commit d8782db3a4)
2025-04-10 17:12:24 +02:00
Benjamin Lee
e8ccf9bd1f panfrost/pps: fix omitting several counters
The cid loop in the previous implementation stopped at n_counters for a
given category, even though cid is a global id that does not start
counting from zero at the beginning of each category. As a result, we
missed most of the counters outside of the first category.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 513d1baaea ("pps: Panfrost pps driver")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34202>
(cherry picked from commit 3b66e4a438)
2025-04-10 17:12:24 +02:00
Eric Engestrom
91759a943f .pick_status.json: Update to 2f00daf67a 2025-04-10 17:12:24 +02:00
Eric Engestrom
8614baa5f8 ci: rename ci-tron priority tag to avoid conflict with the generic fdo runners
Otherwise, ci-tron runners with that tag could pick up jobs meant for the fdo
runners, as happened here:
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/73883719

The inverse (fdo runners picking up a job meant for a ci-tron runner) is not
possible though, as ci-tron jobs always include a `farm:$RUNNER_FARM_LOCATION`
tag, so the problem only exists in the other direction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34358>
(cherry picked from commit 6331441e24)
2025-04-10 17:12:24 +02:00
Benjamin Otte
50e0a3933a lavapipe: Don't advertise support for multiplane drm formats
Fixes: bd4f69a0fe
Signed-off-by: Benjamin Otte <otte@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34190>
(cherry picked from commit 0941af995a)
2025-04-10 17:12:24 +02:00
Benjamin Lee
350839a5f1 panvk/csf: fix uninitialized read in utrace_clone_init_builder
Previous code assumed that the caller of utrace_clone_init_builder would
fill some parameters of the builder config, but we were not. Instead,
initialize these from the csif props the same as all the other builder
instances.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 3096cf2a5d ("panvk/csf: flush and process trace events for all cmdbufs")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34270>
(cherry picked from commit e183650aa4)
2025-04-10 17:12:24 +02:00
Ian Romanick
d2e0c22518 brw/algebraic: Constant folding for BROADCAST and SHUFFLE
This prevents assertion failures in brw_eu_emit in a later commit in
this MR. Even though they have not been previously observed, these
assertion failures could happen even without that commit.

No shader-db or fossil-db changes on any Intel platform.

Fixes: 04e1783278 ("brw: Call brw_fs_opt_algebraic less often")

v2: Add SHUFFLE. Suggested by Ken. Fixed indentation.

v3: Update BROADCAST exec_size after rebasing on "brw/build: Use SIMD8
temporaries in emit_uniformize".

v4: Explain why munging the exec_size is correct.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31497>
(cherry picked from commit 8b2be206f3)
2025-04-10 17:12:24 +02:00
Mike Blumenkrantz
c3952af96d gallium/util: check nr_samples in pipe_surface_equal()
this is otherwise broken

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34367>
(cherry picked from commit 12b57b34f8)
2025-04-10 17:12:24 +02:00
Timur Kristóf
a64edc0e3b radv: Call nir_opt_undef too after nir_opt_varyings.
Shaders may have undefined output stores after nir_opt_varyings.
These must be optimized out, otherwise they hit an assertion.

Fixes: 17f6ab28cc
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit ce2138d73a)
2025-04-10 17:12:24 +02:00
Timur Kristóf
6ebea60d73 radv: Use buffers_written mask when gathering XFB info.
We need to enable these buffers regardless of whether or not the
shader actually writes any outputs to them, otherwise we break
XFB queries.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit 15d0804670)
2025-04-10 17:12:24 +02:00
Timur Kristóf
085ae2607f nir/opt_varyings: Fix assertion when deduplicating TCS outputs.
When deduplicating TCS outputs, we may find outputs that aren't
loaded by the shader itself. This previously hit a bad assertion.

Fixes: c66967b5cb
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12410
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit 96d11d0f56)
2025-04-10 17:12:24 +02:00
Timur Kristóf
370789bcfd nir/xfb: Preserve some xfb information when gathering from intrinsics.
We need to remember which streamout buffers and streams were enabled,
even if the shader doesn't actually write any outputs to them,
because the API requires that we count vertices created by this shader
towards queries against those streams.

That information can be gathered by nir_gather_xfb_info_with_varyings
from the original NIR I/O variables that we get from the frontend,
but it isn't included in any intrinsics so would be otherwise lost here.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
(cherry picked from commit a29b5857f7)
2025-04-10 17:12:23 +02:00
Jan Alexander Steffens (heftig)
a4c805f0f9 gfxstream: Use proper log format for 32-bit Vulkan
On i686, where VK_USE_64_BIT_PTR_DEFINES is unset and Vulkan handles are
represented as 64-bit integers instead, the code used the wrong format
specifier, causing a build error.

Fixes: 7fb31361f4 ("Handle external fences in vkGetFenceStatus()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34124>
(cherry picked from commit 1deb0536a1)
2025-04-10 17:12:23 +02:00
Georg Lehmann
88ea564ece spirv: clamp/sign-extend non 32bit ldexp exponents
GLSL.std.450 allows any integer size here.
OpenCL only allows i32.

Cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34071>
(cherry picked from commit c21a53440f)
2025-04-10 17:12:23 +02:00
Job Noorman
1d1fe5cca3 ir3/ra: assign interval offsets to new defs after shared RA
Shared RA might insert new defs to be handled by regular RA (e.g.,
shared spills). However, their interval offsets were not initialized
which caused their intervals to sometimes be mistakenly matched with
those containing offset 0. Fix this by calling index_merge_sets after
shared RA and modifying that function to only index new defs in that
case.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: fa22b0901a ("ir3/ra: Add specialized shared register RA/spilling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33319>
(cherry picked from commit a0db2f9737)
2025-04-10 17:12:23 +02:00
Samuel Pitoiset
ef2a5bee7b radv: fix ignoring conditional rendering with vkCmdResolveImage()
This command isn't supposed to be affected by conditional rendering.

This fixes new VKCTS coverage
dEQP-VK.conditional_rendering.conditional_ignore.resolve_image*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
(cherry picked from commit 4d1d6d4147)
2025-04-10 17:12:23 +02:00
Sviatoslav Peleshko
aefa768a8e vulkan/wsi/headless: Remove unnecessary wsi_configure_image()
wsi_configure_image() with the same info is already called by
configure_image() in wsi_swapchain_init(), so this second call is
unnecessary. Furthermore, calling it the second time caused a memory
leak of queue family indices array.

Fixes: d4a2c0fc ("vulkan/wsi: add a headless swapchain implementation/option")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12811
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34194>
(cherry picked from commit 64980c4f05)
2025-04-10 17:12:23 +02:00
David Rosca
511a894fd3 radeonsi/vcn: Disable AV1 unidir compound with rate control
It causes significant bitrate overshoot currently.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34237>
(cherry picked from commit a5edb9faac)
2025-04-10 17:12:23 +02:00
Connor Abbott
773a873c5f tu: Fix layer_count with dynamic rendering + multiview
With "classic" renderpasses, the VkFramebuffer's layerCount must be 1 if
multiview is enabled. We accidentally rely on this to not disable GMEM
for multiview, and possibly for other things too. Apparently the dynamic
rendering equivalent, VkRenderingInfo::layerCount, can be anything when
multiview is enabled, and some CTS tests set it to the number of views.
Sanitize it when constructing the internal framebuffer for dynamic
rendering.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34080>
(cherry picked from commit 15660caa90)
2025-04-10 17:12:23 +02:00