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panvk: Add barrier for interleaved ZS copy cmds
When executing CopyBufferToImage or CopyImage with multiple regions of
both depth and stencil aspects targeting an interleaved depth stencil
image, we must split the regions into one copy-command for each aspect
and add a barrier between them to avoid a write-after-write race.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 5067921349 ("panvk: Switch to vk_meta")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34384>
This commit is contained in:
Lars-Ivar Hesselberg Simonsen
Marge Bot
parent
ef9e7cb3f5
commit
37595775a0
1 changed files with 158 additions and 2 deletions
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@ -1,5 +1,6 @@
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/*
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* Copyright © 2021 Collabora Ltd.
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* Copyright © 2025 Arm Ltd.
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* SPDX-License-Identifier: MIT
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*/
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@ -267,6 +268,80 @@ panvk_per_arch(CmdCopyBuffer2)(VkCommandBuffer commandBuffer,
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panvk_per_arch(cmd_meta_compute_end)(cmdbuf, &save);
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}
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static bool
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lower_copy_buffer_to_image(
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VkCommandBuffer commandBuffer,
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const VkCopyBufferToImageInfo2 *pCopyBufferToImageInfo)
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{
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VK_FROM_HANDLE(panvk_image, dst_img, pCopyBufferToImageInfo->dstImage);
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const VkImageAspectFlags zs_mask =
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(VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT);
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/* Only required for interleaved depth stencil that are not multi-planar */
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if (vk_format_aspects(dst_img->vk.format) != zs_mask ||
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dst_img->plane_count > 1)
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return false;
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uint32_t num_depth_regions = 0, num_stencil_regions = 0;
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for (uint32_t i = 0; i < pCopyBufferToImageInfo->regionCount; i++) {
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const VkImageAspectFlags aspect_mask =
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pCopyBufferToImageInfo->pRegions[i].imageSubresource.aspectMask;
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assert((aspect_mask & ~zs_mask) == 0);
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if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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num_depth_regions++;
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else
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num_stencil_regions++;
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}
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/* If we have both depth and stencil writes to an interleaved depth stencil
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* image, we must split the writes per aspect with a barrier between them to
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* avoid a write-after-write race. */
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const bool lowering_needed = (num_depth_regions && num_stencil_regions);
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if (!lowering_needed)
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return false;
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VkCopyBufferToImageInfo2 adjusted_info = *pCopyBufferToImageInfo;
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STACK_ARRAY(VkBufferImageCopy2, depth_regions, num_depth_regions);
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STACK_ARRAY(VkBufferImageCopy2, stencil_regions, num_stencil_regions);
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uint32_t depth_idx = 0, stencil_idx = 0;
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for (uint32_t i = 0; i < pCopyBufferToImageInfo->regionCount; i++) {
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const VkImageAspectFlags aspect_mask =
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pCopyBufferToImageInfo->pRegions[i].imageSubresource.aspectMask;
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if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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depth_regions[depth_idx++] = pCopyBufferToImageInfo->pRegions[i];
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else
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stencil_regions[stencil_idx++] = pCopyBufferToImageInfo->pRegions[i];
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}
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adjusted_info.regionCount = num_depth_regions;
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adjusted_info.pRegions = depth_regions;
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panvk_per_arch(CmdCopyBufferToImage2)(commandBuffer, &adjusted_info);
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const VkMemoryBarrier2 mem_barrier = {
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.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER_2,
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.srcStageMask = VK_PIPELINE_STAGE_2_COPY_BIT,
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.srcAccessMask = VK_ACCESS_2_TRANSFER_WRITE_BIT,
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.dstStageMask = VK_PIPELINE_STAGE_2_COPY_BIT,
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.dstAccessMask = VK_ACCESS_2_TRANSFER_WRITE_BIT};
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const VkDependencyInfo dep_info = {
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.sType = VK_STRUCTURE_TYPE_DEPENDENCY_INFO,
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.memoryBarrierCount = 1,
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.pMemoryBarriers = &mem_barrier,
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};
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panvk_per_arch(CmdPipelineBarrier2)(commandBuffer, &dep_info);
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adjusted_info.regionCount = num_stencil_regions;
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adjusted_info.pRegions = stencil_regions;
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panvk_per_arch(CmdCopyBufferToImage2)(commandBuffer, &adjusted_info);
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STACK_ARRAY_FINISH(depth_regions);
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STACK_ARRAY_FINISH(stencil_regions);
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return true;
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}
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VKAPI_ATTR void VKAPI_CALL
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panvk_per_arch(CmdCopyBufferToImage2)(
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VkCommandBuffer commandBuffer,
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@ -277,8 +352,12 @@ panvk_per_arch(CmdCopyBufferToImage2)(
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VK_FROM_HANDLE(panvk_image, img, pCopyBufferToImageInfo->dstImage);
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struct vk_meta_copy_image_properties img_props =
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panvk_meta_copy_get_image_properties(img);
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bool use_gfx_pipeline = copy_to_image_use_gfx_pipeline(dev, img);
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/* Early out if this operation was lowered. */
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if (lower_copy_buffer_to_image(commandBuffer, pCopyBufferToImageInfo))
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return;
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bool use_gfx_pipeline = copy_to_image_use_gfx_pipeline(dev, img);
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if (use_gfx_pipeline) {
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struct panvk_cmd_meta_graphics_save_ctx save = {0};
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@ -346,6 +425,79 @@ panvk_per_arch(CmdUpdateBuffer)(VkCommandBuffer commandBuffer,
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panvk_per_arch(cmd_meta_compute_end)(cmdbuf, &save);
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}
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static bool
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lower_copy_image(VkCommandBuffer commandBuffer,
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const VkCopyImageInfo2 *pCopyImageInfo)
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{
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VK_FROM_HANDLE(panvk_image, dst_img, pCopyImageInfo->dstImage);
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const VkImageAspectFlags zs_mask =
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(VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT);
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/* Only required for interleaved depth stencil that are not multi-planar */
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if (vk_format_aspects(dst_img->vk.format) != zs_mask ||
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dst_img->plane_count > 1)
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return false;
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uint32_t num_depth_regions = 0, num_stencil_regions = 0;
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for (uint32_t i = 0; i < pCopyImageInfo->regionCount; i++) {
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const VkImageAspectFlags aspect_mask =
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pCopyImageInfo->pRegions[i].dstSubresource.aspectMask;
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assert((aspect_mask & ~zs_mask) == 0);
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if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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num_depth_regions++;
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else
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num_stencil_regions++;
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}
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/* If we have both depth and stencil writes to an interleaved depth stencil
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* image, we must split the writes per aspect with a barrier between them to
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* avoid a write-after-write race. */
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const bool lowering_needed = (num_depth_regions && num_stencil_regions);
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if (!lowering_needed)
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return false;
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VkCopyImageInfo2 adjusted_info = *pCopyImageInfo;
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STACK_ARRAY(VkImageCopy2, depth_regions, num_depth_regions);
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STACK_ARRAY(VkImageCopy2, stencil_regions, num_stencil_regions);
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uint32_t depth_idx = 0, stencil_idx = 0;
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for (uint32_t i = 0; i < pCopyImageInfo->regionCount; i++) {
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const VkImageAspectFlags aspect_mask =
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pCopyImageInfo->pRegions[i].dstSubresource.aspectMask;
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if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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depth_regions[depth_idx++] = pCopyImageInfo->pRegions[i];
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else
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stencil_regions[stencil_idx++] = pCopyImageInfo->pRegions[i];
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}
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adjusted_info.regionCount = num_depth_regions;
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adjusted_info.pRegions = depth_regions;
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panvk_per_arch(CmdCopyImage2)(commandBuffer, &adjusted_info);
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const VkMemoryBarrier2 mem_barrier = {
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.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER_2,
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.srcStageMask = VK_PIPELINE_STAGE_2_COPY_BIT,
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.srcAccessMask = VK_ACCESS_2_TRANSFER_WRITE_BIT,
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.dstStageMask = VK_PIPELINE_STAGE_2_COPY_BIT,
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.dstAccessMask = VK_ACCESS_2_TRANSFER_WRITE_BIT};
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const VkDependencyInfo dep_info = {
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.sType = VK_STRUCTURE_TYPE_DEPENDENCY_INFO,
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.memoryBarrierCount = 1,
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.pMemoryBarriers = &mem_barrier,
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};
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panvk_per_arch(CmdPipelineBarrier2)(commandBuffer, &dep_info);
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adjusted_info.regionCount = num_stencil_regions;
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adjusted_info.pRegions = stencil_regions;
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panvk_per_arch(CmdCopyImage2)(commandBuffer, &adjusted_info);
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STACK_ARRAY_FINISH(depth_regions);
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STACK_ARRAY_FINISH(stencil_regions);
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return true;
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}
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VKAPI_ATTR void VKAPI_CALL
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panvk_per_arch(CmdCopyImage2)(VkCommandBuffer commandBuffer,
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const VkCopyImageInfo2 *pCopyImageInfo)
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@ -358,8 +510,12 @@ panvk_per_arch(CmdCopyImage2)(VkCommandBuffer commandBuffer,
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panvk_meta_copy_get_image_properties(src_img);
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struct vk_meta_copy_image_properties dst_img_props =
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panvk_meta_copy_get_image_properties(dst_img);
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bool use_gfx_pipeline = copy_to_image_use_gfx_pipeline(dev, dst_img);
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/* Early out if this operation was lowered. */
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if (lower_copy_image(commandBuffer, pCopyImageInfo))
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return;
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bool use_gfx_pipeline = copy_to_image_use_gfx_pipeline(dev, dst_img);
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if (use_gfx_pipeline) {
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struct panvk_cmd_meta_graphics_save_ctx save = {0};
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