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Author SHA1 Message Date
José Roberto de Souza
a99d90d015 anv: Move code adding protected memory type to common code 
Xe KMD now has support for protected memory, so lets move it
to common code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
 2025-03-06 16:25:03 +00:00
José Roberto de Souza
4860532f49 anv: Remove protected memory support from compute queue 
CCS don't support MI_SET_APPID instruction, that might be the reason
some tests protected memory tests fail on CCS.
Re-enable it if a workaround/solution is found.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
 2025-03-06 16:25:03 +00:00
Lionel Landwerlin
199a052481 anv: fixup indentation around Wa_16014912113 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>
 2025-03-05 17:20:12 +00:00
Lionel Landwerlin
888b2ec7b0 anv: break down Wa_16014912113 in need/apply parts 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>
 2025-03-05 17:20:12 +00:00
Lionel Landwerlin
93a327c4e6 anv/brw: move INTEL_MSAA_* flag computation to the compiler 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>
 2025-03-05 17:20:12 +00:00
Lionel Landwerlin
17ba9a19d1 anv/apply_layout: split binding table building into its own function 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>
 2025-03-05 17:20:11 +00:00
Michael Cheng
014f376755 anv: Change as_build to show num tlas/blas 
As_build now shows the number of tlas/blas that was built.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33720>
 2025-03-05 14:19:56 +00:00
Tapani Pälli
1674cb3665 anv: restrict TessellationDistributionLevel for Wa_16025857284 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33864>
 2025-03-05 09:55:05 +00:00
Lucas Fryzek
b37bcd01ed anv: Expose VK_EXT_device_memory_report 
Also mark VK_EXT_device_memory_report as supported by anv in
docs/features.txt

Co-authored-by: shenghualin <shenghua.lin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33767>
 2025-03-04 15:24:39 +00:00
Lucas Fryzek
f01ad7c34c anv: Implement VK_EXT_device_memory_report 
Report device memory events for:
  - command buffers
  - pipelines
  - descriptor sets and descriptor pools
  - device memory

Co-authored-by: shenghualin <shenghua.lin@intel.com>
Co-authored-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33767>
 2025-03-04 15:24:39 +00:00
Lucas Fryzek
08483e9bfa anv: Release correct bo for RT scratch 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33850>
 2025-03-03 20:13:38 +00:00
Hyunjun Ko
f7ff9b240d anv: Do not support the tiling of DRM modifier if DECODE_DST 
Fixes: 04709e4f ("anv: fix video profile lists");

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33784>
 2025-03-03 04:36:21 +00:00
Alyssa Rosenzweig
0b4ccac83e anv,hasvk: switch to common VK_COPY/PRINT_STR 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33826>
 2025-03-01 20:27:26 +00:00
Mike Blumenkrantz
6a29d2ed66 anv: support all dimensions of image for LINEAR dmabufs 
> Allowing 1D and 3D images, and array images too, with DRM_FORMAT_MOD_LINEAR, is ok
> because VkImageDrmFormatModifierExplicitCreateInfoEXT::pPlaneLayouts is able to fully
> describe the image layout. IF miplevels == 1, which this patch continues to enforce.

Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33668>
 2025-02-28 19:04:33 +00:00
Lionel Landwerlin
02341733df anv/iris: add drirc keys to disable VF/TE distribution 
This is a request from debug engineers to be able to trace the HW
better when analyzing hangs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33795>
 2025-02-27 21:10:59 +00:00
Lionel Landwerlin
bbade676f4 anv/iris: centralize TBIMR drirc 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33795>
 2025-02-27 21:10:59 +00:00
Kevin Chuang
87ff7b061f anv/bvh: Fix copy shader handling sparse buffer 
Fixes: 692b5fa9f2 ("anv: Add shader to copy acceleration structures")

This commit fixes the future test "sparse_binding_structures" for
"header_bottom_address" for ray tracing pipeline.

Even on 48-bit ray tracing (Xe1/2), the software-defined part
instance_leaf_part1.bvh_ptr has to be in canonical form for copy.comp
to deference a bvh, which means we have to preserve the upper 16bits.
This is especially relevant in cases where the acceleration structure buffer
is located high, such as sparse buffer.

Signed-off-by: Kevin Chuang <kaiwenjon23@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33745>
 2025-02-27 20:10:10 +00:00
Kevin Chuang
b9a980ea73 anv/bvh: Fix encoder handling sparse buffer 
Fixes: 2fe57947e3 ("anv: Implement encode shader to fit in ANV BVH")

This commit resolves the failures in the future tests
"sparse_binding_structures" for rayquery. Sparse buffers' heaps are
located high, and since it's in canonical form, the higher 16bits are
all set to 1. However, the existing encoder did not expect any non-zero
values at the higher 16bits. As a result, the instance flags got
corrupted, causing most triangle tests to fail.

Thanks for Paulo providing insights about sparse buffer properties.

Co-developed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Kevin Chuang <kaiwenjon23@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33745>
 2025-02-27 20:10:10 +00:00
Sagar Ghuge
2c8148a76e anv: CPS LOD Compensation Enable is deprecated on Xe2+ 
On Xe2+, Hardware will always have scale.x and scale.y as 1.0.
This is not fixing any issues.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33726>
 2025-02-27 19:49:02 +00:00
Alyssa Rosenzweig
9a58a8257e treewide: Switch to nir_progress 
Via the Coccinelle patch at the end of the commit message, followed by

sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')
ninja -C ~/mesa/build clang-format
cd ~/mesa/src/compiler/nir && clang-format -i *.c
agxfmt

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -return true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -return false;
    -}
    +bool progress = prog_expr;
    +return nir_progress(progress, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
    +nir_progress(prog, impl, metadata);

    @@
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    -return true;
    +return nir_progress(true, impl, metadata);

    @@
    expression impl;
    @@

    -nir_metadata_preserve(impl, nir_metadata_all);
    -return false;
    +return nir_no_progress(impl);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    -other_prog |= prog;
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +nir_progress(prog, impl, metadata);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -other_prog = true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    identifier prog;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -prog = true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +prog = prog | nir_progress(impl_progress, impl, metadata);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -other_prog = true;
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    identifier prog;
    @@

    -if (prog_expr) {
    -prog = true;
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +prog = prog | nir_progress(impl_progress, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +nir_progress(impl_progress, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    -prog = true;
    +prog = nir_progress(true, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -}
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -}
    +nir_progress(prog, impl, metadata);

    @@
    expression impl;
    @@

    -nir_metadata_preserve(impl, nir_metadata_all);
    +nir_no_progress(impl);

    @@
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    +nir_progress(true, impl, metadata);

squashme! sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722>
 2025-02-26 15:19:53 +00:00
Hyunjun Ko
ee52885aec anv: Add one more flag of VideoCapability for encoding. 
Adds VK_VIDEO_ENCODE_H264/5_CAPABILITY_PER_PICTURE_TYPE_MIN_MAX_QP_BIT_KHR.
This also fixes dEQP-VK.video.capabilities.h265_encode_capabilities_query.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33729>
 2025-02-26 01:38:55 +00:00
Lionel Landwerlin
91f36ba5b6 anv: fix missing 3DSTATE_PS:Kernel0MaximumPolysperThread programming 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 815d2e3e8b ("anv: move 3DSTATE_PS to partial packing")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33712>
 2025-02-25 23:42:01 +00:00
Xaver Hugl
4b663d561b vulkan/wsi: implement support for VK_EXT_hdr_metadata on Wayland 
Signed-off-by: Xaver Hugl <xaver.hugl@kde.org>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Sebastian Wick <sebastian.wick@redhat.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32038>
 2025-02-25 21:24:11 +00:00
Stéphane Cerveau
5f8f3db475 anv: fix error code in GetPhysicalDeviceVideoFormatProperties 
If no video profile format found, we should return
the custom error code
VK_ERROR_VIDEO_PROFILE_FORMAT_NOT_SUPPORTED_KHR.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33709>
 2025-02-24 23:03:43 +00:00
Lionel Landwerlin
e4f31b8744 intel/ds: rework RT tracepoints 
That way we can identify single dispatch within each step.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33684>
 2025-02-24 08:08:02 +00:00
Lionel Landwerlin
31c5c386d1 u_trace: pass tracepoint flags to the read_timestamp callback 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33684>
 2025-02-24 08:08:02 +00:00
Mi, Yanfeng
ed77f67e44 anv: add emulated 64bit integer storage support 
By turning a R64 into R32G32

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32676>
 2025-02-23 15:16:51 +00:00
Mi, Yanfeng
723e52cbcc anv: Support putting image base address and image params in surface state 
images params including pitch, width, height and tile mode
for image address caculation

Signed-off-by: Mi, Yanfeng <yanfeng.mi@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32676>
 2025-02-23 15:16:51 +00:00
Lionel Landwerlin
0a42afb262 anv: add a is_sparse for image format support checks 
We'll want to disable some support for software detiled accesses on
sparse 64bit images because we'll pick a single optimized tiling for
shader detiling which is not going to be block shape compliant for
sparse resources.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32676>
 2025-02-23 15:16:50 +00:00
Lionel Landwerlin
5c7397c751 anv: add mapping for VBO formats in format mapping 
We're about to introduce R64_(S|U)INT support for some images. This
will use a different HW format than what we want for VBOs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32676>
 2025-02-23 15:16:50 +00:00
Lionel Landwerlin
eda9422cfc anv: rename compressed format emulation helpers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32676>
 2025-02-23 15:16:50 +00:00
Lionel Landwerlin
84f96a0199 anv: switch to use brw's prog_data source_hash 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33643>
 2025-02-22 08:30:22 +00:00
Georg Lehmann
ca8147edbe nir/peephole_select: add options struct 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33590>
 2025-02-20 21:59:16 +00:00
Sagar Ghuge
536ef0b546 anv: Exclude non-standard block shapes on Xe2+ 
Xe2 and Xe3 are using the same TILE64 format. So reject the non-standard
MSAA shapes on Xe3 as well.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33565>
 2025-02-20 02:18:19 +00:00
Lionel Landwerlin
cf3a343800 anv: fixup compute walker storage length 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9aef4ceb13 ("anv: hold a prepacked COMPUTE_WALKER instruction on CS pipelines")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33593>
 2025-02-18 18:34:51 +00:00
Tapani Pälli
765f3b78d5 anv: apply cache flushes on pipeline select with gfx20 
This fixes rendering artifacts seen with Hogwarts Legacy and Black
Myth Wukong. Assumption is that we can get rid of these flushes once
RESOURCE_BARRIER work lands but until then we need them.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12540
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12489
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33397>
 2025-02-18 18:04:45 +00:00
Lionel Landwerlin
252cac1e5c anv: avoid memory type changes with INTEL_DEBUG=noccs 
Otherwise replay of renderdoc captures don't work.

Instead avoid passing the flag down the allocator.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33583>
 2025-02-18 17:35:44 +00:00
Tapani Pälli
d8381415a6 anv: tighten condition for changing barrier layouts 
Assertion (or attempting the layout change) is causing crash when
launching Steel Rats. Tighten the condition for change so that it should
affect only when runtime has made changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12602
Fixes: eed788213b ("anv: ensure consistent layout transitions in render passes")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33523>
 2025-02-18 06:30:14 +00:00
Matt Turner
49bc323866 intel: Fix typos 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33556>
 2025-02-15 17:43:44 +00:00
Lionel Landwerlin
d75849aaea anv: make compute state flush helper visible 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:24 +02:00
Lionel Landwerlin
ed18353e2a anv: make gfx state flushing available externally 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:21 +02:00
Lionel Landwerlin
9aef4ceb13 anv: hold a prepacked COMPUTE_WALKER instruction on CS pipelines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:18 +02:00
Lionel Landwerlin
82b6a6f0b9 anv: move reg_mask push constant field to gfx 
This is used only for gfx stages as those are the only ones that can
promote UBOs to push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:14 +02:00
Lionel Landwerlin
456d691310 anv: move RT stage bits to main header 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:12 +02:00
Michael Cheng
9ad427c000 Revert "anv: Fix missing Perfetto trace for as build" 
When collecting Perfetto traces on ANV, we should always be
running with MESA_GPU_TRACES=perfetto, and not rely on dynamic
enablement via pps-producer.

This reverts commit 873ad6b6d5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33530>
 2025-02-14 08:10:11 +00:00
Hyunjun Ko
9f9e95e9d5 anv: fix maxDpbSlots and maxActiveReferencePictures for AV1 decoding. 
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33535>
 2025-02-14 07:47:05 +00:00
Lionel Landwerlin
6b99bf76ca anv: ensure Wa_16012775297 interacts correctly with Wa_18020335297 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: dddd765553 ("anv: implement VF_STATISTICS emit for Wa_16012775297")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
a85717f313 anv: enable vertex fetching component packing 
DG2 a/b testing:
   Borderlands3	 -0.55%
   Cyberpunk     +0.38%
   Superposition -0.67%

The shader stats mostly don't look like an improvement :

DG2 shader stats:

  Blackops 3:
  Totals from 265 (16.44% of 1612) affected shaders:
  Instrs: 109055 -> 109080 (+0.02%); split: -0.01%, +0.04%
  Cycle count: 6166549 -> 6021371 (-2.35%); split: -2.53%, +0.17%

  Cyberpunk 2077:
  Totals from 297 (23.50% of 1264) affected shaders:
  Instrs: 197305 -> 197297 (-0.00%); split: -0.03%, +0.02%
  Cycle count: 3374325 -> 3356562 (-0.53%); split: -1.23%, +0.70%

  Fortnite:
  Totals from 2090 (27.97% of 7471) affected shaders:
  Instrs: 1777944 -> 1781070 (+0.18%); split: -0.01%, +0.18%
  Cycle count: 25188758 -> 25162910 (-0.10%); split: -0.86%, +0.76%
  Spill count: 1439 -> 1729 (+20.15%); split: -0.69%, +20.85%
  Fill count: 1226 -> 1395 (+13.78%); split: -0.82%, +14.60%
  Scratch Memory Size: 122880 -> 138240 (+12.50%); split: -1.67%, +14.17%

  Hitman 3:
  Totals from 490 (9.09% of 5392) affected shaders:
  Instrs: 407489 -> 407486 (-0.00%); split: -0.00%, +0.00%
  Cycle count: 1831149 -> 1831890 (+0.04%); split: -0.33%, +0.38%

  Metro Exodus:
  Totals from 4169 (9.68% of 43076) affected shaders:
  Instrs: 817730 -> 817726 (-0.00%); split: -0.00%, +0.00%
  Cycle count: 4646954 -> 4641559 (-0.12%); split: -0.61%, +0.50%

Xe2 shader stats :

  Blackops 3:
  Totals from 283 (19.46% of 1454) affected shaders:
  Cycle count: 7662980 -> 7916316 (+3.31%); split: -0.38%, +3.69%

  Cyberpunk 2077:
  Totals from 329 (26.79% of 1228) affected shaders:
  Instrs: 203312 -> 203327 (+0.01%); split: -0.01%, +0.02%
  Cycle count: 4415812 -> 4434906 (+0.43%); split: -0.69%, +1.12%

  Fortnite:
  Totals from 1981 (30.18% of 6565) affected shaders:
  Instrs: 1709583 -> 1711379 (+0.11%); split: -0.00%, +0.11%
  Cycle count: 26882682 -> 26914014 (+0.12%); split: -0.66%, +0.78%
  Spill count: 863 -> 1020 (+18.19%)
  Fill count: 1195 -> 1271 (+6.36%)
  Scratch Memory Size: 116736 -> 122880 (+5.26%)

  Hitman 3:
  Totals from 540 (10.56% of 5115) affected shaders:
  Instrs: 478993 -> 478994 (+0.00%)
  Cycle count: 3198740 -> 3198416 (-0.01%); split: -0.27%, +0.26%

  Metro Exodus:
  Totals from 4554 (12.28% of 37071) affected shaders:
  Cycle count: 6460340 -> 6475666 (+0.24%); split: -0.38%, +0.62%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
462d8e3fab anv: disable VF statistics for memcpy 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Daniel Schürmann
175c06e5cd intel: switch to nir_metadata_divergence 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30814>
 2025-02-13 10:08:43 +00:00