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429 commits

Author SHA1 Message Date
Marek Olšák
440135e5a0 radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2) 
Needed to track context rolls caused by streamout and ACQUIRE_MEM.
ACQUIRE_MEM can occur outside of draw calls.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110355

v2: squashed patches and done more rework

Cc: 19.0 <mesa-stable@lists.freedesktop.org>
 2019-04-25 11:49:38 -04:00
Nicolai Hähnle
9445a4ab43 radeonsi: add radeonsi_sync_compile option 
Force the driver thread to sync immediately with a compiler thread (but
compilation still happens in a separate thread).

This can be useful to simplify debugging compiler issues.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-25 12:35:29 +02:00
Timothy Arceri
e907337fad radeonsi/nir: move si_lower_nir() call into compiler thread 
This helps improve compile times. For example the shader-db dolphin
shader shaders/dolphin/ubershaders/120.shader_test goes from
~1.69 -> ~1.57 seconds on my machine with this change.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-02-28 11:54:06 +11:00
Marek Olšák
501ff90a95 radeonsi: rename r600_resource -> si_resource 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-01-22 13:32:18 -05:00
Marek Olšák
caa2dcd730 radeonsi: fix a u_blitter crash after a shader with FBFETCH 
This fixes an assertion failure with GL CTS when cts-runner is used.
(not a specific test)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108877
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
 2019-01-22 11:59:27 -05:00
Timothy Arceri
2817a4ec0b radeonsi: remove unrequired param in si_nir_scan_tess_ctrl() 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-01-02 10:01:15 +11:00
Nicolai Hähnle
6e67e79de4 radeonsi: const-ify si_set_tesseval_regs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-12-19 12:01:42 +01:00
Samuel Pitoiset
3fbdcd942f amd: remove support for LLVM 6.0 
User are encouraged to switch to LLVM 7.0 released in September 2018.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-12-06 14:02:56 +01:00
Marek Olšák
fcc70e4855 radeonsi: track context rolls better for the Vega scissor bug workaround 
We should get fewer context rolls with the SET_CONTEXT_REG optimization,
but it would have been for nothing if the scissor state rolled the context
anyway. Don't emit the scissor state if there is no context roll.
 2018-10-16 17:23:25 -04:00
Sonny Jiang
084cf3b966 radeonsi:optimizing SET_CONTEXT_REG for shaders vgt_vertex_reuse 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 19:04:13 -04:00
Sonny Jiang
ce1d72609d radeonsi:optimizing SET_CONTEXT_REG for shaders Tessellation 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 19:04:13 -04:00
Sonny Jiang
4de328da07 radeonsi:optimizing SET_CONTEXT_REG for shaders PS 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 19:04:13 -04:00
Sonny Jiang
f243980f2c radeonsi:optimizing SET_CONTEXT_REG for shaders VS 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 19:04:13 -04:00
Sonny Jiang
4052624398 radeonsi:optimizing SET_CONTEXT_REG for shaders GS 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 19:04:13 -04:00
Sonny Jiang
eeb9170599 radeonsi: optimizing SET_CONTEXT_REG for shaders ES 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-10-05 17:53:52 -04:00
Marek Olšák
0b062f0419 radeonsi: don't set the VS prolog key for the blit VS 2018-10-02 12:21:49 -04:00
Marek Olšák
5693ca865d radeonsi: bump MAX_GS_INVOCATIONS 
same as the closed driver

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
 2018-08-23 16:56:17 -04:00
Marek Olšák
ac72a6bd0b radeonsi: move internal TGSI shaders into si_shaderlib_tgsi.c 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-08-14 21:20:31 -04:00
Marek Olšák
86b52d4236 radeonsi: reduce LDS stalls by 40% for tessellation 
40% is the decrease in the LGKM counter (which includes SMEM too)
for the GFX9 LSHS stage.

This will make the LDS size slightly larger, but I wasn't able to increase
the patch stride without corruption, so I'm increasing the vertex stride.
 2018-07-23 20:23:52 -04:00
Sonny Jiang
c6737756ad radeonsi: emit_spi_map packets optimization 
v2: marek: remove an empty line before break;
    rename reg_val_seq -> spi_ps_input_cntl
    "type * x" -> "type *x"

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2018-07-20 13:50:26 -04:00
Dave Airlie
0eb65b4944 radeonsi: rename si_compiler -> ac_llvm_compiler 
As precursor to moving init to common code, just rename the struct
and move it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-07-04 05:31:32 +10:00
Marek Olšák
1542169a4a radeonsi: enable shader caching for compute shaders 
Compute shaders were not using the shader cache.
 2018-06-28 22:27:25 -04:00
Marek Olšák
d13f240269 radeonsi: unify duplicated code for initial shader compilation 2018-06-28 22:27:25 -04:00
Marek Olšák
f154555733 radeonsi: clean up passing the is_monolithic flag for compilation 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-06-25 18:33:58 -04:00
Marek Olšák
6703fec58c amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbuf 
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-06-19 13:08:50 -04:00
Marek Olšák
22e994bb75 radeonsi: assume that rasterizer state is non-NULL in draw_vbo 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
 2018-06-13 22:00:36 -04:00
Marek Olšák
f3b3ee6974 radeonsi: micro-optimize prim checking and fix guardband with lines+adjacency 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
 2018-06-13 22:00:34 -04:00
Marek Olšák
28ee825e19 radeonsi: move VGT_GS_OUT_PRIM_TYPE into si_shader_gs 
same as amdvlk.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
 2018-06-13 22:00:23 -04:00
Marek Olšák
99e0ba6868 radeonsi: record CLIPVERTEX output usage properly for compatibility profiles 
This was missed when adding CLIPVERTEX support into GS & tess.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
 2018-06-13 22:00:20 -04:00
Marek Olšák
2f65c67043 radeonsi: fix passing gl_ClipVertex for GS and tess 
Also add the fprintf call.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-05-25 16:46:00 -04:00
Marek Olšák
a7d61c0753 radeonsi: fix color inputs/outputs for GS and tess 
GS is tested, tessellation is untested.

Have outputs_written_before_ps for HW VS and outputs_written for other
stages. The reason is that COLOR and BCOLOR alias for HW VS, which
drives elimination of VS outputs based on PS inputs.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-05-25 16:46:00 -04:00
Marek Olšák
92ea9329e5 radeonsi: fix incorrect parentheses around VS-PS varying elimination 
I don't know if it caused issues.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-05-25 16:46:00 -04:00
Marek Olšák
07e02c8617 radeonsi: round ps_iter_samples in set_min_samples 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-05-24 13:41:57 -04:00
Marek Olšák
87eb597758 radeonsi: add struct si_compiler containing LLVMTargetMachineRef 
It will contain more variables.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
6fadfc01c6 radeonsi: use r600_resource() typecast helper 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
3160ee876a radeonsi: remove unused atom parameter from si_atom::emit 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
e395475096 radeonsi: remove function si_init_atom 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
639b673fc3 radeonsi: don't use an indirect table for state atoms 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
9054799b39 radeonsi: rename r600_atom -> si_atom 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-27 17:56:04 -04:00
Marek Olšák
60299e9abe radeonsi: don't emit partial flushes for internal CS flushes only 
Tested-by: Benedikt Schemmer <ben@besd.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2018-04-16 16:58:10 -04:00
Marek Olšák
6a93441295 radeonsi: remove r600_common_context 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
5777488406 radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
72e9e98076 radeonsi: move and rename R600_ERR out of r600_pipe_common.h 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
5f1cddde78 radeonsi: move definitions out of r600_pipe_common.h 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
c424f86180 radeonsi: use si_context instead of pipe_context in parameters pt1 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
4c5efc40f4 radeonsi: update copyrights 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
95bc30275b radeonsi: switch radeon_add_to_buffer_list parameter to si_context 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
2b70dd8c8a radeonsi: flatten / remove struct r600_ring 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
17e8f1608e radeonsi: call CS flush functions directly whenever possible 
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-04-05 15:34:58 -04:00
Marek Olšák
0669dca9c0 radeonsi: skip DCC render feedback checking if color writes are disabled 2018-04-05 15:34:58 -04:00