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Author SHA1 Message Date
Zack Rusin
9d4b51aab8 Remove the silly function and remove the bogus comment. 2007-10-24 11:41:28 -04:00
Zack Rusin
d76a7b61bb Cleanup some code. 2007-10-24 11:21:05 -04:00
Zack Rusin
5040eefbb7 Implement arl, lerp opcodes and do a first stab at if/endif 
handling and branching support.
 2007-10-24 11:21:05 -04:00
Zack Rusin
ba823b3ded Implement cross product and abs opcode 2007-10-24 11:21:05 -04:00
Zack Rusin
1248b9776b Implement extended swizzling. 2007-10-24 11:21:05 -04:00
Zack Rusin
743e96eec5 Implement SGE and SLT 2007-10-24 11:21:04 -04:00
Zack Rusin
b04430efd9 Introduce linux-llvm target. Remove the llvm code from the default build for now. 
Cleanup some of the debugging output.
 2007-10-24 11:21:04 -04:00
Zack Rusin
ba88751716 Align the load/stores. Reduce the amount of debugging output. 2007-10-24 11:21:04 -04:00
Zack Rusin
6815a9af6c Cleanup some of the debugging output code 2007-10-24 11:21:04 -04:00
Zack Rusin
3b772a277f Make lit work but in a very lame way - will have to be rewritten. 2007-10-24 11:21:04 -04:00
Zack Rusin
d4d8d7c468 Muchos fixos. gears kinda works. and cases don't crash. 
glorious
 2007-10-24 11:21:04 -04:00
Zack Rusin
e9a623d6a6 implement min and max 2007-10-24 11:21:04 -04:00
Zack Rusin
3ae767dd07 Fix some warnings and implement lg2 2007-10-24 11:21:04 -04:00
Zack Rusin
c6a1beb18f Implement frc and floor 2007-10-24 11:21:04 -04:00
Zack Rusin
1c955171c8 Implement ex2 opcode 2007-10-24 11:21:04 -04:00
Zack Rusin
bd38f4d921 Implement dst opcode 2007-10-24 11:21:04 -04:00
Zack Rusin
3c558e17f0 Implement dph opcode 2007-10-24 11:21:04 -04:00
Zack Rusin
7abe3364b2 Implement dot4 opcode 2007-10-24 11:21:04 -04:00
Zack Rusin
e20294be11 Implement pow/rcp and sub opcodes 2007-10-24 11:21:04 -04:00
Zack Rusin
fcbde5e9f4 Add the "add" opcode and assert one vp if an opcode isn't supported 2007-10-24 11:21:03 -04:00
Zack Rusin
b0f8069343 Refactor the tgsi->llvm storage translator 2007-10-24 11:21:03 -04:00
Zack Rusin
3975f34fd3 Implement basic opcode translation and storage translation. 2007-10-24 11:21:03 -04:00
Zack Rusin
fa2962d148 Draw first triangle. Start on the llvm builder. 2007-10-24 11:21:03 -04:00
Zack Rusin
5e0205023e Cleanup some of the testing code. Implement first pass at actually 
running shaders in llvm.
 2007-10-24 11:21:03 -04:00
Zack Rusin
5ffdada717 Execution engine is a singleton, for now keep it in the pipe. 2007-10-24 11:21:03 -04:00
Zack Rusin
9e6d58fac2 Generate the base shader. 2007-10-24 11:21:03 -04:00
Zack Rusin
2dbba8b024 Implement the conversion and do the initial execution pass. 2007-10-24 11:21:03 -04:00
Zack Rusin
11bc1f015a Stub out some conversion. 2007-10-24 11:21:03 -04:00
Zack Rusin
b2e529982e Initial stab at LLVM integration. 2007-10-24 11:21:03 -04:00
Brian
4664261f8d Fix vertex cache bug that allows multiple vertices to fall into the same slot. 
Need to set the slot's bit in draw->vcache.referenced even when there was a
cache hit since flushing the primitive buffer will have cleared the bitfield
but not the cache's vertex indexes.

Fixes a bug found when drawing long triangle fans but could be hit by other
prim types as well.

An alternate fix would be to call draw_vertex_cache_invalidate() from
draw_vertex_cache_unreference().
 2007-10-23 15:08:54 -06:00
Brian
3df65af849 added comment 2007-10-23 15:02:02 -06:00
Brian
40e46d0727 In get_vertex(), slot was computed using & 31. Replace with % VCACHE_SIZE. 
Also, assert that index is not too large before indexing array.
 2007-10-23 12:32:02 -06:00
Brian
be04999982 adjust coords in wide_line() to be conformant 2007-10-23 11:38:17 -06:00
Brian
112a1580f6 properly init dst reg's CondMask/Swizzle fields 2007-10-23 10:54:50 -06:00
Brian
e69943e6dd bump up MAX_INSTRUCTIONS and add an assertion to catch emitting too many instructions 2007-10-23 10:23:01 -06:00
Brian
5c79c088cd Don't pad renderbuffers to multiple of two pixels anymore. 
This was only needed to avoid out-of-bounds memory accesses with the
2x2 quad_read/write() functions which no longer exist.
 2007-10-23 08:30:36 -06:00
Brian
588c91eb0a don't apply ColorMask to main gc 2007-10-22 17:50:00 -06:00
Brian
455a08d87d fix masking bug, memory leak 2007-10-22 17:20:56 -06:00
Brian
0a3eaeadb9 don't use GL types for get/put_tile() params 2007-10-22 17:20:08 -06:00
Brian
beefc6011b new flag to control psize (from vertex shader or fixed size) 2007-10-22 12:19:54 -06:00
Brian
1b48523459 add support for sprite texcoord modes 2007-10-22 12:10:30 -06:00
Brian
22e5c4f0f0 implement point sprite mode 2007-10-22 11:59:26 -06:00
Brian
cd4d732773 add point_sprite flag to rasterizer state 2007-10-22 11:41:31 -06:00
Brian
34abb93ea1 remove unused var 2007-10-22 11:41:17 -06:00
Brian
8d24415987 tweak point corners to pass conform test 2007-10-22 11:38:40 -06:00
Brian
e3444deec5 plug the wide prims code into the pipeline 2007-10-22 11:01:34 -06:00
Brian
80d2bb7c64 update to working condition 2007-10-22 11:01:02 -06:00
Brian
70eb7996f2 Finish unifying the surface and texture tile caches. 2007-10-22 09:37:26 -06:00
keithw
ec3bd21c46 pull clip/ module wide and stippled lines/points code 2007-10-22 15:24:42 +01:00
Brian
b3204c2aff Start implementing cache routines for textures. 
First step to consolidating surface/texture caching...
 2007-10-21 18:06:35 -06:00