Commit graph

198200 commits

Author SHA1 Message Date
Lars-Ivar Hesselberg Simonsen
4ab14de32f panvk: Set fs.multisampled sysval for v10+
This allows us to observe writes to SampleMask, which would otherwise be
ignored.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32132>
2024-11-15 09:24:06 +00:00
Constantine Shablia
9b7f547fef panvk: adjust maxSamplerAllocationCount limit
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31917>
2024-11-15 08:59:46 +00:00
Constantine Shablia
a245b397c6 panvk: elaborate the comment on the maxMemoryAllocationCount limit
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31917>
2024-11-15 08:59:46 +00:00
Constantine Shablia
c01449ef5c panvk: enable shaderInt64
We already were lowering int64

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31917>
2024-11-15 08:59:46 +00:00
Constantine Shablia
bdb2f0dc2a panvk: move samplerAnisotropy in the order it appears in struct definition
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31917>
2024-11-15 08:59:46 +00:00
Samuel Pitoiset
d2960a8430 radv: consider VK_PIPELINE_STAGE_2_NONE like BOTTOM_OF_PIPE
VK_PIPELINE_STAGE_2_NONE from sync2 is similar to BOTTOM_OF_PIPE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32115>
2024-11-15 08:22:23 +00:00
Samuel Pitoiset
c08d2c40ed radv: fix ignoring src stage mask when dst stage mask is BOTTOM_OF_PIPE
Otherwise the driver doesn't synchronize if there are image layout
transitions.

This fixes rendering issues with displayable DCC (usually black squares
in the bottom of screen). This mostly happens when an application
uses a lower resolution than the screen supports and fshack
(wine/proton) which upscales images uses COMPUTE_SHADER->BOTTOM_OF_PIPE
for the barrier after a dispatch.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11547
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11600
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11789
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8705
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9890
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32115>
2024-11-15 08:22:23 +00:00
Francisco Jerez
0ad835a929 intel/fs/xe2: Fix up subdword integer region restriction with strided byte src and packed byte dst.
This fixes a corner case of the LNL sub-dword integer restrictions
that wasn't being detected by has_subdword_integer_region_restriction(),
specifically:

> if(Src.Type==Byte && Dst.Type==Byte && Dst.Stride==1 && W!=2) {
>    // ...
>    if(Src.Stride == 2) && (Src.UniformStride) && (Dst.SubReg%32  ==  Src.SubReg/2 ) { Allowed }
>    // ...
> }

All the other restrictions that require agreement between the SubReg
number of source and destination only affect sources with a stride
greater than a dword, which is why
has_subdword_integer_region_restriction() was returning false except
when "byte_stride(srcs[i]) >= 4" evaluated to true, but as implied by
the pseudocode above, in the particular case of a packed byte
destination, the restriction applies for source strides as narrow as
2B.

The form of the equation that relates the subreg numbers is consistent
with the existing calculations in brw_fs_lower_regioning (see
required_src_byte_offset()), we just need to enable lowering for this
corner case, and change lower_dst_region() to call lower_instruction()
recursively, since some of the cases where we break this restriction
are copy instructions introduced by brw_fs_lower_regioning() itself
trying to lower other instructions with byte destinations.

This fixes some Vulkan CTS test-cases that were hitting these
restrictions with byte data types.

Fixes: 217d412360 ("intel/fs/gfx20+: Implement sub-dword integer regioning restrictions.")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30630>
2024-11-15 07:39:33 +00:00
Tapani Pälli
50243892b4 isl: modify existing assert by allowing CCS_E aux usage
Relax this assert based on x/y offsets for GFX_VERx10 >= 200.

This is getting hit when running gfxbench5 on LNL/BMG.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32128>
2024-11-15 05:20:07 +00:00
Iván Briano
d32a26b3e6 anv: remove unused/misleading/wrong parameters from the RT trampoline
Since the shader parameters are passed as inline data, push constants
are no longer used and so, not actually set on dispatch. But the
nr_params = 4 was still making the shader emit the code to load them,
causing page faults on simulation, and would also on HW if we didn't
always have a scratch page set.

The uses_inline_data parameter will be set from brw_compile_cs(), called
shortly after this point, so we don't need it here.

The subgroup_size is misleading, as we don't actually require that size
and the code that checks for it isn't even running for this shader.

Fixes: 97b17aa0b1 ("brw/nir: rework inline_data_intel to work with compute")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12152

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32150>
2024-11-14 19:23:42 -08:00
David Heidelberg
1368ee5e1a compiler/rust: drop duplicated bindgen check
The same check is present in meson file in root directory.

Cc: mesa-stable # 24.3
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32101>
2024-11-14 20:12:31 +00:00
Chia-I Wu
97be761f92 vulkan: include host write in expanded dst access flags
From the perspective of the gpu, host read or host write has the same
implication (gpu cache flush) in the dst access flags.  We should
include host write in the dst access flags.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32102>
2024-11-14 19:29:00 +00:00
Chia-I Wu
8d31cb8747 panvk: update expectations for G610
The prior commit fixed dEQP-VK.glsl.440.linkage.varying.component.*.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
619463837f panvk: fix a missing cache invalidation
For the host-to-device domain operation, it is possible that
wait_sb_mask is empty but there is a cache invalidaton,

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
a23c0eb61a panvk: improve should_split_render_pass
Fragments are processed in rasterization order within a fragment job.
The fragment subqueue self-wait is nop in most cases.  The only
exception is when there is a feedback loop.

When there is a feedback loop, because we lower subpassLoad to
texelFetch, we have to split the render pass.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
bee7ef4670 panvk: skip tiler subqueue self-wait within a render pass
IDVS jobs within a render pass use the same scoreboard slot.  There is
no need to wait.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
1b2ea10d68 panvk: skip frag subqueue self-wait within a render pass
We don't emit the fragment job until the end of a render pass.  There is
nothing to wait.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
764a294059 panvk: always skip frag->tiler subqueue wait
The fragment subqueue always waits for the tiler subqueue.  There is no
need to emit additional waits for barriers.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
ca7814ccf4 panvk: rework collect_cs_deps
src_stages and dst_stages together define an execution dependency.  Both
of them should be considered at the same time.

Add a low-level helper, add_execution_dependency, to translate pipeline
stages to subqueue wait masks.  The subqueue wait masks only specify
which subqueues should wait for which.  The callers will decide how the
waits are performed exactly.

Update collect_cs_deps to call add_execution_dependency and use the
subqueue wait masks to initialize panvk_cs_deps.

The main difference is that barriers such as

  .srcStageMask = VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
  .dstStageMask = VK_PIPELINE_STAGE_2_NONE,

are ignored.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
f1f3b56834 panvk: rework collect_cache_flush_info
src_access defines the availability op and the host-to-device domain op.
dst_access defines the visibility op and the device-to-host domain op.
They should be treated separately.

Add a low-level helper, add_memory_dependency, to translate access flags
to panvk_cache_flush_info.

Update collect_cache_flush_info to use add_memory_dependency.  Also
replace the custom subqueue access flag mappings by
vk_filter_{src,dst}_access_flags2.

The main difference is that barriers such as

  .srcAccessMask = VK_ACCESS_2_MEMORY_WRITE_BIT,
  .dstAccessMask = VK_ACCESS_2_NONE,

or

 .srcAccessMask = VK_ACCESS_2_NONE,
 .dstAccessMask = VK_ACCESS_2_MEMORY_READ_BIT,

are no longer ignored.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
4a598e946c panvk: add get_subqueue_stages
This is a minor refactoring with no functional change.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32074>
2024-11-14 19:07:52 +00:00
Chia-I Wu
764cb8aebb panvk: update CI expectations
The prior commit fixed
dEQP-VK.memory.mapping.suballocation.full.variable.implicit_unmap.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32125>
2024-11-14 18:45:44 +00:00
Chia-I Wu
7a60e1dcd7 panvk: do not leak mapped memory
vkFreeMemory implies vkUnmapMemory.  Without the implied unmap, mapped
memories leak.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32125>
2024-11-14 18:45:44 +00:00
Chia-I Wu
3419fc0d8a panvk: add memory mmap/munmap helpers
Add and use panvk_memory_mmap and panvk_memory_munmap.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32125>
2024-11-14 18:45:44 +00:00
Martin Roukala (né Peres)
8ef5734185 Revert "ci: disable mupuf's farm"
This reverts commit acb48bde44, now that
the first part of the electric renovation is done. It will be
re-disabled for a day later next week.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32147>
2024-11-14 20:01:34 +02:00
Yinjie Yao
19c4b734f2 radeonsi/vcn: Fix compile warnings with previously uninitialized variables.
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32126>
2024-11-14 17:01:54 +00:00
Yinjie Yao
03462aff8f radeonsi/vcn: Indentation fix
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32126>
2024-11-14 17:01:54 +00:00
Casey Bowman
b8d253b30c vulkan/screenshot-layer: Add region command option
Adds an optional region selection, based off percentages of the
starting/ending of an image's X & Y values.

This is intended as a performance enhancement tradeoff for smaller
images to be created.

With a smaller image size, the screenshotting layer will change the
region boundaries on the GPU side, which will decrease the amount of
time it takes to copy the image over to CPU-accessible memory.

Using vkcube as an example, the original image size is 500x500:

mesa-screenshot: DEBUG: Screenshot Authorized!
mesa-screenshot: DEBUG: Needs 2 steps
mesa-screenshot: DEBUG: Time to copy: 123530 nanoseconds

Then, by cropping the area to a 100x100 image, we get the following:

mesa-screenshot: DEBUG: Screenshot Authorized!
mesa-screenshot: DEBUG: Using region: startX = 40% (200), startY = 40% (200), endX = 60% (300), endY = 60% (300)
mesa-screenshot: DEBUG: Needs 2 steps
mesa-screenshot: DEBUG: Time to copy: 12679 nanoseconds

For this example, this is a ~90% time reduction improvement!

Overall, this option reduces the copy time to a point where it can
become negligible, relative to the frame time of the application.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Felix DeGrood felix.j.degrood@intel.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32016>
2024-11-14 16:35:24 +00:00
Samuel Pitoiset
45c0ef3bb4 radv: dump SPIR-V and NIR for the faulty shader detected with the trap
More logs is always better for debugging.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32116>
2024-11-14 15:57:07 +00:00
Samuel Pitoiset
9149488a9d radv: mark live invocations when dumping VGPRS with the trap handler
Similar to UMR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32116>
2024-11-14 15:57:07 +00:00
Georg Lehmann
3e037ac2a9 aco/gfx8: use ds_swizzle_b32 rotate mode
Despite only being mentioned in the ISA docs since vega, rotate (and fft)
swizzle mode seem to exist since gfx8.

https://github.com/llvm/llvm-project/issues/28975#issuecomment-980964939

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31348>
2024-11-14 15:34:48 +00:00
Michel Dänzer
fdc1c61306 Revert "util: Use persistent array of index entries"
This reverts commit 031f2c2a69.

It broke the macOS build.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12083
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32078>
2024-11-14 14:20:18 +00:00
Michel Dänzer
66d68263f8 Revert "util/mesa-db: Further simplify mesa_db_compact"
This reverts commit 92893309bc.

Need to revert this as well for the next revert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32078>
2024-11-14 14:20:18 +00:00
Lionel Landwerlin
5cfd841dda anv: fix descriptor asserts
Lots of tests are hitting the assert, one in particular :

dEQP-VK.binding_model.mutable_descriptor.single.switches.sampler_combined_image_sampler.update_copy.nonmutable_source.normal_source.pool_same_types.pre_update.no_array.comp

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b6d11ba5b4 ("anv: Protect memcpy/memset/qsort calls against NULL arguments")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32133>
2024-11-14 13:45:19 +00:00
Jose Maria Casanova Crespo
07f44ecd31 rpi4/ci: mark another flaky timeline_semaphore test
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32135>
2024-11-14 12:54:44 +01:00
Alejandro Piñeiro
7c3e2927fe docs/features: mark VK_EXT_scalar_block_layout as supported for vc7+
This feature is available on vc7+ (rpi5) since commit
3b9aaf25a0

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32072>
2024-11-14 11:38:37 +00:00
Danylo Piliaiev
b501cbf153 nir/nir_opt_offsets: Do not fold load/store with const offset > max
When (off_const > max) there is a wrap around uint when calling
try_extract_const_addition.
Exit early since folding doesn't make sense in this case.

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32118>
2024-11-14 10:22:39 +00:00
Friedrich Vock
73d513c5be vulkan/rmv: Correctly set heap size
RMV expects the size to be in bits 5-68, not 4-68.

Fixes: 845792db ("vulkan: Add RMV file exporter")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31903>
2024-11-14 09:11:25 +00:00
Lionel Landwerlin
a21cd8c5b6 brw: allocate physical register sizes for spilling
All of the spilling code should work with physical register units
because for example SEND messages will expect a physical register as
destination.

So always allocate a full physical register for the spilled/unspilled
values and adjust the offsets of the registers to physical sizes too.

Cc: mesa-stable
Fixes: aa494cba ("brw: align spilling offsets to physical register sizes")
Closes: mesa/mesa#11967

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Found-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32124>
2024-11-14 08:44:03 +00:00
Boris Brezillon
d13bcd1daf pan/ci: Move g610-vk jobs to post-merge CI
The g610-vk jobs are just too unstable to be pre-merge jobs. Let's keep
them as post-merge so people can still execute them manually if they
care.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32129>
2024-11-14 08:16:36 +00:00
David Rosca
dcfc956521 radv/video: Override pic_init_qp_minus26 in PPS
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
David Rosca
d166bb5dd1 radv/video: Use 64x16 alignment for HEVC encode
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
David Rosca
d1c1a33b35 radv/video: Avoid selecting rc layer over maximum
Vulkan spec doesn't say if this is allowed or not, but trying
to do this will hang.

Fixes: 4a19047d32 ("radv/video: Select temporal layer when encoding each frame")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
David Rosca
e941acfb9d radv/video: Report correct encodeInputPictureGranularity
Only aligned size can be encoded.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
David Rosca
e4ec135d8b radv/video: Fix HEVC slice control
This needs to use aligned size, otherwise it will output two
slices when the size is not 64 aligned.

Fixes: 967e4e09de ("radv/video: add h265 encode support")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
David Rosca
6a121f1507 radv/video: Fix H264 slice control
This needs to use aligned size, otherwise it will output two
slices when the size is not 16 aligned.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
Caio Oliveira
15ea28b835 intel/executor: Fix exec_size in @read macro for Xe2
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32122>
2024-11-14 05:31:03 +00:00
Matt Turner
b3a14d7b91 intel: Avoid unaligned pointer access
Avoids the sanitizer error:

```
../src/intel/common/intel_debug_identifier.c:122:15: runtime error: member access within misaligned address 0x7f5ca8b32051 for type 'struct intel_debug_block_base', which requires 4 byte alignment
0x7f5ca8b32051: note: pointer points here
 66 30 29  00 03 00 00 00 10 00 00  00 00 00 00 00 00 00 00  00 01 00 00 00 08 00 00  00 00 00 00 00
              ^
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
2024-11-14 01:05:02 +00:00
Matt Turner
1f3e24f4f3 anv: Avoid null ptr dereference
Avoids the sanitizer error:

```
../src/intel/vulkan/anv_instance.c:266:37: runtime error: member access within null pointer of type 'struct anv_instance'
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
2024-11-14 01:05:01 +00:00
Matt Turner
b6d11ba5b4 anv: Protect memcpy/memset/qsort calls against NULL arguments
Avoids sanitizer errors like:

```
../src/intel/vulkan/anv_pipeline_cache.c:409:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:696:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:2709:10: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:2709:10: runtime error: null pointer passed as argument 2, which is declared to never be null
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
2024-11-14 01:05:01 +00:00