Marek Olšák
29965f356b
ac: replace 5 ac_shader_abi::load_* callbacks with 1 intrinsic_load callback
...
This merges them into si_llvm_load_intrinsic and reuses load_tess_varyings.
RADV only implemented 1 callback.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16467 >
2022-05-13 06:45:31 -04:00
Marek Olšák
dc81f0ba46
ac/llvm: remove ac_shader_abi::emit_outputs
...
it's called last in ac_nir_translate, so call it in the caller.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16467 >
2022-05-13 06:44:57 -04:00
Marek Olšák
2a1c711052
ac/llvm: skip s_barrier if tess patches don't cross a wave boundary
...
If tess patches are wholly in one wave, "s_waitcnt lgkm(0)" is sufficient.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
20bb85e2ec
ac/llvm: fix the remaining s_barriers for LLVM 15
...
LLVM 15 doesn't insert s_waitcnt before barriers.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
b48d183633
ac/llvm: move the gfx6 optimization for TCS barriers into ac_build_s_barrier
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
e4882d6b7e
ac/llvm: add gl_shader_stage parameter into ac_build_s_barrier
...
this will be used later
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
fb51a3c4b0
ac/llvm: replace LLVMBuildFence with ac_build_waitcnt(VSTORE)
...
No change in LLVM IR.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
bed91084c8
ac/llvm: inline emit_membar
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Marek Olšák
9a592608cb
ac/llvm: implement memory_barrier_tcs_patch properly to fix LLVM 15
...
because LLVM 15 doesn't insert s_waitcnt before s_barrier.
Now, control_barrier shouldn't add any waits because memory_barrier is
responsible for it, so remove the wait.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304 >
2022-05-13 09:15:20 +00:00
Samuel Pitoiset
07954a8fd6
aco: only retrieve the scratch offset when it's declared
...
This allows to run most of the fossils we have right now. I will fix
up scratch in upcoming patches.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
5a119f15aa
radv,aco: export alpha-to-coverage via MRTZ on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
b6ba4cb407
aco: do not set COMPR for exports but use 0x3 channel mask on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
a6e1445d5f
aco: do not set RESOURCE_LEVEL for buffer descriptors on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
7647097d3d
aco: update waitcnt on GFX11
...
Not sure if the vmcnt field can use more than 0x3f bits.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
765aa36b9d
aco: update LDS allocation granularity for PS on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
a284b677ba
aco: do not set GLC stores on GFX11
...
It has no effect.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
eea15d6706
aco: do not set DLC for loads on GFX11
...
It means something different.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
bc8da20dda
aco: export MRT0 instead of NULL on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
42ef89e8db
radv,aco: use the new TCS WaveID SGPR to compute vs_rel_patch_id on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
432cde7f00
radv,aco: add support for packed threadID VGPRs on GFX11
...
Thread ID are packed in one VGPR with 10 bits each.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
52952f51cd
aco: do not align VGPRS to 8 or 16 on GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Samuel Pitoiset
0cb1b12ec0
aco: recognize GFX11 in few places
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369 >
2022-05-12 15:46:20 +00:00
Konstantin Seurer
1245ca8c8d
radv: Advertise indirect ray tracing
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712 >
2022-05-12 15:04:31 +00:00
Konstantin Seurer
81745da51f
radv: Implement vkCmdTraceRaysIndirectKHR
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712 >
2022-05-12 15:04:31 +00:00
Konstantin Seurer
b30f96dd93
radv,aco: Use ray_launch_size_addr
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712 >
2022-05-12 15:04:31 +00:00
Konstantin Seurer
7a8063a4fa
radv: Indirect unaligned dispatches
...
Closes : #6251
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712 >
2022-05-12 15:04:31 +00:00
Konstantin Seurer
47f625dcae
radv: Allow indirect dispatches without bo
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712 >
2022-05-12 15:04:31 +00:00
Samuel Pitoiset
b5b2bcab54
radv: disable DCC for Senra Kagura Shinovi Versus
...
To workaround an issue with feedback loops in D3D9 with DCC in GENERAL,
until we can fix it properly with a new extension.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6469
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16452 >
2022-05-12 14:43:13 +00:00
Samuel Pitoiset
c9c74efb02
radv/winsys: allow to use RADV_FORCE_FAMILY=gfx1100
...
The bare minimum to play with fossils.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16446 >
2022-05-12 09:41:40 +00:00
Pierre-Eric Pelloux-Prayer
db2fd0ca83
amd: fix ac_build_mbcnt_add in wave32 mode
...
add_src was ignored and i32_0 was always used.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 1e49018ced ("amd: Add extra source to the mbcnt_amd NIR intrinsic.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427 >
2022-05-12 07:46:04 +00:00
Timur Kristóf
0d0165db8e
radv: Print task shader stage name before disasm.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
8dbde92659
radv: Lower shared and task_payload variables in task/mesh shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
123d0b8a75
radv: Allow linking task shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
73c260594f
radv: Postprocess task shader configuration.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
c17c523ec0
radv: Use I/O lowering for task and mesh shaders.
...
We set the number of task shader ring entries in radv_device
based on the generous assumption that each CU can run task/mesh
shaders with maximum occupancy.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
6e8f3677c7
radv: Enable nir_opt_offsets for task shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
a8bdcf3c92
radv: Implement task shader intrinsics in the ABI.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
a8c1f10294
radv: Add task ring entry argument for mesh shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
b3ea6c6103
radv: Add task shader arguments.
...
Mostly the same as for compute shaders, but with a few extras:
task_ring_offsets:
Same as what ring_offsets is to graphics shaders.
Contains an address that points to a buffer that contains
the ring buffer descriptors.
task_ring_entry:
Index that can be used to address the draw and payload rings.
draw_id:
Same meaning as in graphics shaders.
task_ib_addr/task_ib_stride:
Indirect buffer address and stride from the draw calls.
These are used to emulate the firstTask feature of NV_mesh_shader.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
101a7321c4
radv: Fill task shader info.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
c34aa78496
radv: Set wave size for task shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
988600e522
radv: Set user data register for task shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
bb71d1092b
radv: Add radv_pipeline_has_task helper.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
285d20d3c5
ac: Add task ring entry shader argument.
...
This is going to be used by both task and mesh shaders for
accessing the draw and payload ring buffers.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Timur Kristóf
7de3034897
ac/nir: Add I/O lowering for task and mesh shaders.
...
Task shaders store their output payload to VRAM where mesh
shaders read from. There are two ring buffers:
1. Draw ring: this is where mesh dispatch sizes and
the ready bit are stored.
2. Payload ring: this is where the optional payload
is stored (up to 16K per task workgroup).
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929 >
2022-05-12 00:29:51 +00:00
Dave Airlie
24176cae55
aco: drop unused radv include
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342 >
2022-05-11 19:07:11 +00:00
Dave Airlie
c44d5d61ce
aco: remove radv vs prolog key from aco internals.
...
This creates an aco specific key, and converts radv to it.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342 >
2022-05-11 19:07:11 +00:00
Dave Airlie
04c07a2413
aco/radv: convert to aco shader info at the radv level.
...
This removes the radv shader info type from aco completely.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342 >
2022-05-11 19:07:11 +00:00
Dave Airlie
199edce84d
aco/info: add some more fields.
...
These fields are also used in aco.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342 >
2022-05-11 19:07:11 +00:00
Dave Airlie
8cfd8420ab
aco: convert vs and so info over to aco structs.
...
This renames the vs to vp (vertex pipeline) on the way past.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342 >
2022-05-11 19:07:11 +00:00