Timur Kristóf c17c523ec0 radv: Use I/O lowering for task and mesh shaders. ... We set the number of task shader ring entries in radv_device based on the generous assumption that each CU can run task/mesh shaders with maximum occupancy. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929>		2022-05-12 00:29:51 +00:00
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addrlib	amd: add chip identification for gfx1100-1103	2022-05-10 04:29:55 +00:00
ci	ci: Fix tests expectations	2022-05-04 23:39:15 +00:00
common	ac: Add task ring entry shader argument.	2022-05-12 00:29:51 +00:00
compiler	aco: drop unused radv include	2022-05-11 19:07:11 +00:00
drm-shim	Use proper types for meson objects	2022-04-18 13:03:08 +03:00
llvm	ac/llvm: Remove now-superfluous intrinsics and ABI callbacks.	2022-05-10 17:16:03 +00:00
registers	amd: add gfx11 to packet definitions	2022-05-10 04:29:54 +00:00
vulkan	radv: Use I/O lowering for task and mesh shaders.	2022-05-12 00:29:51 +00:00
.clang-format	radv: allow holes in inline push constants	2022-04-12 11:44:30 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00