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radv,aco: export alpha-to-coverage via MRTZ on GFX11

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
This commit is contained in:
Samuel Pitoiset 2022-05-06 12:39:13 +02:00 • committed by Marge Bot
parent b6ba4cb407
commit 5a119f15aa
3 changed files with 30 additions and 0 deletions
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24
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -10749,6 +10749,23 @@ export_fs_mrt_z(isel_context* ctx)
values[1] = Operand(ctx->outputs.temps[FRAG_RESULT_SAMPLE_MASK * 4u]);
enabled_channels |= ctx->program->chip_class >= GFX11 ? 0x2 : 0xc;
}
if (ctx->options->key.ps.alpha_to_coverage_via_mrtz &&
(ctx->outputs.mask[FRAG_RESULT_DATA0] & 0x8)) {
/* MRT0 alpha should be in Y[31:16] if alpha-to-coverage is enabled and MRTZ is present. */
assert(ctx->program->chip_class >= GFX11);
Operand mrtz_alpha = Operand(ctx->outputs.temps[FRAG_RESULT_DATA0 + 3u]);
mrtz_alpha =
bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand::c32(16u), mrtz_alpha);
if (ctx->program->info.ps.writes_sample_mask) {
/* Ignore the high 16 bits of the sample mask. */
values[1] = bld.vop3(aco_opcode::v_and_or_b32, bld.def(v1), values[1],
Operand::c32(0x0000ffffu), mrtz_alpha);
} else {
values[1] = mrtz_alpha;
}
enabled_channels |= 0x2;
}
} else {
if (ctx->program->info.ps.writes_z) {
values[0] = Operand(ctx->outputs.temps[FRAG_RESULT_DEPTH * 4u]);
@ -10764,6 +10781,13 @@ export_fs_mrt_z(isel_context* ctx)
values[2] = Operand(ctx->outputs.temps[FRAG_RESULT_SAMPLE_MASK * 4u]);
enabled_channels |= 0x4;
}
if (ctx->options->key.ps.alpha_to_coverage_via_mrtz &&
(ctx->outputs.mask[FRAG_RESULT_DATA0] & 0x8)) {
assert(ctx->program->chip_class >= GFX11);
values[3] = Operand(ctx->outputs.temps[FRAG_RESULT_DATA0 + 3u]);
enabled_channels |= 0x8;
}
}
/* GFX6 (except OLAND and HAINAN) has a bug that it only looks at the X

3
src/amd/vulkan/radv_pipeline.c
View file

@ -3120,6 +3120,9 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline,
key.ps.is_int8 = blend->col_format_is_int8;
key.ps.is_int10 = blend->col_format_is_int10;
}
if (pipeline->device->physical_device->rad_info.chip_class >= GFX11) {
key.ps.alpha_to_coverage_via_mrtz = G_028B70_ALPHA_TO_MASK_ENABLE(blend->db_alpha_to_mask);
}
key.vs.topology = vi_info->primitive_topology;

3
src/amd/vulkan/radv_shader.h
View file

@ -97,6 +97,9 @@ struct radv_pipeline_key {
bool lower_discard_to_demote;
uint8_t enable_mrt_output_nan_fixup;
bool force_vrs_enabled;
/* Used to export alpha through MRTZ for alpha-to-coverage (GFX11+). */
bool alpha_to_coverage_via_mrtz;
} ps;
struct {