Commit graph

10489 commits

Author SHA1 Message Date
Georg Lehmann
ba63263f32 nir: add bfdot2_bfadd and use it for lowering bfdot if supported
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34768>
2025-05-09 11:20:26 +00:00
Georg Lehmann
02e743c99e nir: add an option to lower bf2f and f2bf
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34768>
2025-05-09 11:20:25 +00:00
Georg Lehmann
e8f5c335ff radv,aco,nir: keep the A and B base type for cmat_muladd_amd
With bfloat16, and the two fp8 formats in the future, using just the bit size
to identify the types is no longer possible.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34768>
2025-05-09 11:20:25 +00:00
Rhys Perry
ddef4bddf8 ac/nir: round components when lowering 8/16-bit loads to 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
2025-05-08 13:30:50 +00:00
Rhys Perry
f538cae743 nir/algebraic: optimize ior(unpack_4x8, unpack_4x8<<8) to unpack_32_2x16
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
2025-05-08 13:30:50 +00:00
Rhys Perry
10f4264936 nir/search: extend swizzle_y
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
2025-05-08 13:30:50 +00:00
Job Noorman
6a57bfb004 nir/lower_io_to_vector: remove can_read_output assert
Since we're not creating new output reads, just vectorizing existing
ones, this isn't the place to assert whether we can actually read
outputs.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <anholt@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34784>
2025-05-08 08:18:24 +00:00
Lionel Landwerlin
9d342081e7 brw/nir: add intrinsics to read attribute payload register indirectly
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>
2025-05-08 06:48:35 +00:00
Lionel Landwerlin
c467444670 brw/nir: use a new intrinsic for fs_msaa_flag
Avoid NIR code doing offset computations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>
2025-05-08 06:48:34 +00:00
Lionel Landwerlin
99580a815f compiler: add VARYING_BIT_PRIMITIVE_INDICES
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>
2025-05-08 06:48:34 +00:00
Lionel Landwerlin
07303c3fbc compiler: add VARYING_BIT_CULL_PRIMITIVE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>
2025-05-08 06:48:34 +00:00
Marek Olšák
f58c0cbb6a nir: split *_accessed_indirectly* bitmasks into *_read/written_indirectly*
for AMD

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
2025-05-08 02:54:12 +00:00
Marek Olšák
afd8fefb79 nir: add shader_info::tess::tcs_cross_invocation_outputs_written
for AMD

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
2025-05-08 02:54:12 +00:00
Alyssa Rosenzweig
92f553bcff vtn: remove spurious texel buffer warning
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The spec text here is:

   Image Type must be an OpTypeImage. It is the type of the image in the
   combined sampler and image type. It must not have a Dim of SubpassData.
   Additionally, starting with version 1.6, it must not have a Dim of Buffer.

For older SPIR-V versions, there is no analogous requirement. It is implicitly
valid to use a Dim of Buffer (even though it doesn't make much sense). Should
apps do it anyway? Probably not, but it doesn't matter and they do.
glslang considers this requirement relevant only for 1.6+:

   if (glslangIntermediate->getSpv().spv >= glslang::EShTargetSpv_1_6 &&
       texType.getSampler().isBuffer()) {
       // SamplerBuffer is not supported in spirv1.6 so
       // `samplerBuffer(textureBuffer, sampler)` is a no-op
       // and textureBuffer is the result going forward
       constructed = arguments[0];
   } else
       constructed = builder.createOp(spv::OpSampledImage, resultType(), arguments);

That means SPIR-V with an older declared version will warn even with a glslang
new enough to know about the 1.6 requirement. That includes a *lot* of SPIR-V's
built with the CTS.

I see no compelling reason to keep the warning for older than 1.6. Removing the
spurious warning silences a *huge* amount of noise from dEQP-VK (plus a bit from
KHR-GL46). In exchange I see very little tradeoff, it's not really our job to
lint for best practices not in the spec.

I see two viable options:

1. Try to convince the whole ecosystem outside of Mesa to pivot to our pedantic
   reading of the spec and get them to update all the old SPIR-V binaries in the
   wild, in the case of CTS being changed at the glslang level and then
   trickling down into CTS.
2. Merge this patch, simplifying Mesa and immediately forget about this forever.

I'm spending all my FOSS political capital on kernel upstreaming so I have a
strong preference for #2, aka hitting Marge on this MR and then moving on with
all of our lives.

("Ignore the problem and make deqp-runner annoying to use" is the secret 3rd
option I'd rather not do.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34847>
2025-05-07 22:26:02 +00:00
Kai Wasserbäch
531c6696d4 fix(FTBFS): clc: switch to new non-owned TargetOptions for LLVM 21
Upstream hid the `TargetOptions` in commit 985410f87f2d19910a8d327527fd30062b042b63

Use the new `getTargetOpts()` to obtain the `TargetOptions` for
`setTarget()`.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13079
Reference: 985410f87f
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34835>
2025-05-07 08:20:19 +00:00
Alyssa Rosenzweig
5788770d91 nir: add nir_lower_default_point_size pass
this is useful across drivers for maint5 semantics on mobile hw.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34762>
2025-05-06 17:07:00 +00:00
Samuel Pitoiset
02d7c8f9d3 spirv: Update the JSON and headers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
2025-05-05 15:02:19 +00:00
Rhys Perry
75880655f8 nir/lower_gs_intrinsics: silence warning
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c: In function ‘nir_lower_gs_intrinsics’:
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:523:93: warning: ‘state’ may be used uninitialized [-Wmaybe-uninitialized]
  523 |             state.decomposed_primitive_count_vars[i] = state.decomposed_primitive_count_vars[0];
      |                                                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:464:17: note: ‘state’ declared here
  464 |    struct state state;
      |                 ^~~~~

It's always initialized by the first iteration of the loop, but GCC
doesn't seem to know that.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
2025-05-05 11:45:42 +00:00
Rhys Perry
bc49045294 nir/opt_shrink_vectors: add assume to silence warning
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c: In function ‘shrink_dest_to_read_mask’:
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:140:36: warning: writing 16 bytes into a region of size 15 [-Wstringop-overflow=]
  140 |             swizzle[first_bit + i] = i;
      |             ~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:138:18: note: at offset [1, 15] into destination object ‘swizzle’ of size 16
  138 |          uint8_t swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
      |                  ^~~~~~~

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
2025-05-05 11:45:42 +00:00
Ella Stanforth
32d9afdf73 nir/printf: add new helper to printf at a specific pixel.
Debugging with nir_printf_fmt can result in overwhelming information. This
allows us to filter for a pixel we care about.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34737>
2025-05-05 06:20:18 +00:00
Ella Stanforth
43f22110e7 nir/printf: break out va_list handling
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34737>
2025-05-05 06:20:17 +00:00
Rhys Perry
1d7a988ec2 vtn: use nir_const_value_for_raw_uint for bfloat SpecConstantOp/FConvert
I'm not sure how this was supposed to ensure padding was zero, and it
doesn't seem to work for me (GCC 15.0.1).

Fixes a NIR validation failure with dEQP-VK.glsl.bfloat16.constant.compute
and RADV.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 90e1b12890 ("spirv: Add bfloat16 support to SpecConstantOp")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34769>
2025-05-01 10:52:30 +00:00
Christian Gmeiner
f17d350001 lima: Move fdot lowering from NIR to lima
This change relocates the fdot lowering from the generic NIR to the lima,
since lima is the only consumer of this particular lowering. This avoids
potential conflicts with the similar fdot lowering already present in
nir_lower_alu_width.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34757>
2025-04-30 17:33:38 +00:00
Rohan Garg
2bbe042e87 spirv: Enable bfloat16 capabilities
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
e0b195cadb spirv: Use bfdot for SpvOpDot with BFloat16
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
2807097690 spirv: Implement Conversions to/from bfloat16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
90e1b12890 spirv: Add bfloat16 support to SpecConstantOp
Handle bfloat16 by converting sources to float, performing the
operation, and converting result back to bfloat16 if needed.  This is
done because not all ALU ops have a `bf` version in NIR.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Rohan Garg
dc8074683d spirv: construct a bfloat16 from the given SPIR-V bitsize and encoding
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
fb6ae2eac1 spirv: Refactor to use glsl_type to pick ALU ops
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
bba607ac2b spirv: Move Convert opcodes handling to its own function
Take the opportunity to add a comment about why the bit_size
comes from the NIR def and not the original type.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
a38960e8f3 brw, nir: Use glsl_base_type instead of nir_alu_type for @dpas_intel
This will allow including types that don't have a nir_alu_type
equivalent, like bfloat16.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
cf4021f93c nir: Add opcodes for BFloat16
SPV_KHR_bfloat16 requires a small set of operations,
since it doesn't support all the arithmetic ops.

This patch adds conversions to/from Float32 and also
the necessary ops (bfdot, bffma, bfmul) to implement
SpvOpDot using the same lowering approach than the
Float32 counterpart.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:36 +00:00
Rohan Garg
9e5d7eb88d compiler/types: add a bfloat16 type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:36 +00:00
Dmitry Baryshkov
419a9e9d42 mesa-clc: add an option to force inclusion of OpenCL headers
Currently mesa-clc bundles OpenCL headers from Clang only if the static
LLVM is used (which means Clang / LLVM are not present on the target
system). In some cases (e.g. when building in OpenEmbedded environemnt)
it is desirable to have shared LLVM library, but skip installing the
whole Clang runtime just to compile shaders. Add an option that forces
OpenCL headers to be bundled with the mesa-clc binary.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34551>
2025-04-24 11:40:15 +00:00
Marek Olšák
55db7fc18c nir/opt_varyings: group TES inputs based on whether they are used by POS or VAR
If the optional flag is set, compaction groups TES inputs based on which
outputs they are used for:
- inputs generating only POS/CLIP outputs are first
- inputs generating both POS/CLIP and VAR outputs are next
- inputs generating only VAR outputs are last

shader-db with ACO:
    143 shaders have -1.44% average decrease in code size.
    There are fewer input loads and more of them are vec4 instead of vec1-3.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32262>
2025-04-23 17:47:37 +00:00
Marek Olšák
f15399af0f nir: add gathering passes that gather which inputs affect specific outputs
The first pass computes which shader instructions contribute to each
output. It can be used to query how data flows within shaders towards
outputs.

The second pass computes which shader input components and which types of
memory loads are used to compute shader outputs.

The third pass uses the second pass to gather which input components are
used to compute pos and clip dist outputs, which input components are used
to compute all other outputs, and which input components are used to
compute both. This will be used by compaction in nir_opt_varyings for
drivers that split TES into a separate position cull shader and varying
shader to make it less likely that the same vec4 inputs are needed in both.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32262>
2025-04-23 17:47:37 +00:00
Karol Herbst
33965bb21b nir_lower_mem_access_bit_sizes: fix negative chunk offsets
With a 64 bit pointer model, instead of doing -1 the pass ended up doing
+4294967295. The reason here was some implicit integer conversion going
horribly wrong, so just do the offset math in 64 bit to get a nice result.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13023
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34669>
2025-04-23 16:59:56 +00:00
Ella Stanforth
b38c4e8982 nir/alpha_to_coverage: Add an intrinsic for better dithering
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33942>
2025-04-23 09:03:41 +00:00
Ella Stanforth
d3aedbfe9d asahi/lib: Move alpha_to_one and alpha_to_coverage lowering to common code.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33942>
2025-04-23 09:03:41 +00:00
Georg Lehmann
6d7e67d986 nir,amd: add neg_lo/hi modifiers to cmat_matmul_amd
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34396>
2025-04-22 16:08:55 +00:00
Georg Lehmann
3e26fc4498 nir/opt_algebraic: disable fsat(a + 1.0) opt if a can be NaN
Foz-DB Navi21:
Totals from 9 (0.01% of 79789) affected shaders:
Instrs: 6782 -> 6796 (+0.21%); split: -0.03%, +0.24%
CodeSize: 40020 -> 40108 (+0.22%); split: -0.04%, +0.26%
Latency: 23764 -> 23758 (-0.03%)
InvThroughput: 6424 -> 6431 (+0.11%); split: -0.08%, +0.19%
SClause: 273 -> 275 (+0.73%)
Copies: 338 -> 339 (+0.30%)
VALU: 5138 -> 5147 (+0.18%); split: -0.06%, +0.23%
SALU: 349 -> 350 (+0.29%)
SMEM: 498 -> 500 (+0.40%)

Fixes: a4a3487aae ("nir/opt_algebraic: optimize patterns from Skia")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:05 +00:00
Georg Lehmann
a60d61cce8 nir: improve fadd is_a_number analysis by using the range
Foz-DB Navi21:
Totals from 145 (0.18% of 79789) affected shaders:
Instrs: 168553 -> 168391 (-0.10%); split: -0.10%, +0.00%
CodeSize: 926708 -> 926684 (-0.00%)
Latency: 2210456 -> 2210329 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 545992 -> 545768 (-0.04%)
SClause: 3084 -> 3085 (+0.03%)
VALU: 129521 -> 129360 (-0.12%)
SALU: 13085 -> 13084 (-0.01%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:05 +00:00
Georg Lehmann
a6fd9f488a nir: add is_a_number analysis for ffma
Foz-DB Navi21:
Totals from 508 (0.64% of 79789) affected shaders:
Instrs: 796183 -> 795838 (-0.04%)
CodeSize: 4303420 -> 4303384 (-0.00%); split: -0.00%, +0.00%
Latency: 7806095 -> 7805458 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 1377028 -> 1376824 (-0.01%); split: -0.01%, +0.00%
Copies: 63297 -> 63299 (+0.00%); split: -0.00%, +0.00%
PreVGPRs: 29818 -> 29819 (+0.00%)
VALU: 562067 -> 561885 (-0.03%); split: -0.03%, +0.00%
SALU: 89896 -> 89733 (-0.18%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:05 +00:00
Georg Lehmann
cb6d035925 nir: add range analysis for ffmaz
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:05 +00:00
Georg Lehmann
8ad695195e nir/opt_algebraic: turn exact fmin(1.0, a) into fsat if a is not NaN and not negative
Foz-DB Navi21:
Totals from 2456 (3.08% of 79789) affected shaders:
Instrs: 3415398 -> 3413352 (-0.06%); split: -0.06%, +0.00%
CodeSize: 18781096 -> 18776092 (-0.03%); split: -0.03%, +0.00%
VGPRs: 158512 -> 158528 (+0.01%)
Latency: 39528900 -> 39526687 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 10612237 -> 10609296 (-0.03%); split: -0.03%, +0.00%
VClause: 71028 -> 71034 (+0.01%)
SClause: 93971 -> 93975 (+0.00%); split: -0.00%, +0.01%
Copies: 257525 -> 257521 (-0.00%); split: -0.01%, +0.01%
VALU: 2483374 -> 2481325 (-0.08%); split: -0.09%, +0.00%
SALU: 348207 -> 348211 (+0.00%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:04 +00:00
Georg Lehmann
18a0de1834 nir/opt_algebraic: optimize fmax(ffma(a, b, c), 0.0) to fsat
Foz-DB Navi21:
Totals from 2621 (3.28% of 79789) affected shaders:
MaxWaves: 55744 -> 55736 (-0.01%)
Instrs: 2840180 -> 2832647 (-0.27%); split: -0.27%, +0.00%
CodeSize: 15497364 -> 15464692 (-0.21%); split: -0.21%, +0.00%
VGPRs: 138448 -> 138456 (+0.01%)
Latency: 22319512 -> 22307018 (-0.06%); split: -0.06%, +0.01%
InvThroughput: 5745108 -> 5729197 (-0.28%); split: -0.28%, +0.00%
Copies: 110279 -> 110268 (-0.01%); split: -0.04%, +0.03%
VALU: 2210578 -> 2203211 (-0.33%); split: -0.33%, +0.00%
SALU: 169014 -> 168841 (-0.10%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:04 +00:00
Georg Lehmann
f71fc26393 nir/opt_algebraic: generalize fmax(fadd(a, b), 0.0) to fsat by not requiring fneg
Not a large effect, but it's positive and makes the pattern simpler.

Foz-DB Navi21:
Totals from 1 (0.00% of 79789) affected shaders:
Instrs: 145 -> 138 (-4.83%)
CodeSize: 784 -> 756 (-3.57%)
Latency: 1495 -> 1487 (-0.54%)
InvThroughput: 210 -> 196 (-6.67%)
VALU: 103 -> 96 (-6.80%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
2025-04-22 14:23:04 +00:00
Alyssa Rosenzweig
f1aeb46a34 nir: factor out nir_verts_in_output_prim helper
very useful for geometry shader lowering code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34638>
2025-04-22 12:47:54 +00:00
Job Noorman
f269c7b3b5 nir/opt_shrink_vectors: enable for load_ubo_vec4
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34600>
2025-04-18 15:56:02 +00:00
Konstantin Seurer
978e9b670e aco,nir: Add support for new GFX12 ray tracing instructions
Adds image_bvh_dual_intersect_ray and image_bvh8_intersect_ray which can
handle the new BVH format. Both instructions write up to 10 VGPRs so
they need to use a vec16 definition in nir.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00