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nir: add shader_info::tess::tcs_cross_invocation_outputs_written
for AMD Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
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2 changed files with 16 additions and 2 deletions
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@ -181,6 +181,9 @@ set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len,
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shader->info.outputs_written |= bitfield;
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if (indirect)
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shader->info.outputs_accessed_indirectly |= bitfield;
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if (cross_invocation && shader->info.stage == MESA_SHADER_TESS_CTRL)
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shader->info.tess.tcs_cross_invocation_outputs_written |= bitfield;
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}
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}
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@ -630,6 +633,11 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
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}
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}
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if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
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instr->intrinsic == nir_intrinsic_store_per_vertex_output &&
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!src_is_invocation_id(nir_get_io_arrayed_index_src(instr)))
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shader->info.tess.tcs_cross_invocation_outputs_written |= slot_mask;
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if (shader->info.stage == MESA_SHADER_MESH &&
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(instr->intrinsic == nir_intrinsic_store_per_vertex_output ||
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instr->intrinsic == nir_intrinsic_store_per_primitive_output) &&
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@ -1020,6 +1028,7 @@ nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
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shader->info.tess.tcs_same_invocation_inputs_read = 0;
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shader->info.tess.tcs_cross_invocation_inputs_read = 0;
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shader->info.tess.tcs_cross_invocation_outputs_read = 0;
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shader->info.tess.tcs_cross_invocation_outputs_written = 0;
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}
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if (shader->info.stage == MESA_SHADER_MESH) {
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shader->info.mesh.ms_cross_invocation_output_access = 0;
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@ -519,15 +519,20 @@ typedef struct shader_info {
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*/
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uint64_t tcs_same_invocation_inputs_read;
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/* Bit mask of TCS per-vertex inputs (VS outputs) that are used
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/* Bit mask of TCS per-vertex inputs (VS outputs) that are read
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* with a vertex index that is NOT the invocation id
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*/
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uint64_t tcs_cross_invocation_inputs_read;
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/* Bit mask of TCS per-vertex outputs that are used
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/* Bit mask of TCS per-vertex outputs that are read
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* with a vertex index that is NOT the invocation id
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*/
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uint64_t tcs_cross_invocation_outputs_read;
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/* Bit mask of TCS per-vertex outputs that are written
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* with a vertex index that is NOT the invocation id
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*/
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uint64_t tcs_cross_invocation_outputs_written;
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} tess;
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/* Applies to MESH and TASK. */
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