Commit graph

218202 commits

Author SHA1 Message Date
Martin Roukala (né Peres)
8fe2280e47 ci: disable the valve-kws farm
We are having problem establishing connections to
gitlab.freedesktop.org, even though performance once the link is
established is perfectly fine (10+ MB/s)... so let's disable the
farm until we can figure it out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39719>
2026-02-05 16:15:50 +00:00
Luigi Santivetti
6a65b5dd4d pvr: fix src/dst image formats for DS resolve ops
This change only addresses the clear of one channel via the TQ for DS
formats. This is exercised by VK_KHR_depth_stencil_resolve in two ways:
resolve depth and clear stencil, or resolve stencil and clear depth.

When resolving, we need to propagate source and destination format if the
DS format is combined because we need either combination of both for cases
where the DSMERGE and PICKD flags are set.

- Resolve op
  + For combined DS formats
    1. resolve the stencil from the source merging it with the depth of the
       destination. Leave source depth unchanged.
    2. resolve the depth from the source merging it with the stencil of the
       destination. Leave the source stencil untouched.
  + For non-combined formats
    1. we can use the source for all aspects / channels, this ensures the
       size to blit the source to is compatible with the destination. Note
       that the TQ doesn't require src/dst to be single channel formats.

- Non resolve op
  + Not part of this change.

Fix for deqp:
  dEQP-VK.renderpass2.depth_stencil_resolve.*.*.d24_unorm_s8_uint.compatibility*
  dEQP-VK.renderpass2.depth_stencil_resolve.*.*.d32_sfloat_s8_uint.compatibility*

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Co-authored-by: Leon Perianu <leon.perianu@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39654>
2026-02-05 16:01:38 +00:00
Luigi Santivetti
407e692c3c pvr: fix logic for setting DSMERGE and PICKD
In order to set DSMERGE, and eventually PICKD-epth, both the source and
the destination have to be combined D/S formats.
Removed tests that now currently pass

Fix for deqp:
  dEQP-VK.renderpass2.depth_stencil_resolve.*.*.d32_sfloat_s8_uint.*
  dEQP-VK.renderpass2.depth_stencil_resolve.*.*.d24_unorm_s8_uint.*

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39654>
2026-02-05 16:01:38 +00:00
Simon Perretta
05e6d6ca83 pvr: handle SRC_SMRG_D32S8_D32S8 in tq shader
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39654>
2026-02-05 16:01:37 +00:00
Leon Perianu
5552d5d1a9 pvr: fix logic for when to reset fill blit
Fix loop condition in pvr_isp_ctrl_stream to reset fill_blit
when processing fill blits with sources.

Fix for deqp:
  dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.*.d24_unorm_s8_uint.*
  dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.*.d24_unorm_s8_uint.*
  dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.*.d24_unorm_s8_uint.*
  dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.*.d24_unorm_s8_uint.*
  dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.*.d24_unorm_s8_uint.*

Signed-off-by: Leon Perianu <leon.perianu@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39654>
2026-02-05 16:01:37 +00:00
Erik Faye-Lund
f894153142 panfrost: expose EXT_shader_image_load_store
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39686>
2026-02-05 15:40:19 +00:00
Erik Faye-Lund
394d5928bd panfrost: also check for PAN_BIND_STORAGE_IMAGE
Since d95423686f ("pan/format: Add PAN_BIND_STORAGE_IMAGE flag"), we
have a separate flag for PAN_BIND_STORAGE_IMAGE, and can now also
properly check for this.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39686>
2026-02-05 15:40:19 +00:00
Erik Faye-Lund
4361977291 panfrost: group image load/store flags a bit
There's no good reason we need to keep these separated, they're the same
feature from a HW point-of-view.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39686>
2026-02-05 15:40:19 +00:00
Tapani Pälli
331238e44e iris: set DisableAnyMCTRresponsefix to zero on init
Some checks are pending
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This is to make sure early culling related Wa_16020518922 is enabled
properly.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39712>
2026-02-05 15:09:02 +00:00
Tapani Pälli
9aaed82543 anv: set DisableAnyMCTRresponsefix to zero on init
This is to make sure early culling related Wa_16020518922 is enabled
properly.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14204
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39712>
2026-02-05 15:09:02 +00:00
Tapani Pälli
61b5e91bba intel/genxml: add CHICKEN_RASTER_2 with required bit for Xe3
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39712>
2026-02-05 15:09:02 +00:00
Caterina Shablia
03ea0cac36 panvk: leave a TODO for U-interleaved copies
Some checks are pending
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Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39657>
2026-02-05 12:37:52 +00:00
Caterina Shablia
5ea7f1a04d pan/lib: use interleaved 64k in more cases
Interleaved 64k should be better than U-interleaved for most
workloads so use it if we can and memory waste isn't too bad.

This also improves perf in cases when we can't use U-interleaved,
but can use interleaved 64k, such as BLOCK_TEXEL_VIEW_COMPATIBLE
images. Currently we'll end up picking linear, which is strictly
worse than interleaved 64k when it comes to perf.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39657>
2026-02-05 12:37:52 +00:00
Caterina Shablia
e2256ed15a panvk: never report identicalMemoryLayout
Currently it's not easy to know which modifier will be picked for
an image and thus end up causing a layout difference. The next
commit causes us, for certain images, to choose interleaved 64k if
HOST_TRANSFER is not specified, but choose U-interleaved when it
is, causing a layout difference.

See https://gitlab.freedesktop.org/panfrost/mesa/-/issues/281 for
details.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39657>
2026-02-05 12:37:52 +00:00
Christian Gmeiner
9e3967ea9b panvk: Support VK_EXT_zero_initialize_device_memory
Advertise the extension and enable the zeroInitializeDeviceMemory
feature. The panfrost and panthor kernel drivers uses drm_gem_shmem which
gets zeroed pages from the shmem subsystem, so memory is already
zero-initialized by default.

VK_IMAGE_LAYOUT_ZERO_INITIALIZED_EXT is treated the same as
VK_IMAGE_LAYOUT_UNDEFINED. Since panvk doesn't use image layouts
(layout transitions are no-ops), no special barrier handling is
needed for either layout.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39658>
2026-02-05 11:56:38 +00:00
Christian Gmeiner
3f1bdfa8b4 pan/format: Disable storage image support for compressed formats
Compressed formats cannot support storage operations on any Mali
generation:

- On Bifrost (v6-v7), the texture descriptor contains the compressed
  format directly, and the hardware doesn't support storage operations
  on compressed formats.

- On Valhall (v9+), storage operations would require
  InternalConversionDescriptors, which cannot describe compressed
  formats.

Storage operations on compressed formats don't make practical sense
anyway - each pixel write would require full block recompression.

Remove PAN_BIND_STORAGE_IMAGE from the FMTC macro used by all
compressed format definitions.

Fixes crashes in dEQP-VK.memory.zero_initialize_device_memory tests
that attempt to use compressed formats as storage images.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39658>
2026-02-05 11:56:38 +00:00
Iago Toral Quiroga
42bd467906 broadcom/compiler: inform NIR scheduler about 0 cost ALU instructions
Some ALU instructions will likely end up being copy propagated in the
backend, which means they would not have any cost. This helps the
scheduler make better decisions for the new open-coded patterns
produced in NIR for extracts (i.e. unpack_2x16) with MR#39511.
With this (together with previous patches) we manage to produce similar
shader-db results as with the unpack_2x16 NIR extract opcodes that
MR#39511 will drop.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39687>
2026-02-05 11:29:42 +00:00
Iago Toral Quiroga
f93e8e76e9 broadcom/compiler: optimize alu(shr(x, 16).l) to alu(x.h)
We need this to produce optimal code in the backend for sequences
like this:

   32   %10 = ushr %5.x, %9 (0x10)
   16   %14 = u2u16 %10
   32   %17 = f2f32 %14

With such code, our copy propagation pass will drop the u216 and
with this patch we will be able to drop the ushr too.

This pattern can show up for VK_KHR_16bit_storage when we successfully
vectorize 16-bit loads into 32-bit loads, but will become a lot more
common after MR#39511 lands, since that would also affect things like
16-bit TMU loads, which are more common.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39687>
2026-02-05 11:29:42 +00:00
Iago Toral Quiroga
4753a296f9 broadcom/compiler: don't always clear undefined bits from sub-32 integers
We only really use sub-32bit integers in conversions, so we can skip
clearing the MSB bits when we produce them by converting from larger types
(leaving these bits undefined) and only clear them when we convert from them
to larger types, since we don't have native opcodes to do these conversions
that would only access relevant bits, at least on Pi4. Also, document the
cases where we could do better for Pi5.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39687>
2026-02-05 11:29:42 +00:00
Iago Toral Quiroga
c589268b5c broadcom/compiler: drop unnecessary MOV
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39687>
2026-02-05 11:29:41 +00:00
Erik Faye-Lund
2f957d5bad pan/ci: clean up t720 expectations
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There's a lot that has been fixed, but nobody has been paying attentions
to t720. Let's update the results.

In addition, we used to do skips here instead of flakes. Not sure why,
flakes works just fine.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39711>
2026-02-05 11:14:50 +00:00
Samuel Pitoiset
65c1c66412 radv: stop delaying decompression passes for feedback loops with DRLR
This was an oversight of VK_KHR_dynamic_rendering_local_read which has
been addressed by VK_KHR_maintenance10 which introduced new flags to
give more information to implementations.

The Vulkan spec says:
    "VK_RENDERING_ATTACHMENT_INPUT_ATTACHMENT_FEEDBACK_BIT_KHR is
     intended to give implementations similar information as a subpass
     where an attachment could be used as both a color attachment and
     input attachment. Some implementations require extra work to make
     this scenario work beyond just considering the image layouts.
     Implementations which have no such considerations may treat this
     flag as a noop. The primary use case for this flag is to enable
     feedback loops inside a single shader."

    "Applications are encouraged to use
     VK_RENDERING_LOCAL_READ_CONCURRENT_ACCESS_CONTROL_BIT_KHR if
     maintenance10 is available and they use feedback loops with
     VK_KHR_dynamic_rendering_local_read. Feedback loops are still
     allowed when not using the rendering flag, but the performance
     implication was an oversight in the original definition of
     VK_KHR_dynamic_rendering_local_read."

Because it's clearly defined by the Vulkan spec, let's just pessimize
always to avoid relying on some shaders state which require to do very
late decompression passes. This will allow us to do more cleanups and
optimizations related to the framebuffer. Also note that DRLR is still
a niche feature.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39538>
2026-02-05 10:55:42 +00:00
Arjob Mukherjee
58c7437d3a pvr: Fixup for deqp-vk.api 2d.optimal.* conformance
Its no longer an error for depth and stencil formats to have invalid
accumulator format.

Fixes the following tests:
* dEQP-VK.api.info.image_format_properties.2d.optimal.d16_unorm
* dEQP-VK.api.info.image_format_properties.2d.optimal.d24_unorm_s8_uint
* dEQP-VK.api.info.image_format_properties.2d.optimal.d32_sfloat
* dEQP-VK.api.info.image_format_properties.2d.optimal.d32_sfloat_s8_uint
* dEQP-VK.api.info.image_format_properties.2d.optimal.s8_uint
* dEQP-VK.api.info.image_format_properties.2d.optimal.x8_d24_unorm_pack32

Backport-to: 26.0
Signed-off-by: Arjob Mukherjee <arjob.mukherjee@imgtec.com>
Tested-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39626>
2026-02-05 10:18:09 +00:00
Erico Nunes
f3131bc145 Revert "ci: lima farm maintenance"
This reverts commit ca1d59d813.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39696>
2026-02-05 09:53:38 +00:00
Simon Perretta
ae29e1cf76 pvr: drop pvr_assert macro
The only uses of the macro can be fatal assertions instead.
No point keeping it around, especially as it doesn't work with the ASSERTED
hint to suppress warnings either.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39677>
2026-02-05 09:37:37 +00:00
Juan A. Suarez Romero
143b362c0f broadcom: don't hardcode pagesize
Some checks are pending
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As rpi5 can work with either 16k or 4k pages, instead of hardcoding the
pagesize just query the kernel.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39555>
2026-02-05 08:53:37 +00:00
Michel Dänzer
55d0fb12cd vulkan/wsi/x11: Don't use modifiers when ignoring SUBOPTIMAL
Without SUBOPTIMAL, we'd generally end up picking a modifier which isn't
scanout capable, so direct scanout wasn't possible.

This allows direct scanout to work e.g. in Talos Principle.

v2:
* Also bail from wsi_x11_swapchain_query_dri3_modifiers_changed.
  (Hans-Kristian Arntzen)
* Use use_modifiers helper function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39679>
2026-02-05 08:11:42 +00:00
Michel Dänzer
431aabe79a vulkan/wsi/x11: Guard XCB_PRESENT_OPTION_SUBOPTIMAL by ignore_suboptimal
When ignore_suboptimal is true, we'll ignore
XCB_PRESENT_COMPLETE_MODE_SUBOPTIMAL_COPY anyway, so no point asking for
it.

Suggested by Hans-Kristian Arntzen.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39679>
2026-02-05 08:11:42 +00:00
Mary Guillemard
b524bf368e nvk: Reenable compression support with nouveau 1.4.2
Now that the small/large pages race is fixed, we can safely enable it
back when the kernel side report 1.4.2 support.

Fixes: f3c53cf66b ("nvk: Disable large pages for now")
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39706>
2026-02-05 07:25:16 +00:00
Danylo Piliaiev
124d550a94 docs: Add documentation on how to debug GPU crashes and misrenderings
Some checks are pending
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Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38487>
2026-02-04 21:22:37 +00:00
Danylo Piliaiev
ec6918d7ce docs/envvars: Document TU_DEBUG and IR3_SHADER_DEBUG
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38487>
2026-02-04 21:22:37 +00:00
Aitor Camacho
29900e8229 kk: Fix disabling workaround 4
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Fixes: 67d05f71e9 ("kk: Track fragment helper status since Metal does not correctly demote them")

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39589>
2026-02-04 19:10:32 +00:00
Eric Engestrom
f1a3b6f346 docs: update calendar for 26.0.0-rc3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39700>
2026-02-04 19:05:20 +00:00
Rob Clark
6f80fa4d2b freedreno/decode: Fix query bin vals
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:32 +00:00
Rob Clark
9dbdcb6d53 freedreno/decode: Dump filtered bindless descriptors by default
Now that we can use info from the shaders to better determine which
possible interpretation of a descriptor is (or might be) used, we can
dump descriptor decoding by default without causing a massive spam of
incorrect/impossible descriptor decoding.

The old arg is repurposed to show all descriptors (ie. the previous
behavior).

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:32 +00:00
Rob Clark
8efbe73f3f freedreno/decode: filter unused descriptors in lua
Use the additional shader stats info the do a better job of filtering
impossible descriptor decoding possibilities.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:31 +00:00
Rob Clark
3249e4625e freedreno/decode: call show_descriptor() for UBO and SAMPLERs as well
With the additional shader info, we can determine when a given
descriptor is definitely not a UBO or sampler.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:31 +00:00
Rob Clark
543ef390f4 freedreno/decode: pass more info to descriptor handler
Add the descriptor index and current pm4 packet to the script hook.
Knowing the pm4 packet tells the callback whether it is a 3d draw or
compute shader, so it knows which shader stages to check.  Having the
descriptor index lets the script check against stats extracted from
the relevant enabled shader stages.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:30 +00:00
Rob Clark
9c885fe10f freedreno/decode: add shader stats object
Expose shader descriptor stats to the script environment.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:29 +00:00
Rob Clark
c8d9ff218e freedreno/decode: fix domain decode for "structs"
We were assuming that a non-numerical offset was a pm4/descriptor packet
payload.  This didn't work for ir3_shader_stats which is defined more
like a "struct" (to match a 'C' struct).

Fixes: ebde70cdce ("freedreno/decode: Allow direct access to domain bitfield")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:29 +00:00
Rob Clark
f2e0495dc5 freedreno/decode: Split out domain based decoding
Decouple a bit more from the packet/descriptor handlers, before we start
adding more uses.

Just code motion.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:28 +00:00
Rob Clark
f0b4fbd80f ir3: Disasm shader descriptor stats
Extract stats about the descriptors used by a shader.  A later commit
will use this information to help filter the used descriptors and types.

Unfortunately a1.x usage throws a bit of a wrench into the gears, since
(like s2en) we don't know which tex/samp or even in some cases bindless
base is used.  This could perhaps be improved to detect the commmon case
of an immed value loaded into a1.x.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:28 +00:00
Rob Clark
d93b62c140 ir3: Rename cat6 UBO/UAV descriptor src
Makes it more clear which src arg is the descriptor, and makes it easier
for the disassembler to locate the src which references a descriptor.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:27 +00:00
Rob Clark
d7dc40b32f freedreno/decode: Allow dom[1] to be NULL
The lua script bridge does this.  Allow it.  Fixes crashes when script
tries to index non-existant fields.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:26 +00:00
Bernd Kuhls
248b818407 blake3: add blake3_neon.c only for little endian archs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes build error on big endian archs:

Build machine cpu family: x86_64
Build machine cpu: x86_64
Host machine cpu family: aarch64
Host machine cpu: cortex-a53
Target machine cpu family: aarch64
Target machine cpu: cortex-a53
[...]
../src/util/blake3/blake3_neon.c:6:2: error: #error "This implementation only supports little-endian ARM."
    6 | #error "This implementation only supports little-endian ARM."

as detected by buildroot autobuilders:
https://autobuild.buildroot.net/results/efd/efd07d97df4e0c1ceb07fc26e17898afef5435b9/build-end.log

For reference:
$ grep -i endian output/build/mesa3d-25.3.4/buildroot-build/cross-compilation.conf
endian = 'big'

Signed-off-by: Bernd Kuhls <bernd@kuhls.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39681>
2026-02-04 15:07:42 +00:00
Samuel Pitoiset
13c9e529bd radv: emit pending flushes after late decompressions with fbfetch
If the rendering state is inherited in the secondary, otherwise nothing
wait for the pending flushes after a decompression pass. One more
argument to stop delaying this.

Fixes
dEQP-VK.renderpasses.dynamic_rendering.partial_secondary_cmd_buff.local_read.*

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39678>
2026-02-04 13:49:47 +00:00
Samuel Pitoiset
cbf0a38fa4 ac,radv,radeonsi: shorten some emit macro names
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
config -> cfg
uconfig -> ucfg
context -> ctx

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39680>
2026-02-04 13:27:49 +00:00
Samuel Pitoiset
83ca338e37 radv: disable unordered submits when SQTT queue events are enabled
Otherwise the QueuePresent event is missing and RGP is confused.

Fixes: 82d06b58ad ("radv: use vk_drm_syncobj_copy_payloads")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39158>
2026-02-04 13:04:19 +00:00
Samuel Pitoiset
6d7a1bc6ef radv/amdgpu: bypass GL2 for command buffer BOs
Better for latency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39674>
2026-02-04 12:45:06 +00:00
Caterina Shablia
f242a204ea pan/bi: print shaders with debug info when BIFROST_MESA_DEBUG=shaders,debuginfo is specified
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:12 +00:00