Commit graph

68704 commits

Author SHA1 Message Date
Kenneth Graunke
8dcc1f2c10 nir: Only do gl_FrontFacing workaround in glsl_to_nir for the FS.
Vertex shaders can have shader inputs where location happens to be
VARYING_SLOT_FACE.  Without predicating this on the shader stage,
we suddenly end up with load_front_face intrinsics in vertex shaders,
which is nonsensical.

Fixes spec/arb_vertex_buffer_object/pos-array when using NIR for VS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:04:02 -07:00
Kenneth Graunke
c6f2abe67e nir: Plumb the shader stage into glsl_to_nir().
The next commit needs to know the shader stage in glsl_to_nir().
To facilitate that, we pass the gl_shader rather than the raw exec_list
of instructions.  This has both the exec_list and the stage.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:04:01 -07:00
Kenneth Graunke
b200cbb0a4 nir: Add native_integers to nir_shader_compiler_options.
glsl_to_nir, tgsi_to_nir, and prog_to_nir all want to know whether the
driver supports native integers.  Presumably other passes may as well.

Adding this to nir_shader_compiler_options is an easy way to provide
that information, as it's accessible via nir_shader::options.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:03:57 -07:00
Kenneth Graunke
a55da73be4 nir: Try to make sense of the nir_shader_compiler_options code.
The code in glsl_to_nir is entirely dead, as we translate from GLSL to
NIR at link time, when there isn't a _mesa_glsl_parse_state to pass,
so every caller passes NULL.

glsl_to_nir seems like the wrong place to try and create the shader
compiler options structure anyway - tgsi_to_nir, prog_to_nir, and other
translators all would have to duplicate that code.  The driver should
set this up once with whatever settings it wants, and pass it in.

Eric also added a NirOptions field to ctx->Const.ShaderCompilerOptions[]
and left a comment saying: "The memory for the options is expected to be
kept in a single static copy by the driver."  This suggests the plan was
to do exactly that.  That pointer was not marked const, however, and the
dead code used a mix of static structures and ralloced ones.

This patch deletes the dead code in glsl_to_nir, instead making it take
the shader compiler options as a mandatory argument.  It creates an
(empty) options struct in the i965 driver, and makes NirOptions point
to that.  It marks the pointer const so that we can actually do so
without generating "discards const qualifier" compiler warnings.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-08 20:03:46 -07:00
Kenneth Graunke
2561aea6b3 nir: Delete nir_shader::user_structures and num_user_structures.
Nothing actually uses these, and the only caller of glsl_to_nir()
(brw_fs_nir.cpp) always passes NULL for the _mesa_glsl_parse_state
pointer, meaning they'll always be NULL and 0, respectively.

Just delete them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:03:44 -07:00
Kenneth Graunke
9f1e250e77 glsl: Mark array access when copying to a temporary for the ?: operator.
Piglit's spec/glsl-1.20/compiler/structure-and-array-operations/
array-selection.vert test contains the following code:

   gl_Position = (pick_from_a_or_b ? a : b)[i];

where "a" and "b" are uniform vec4[2] variables.

ast_to_hir creates a temporary vec4[2] variable, conditional_tmp, and
generates an if-block to copy one or the other:

   (declare (temporary) (array vec4 2) conditional_tmp)
   (if (var_ref pick_from_a_or_b)
     ((assign () (var_ref conditional_tmp) (var_ref a)))
     ((assign () (var_ref conditional_tmp) (var_ref b))))

However, we failed to update max_array_access for "a" and "b", so it
remained 0 - here, the whole array is being accessed.  At link time,
update_array_sizes() used this bogus information to change the types
of "a" and "b" to vec4[1].  We then had assignments from a vec4[1] to
a vec4[2], which is highly illegal.

This tripped assertions in nir_split_var_copies with scalar VS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-08 20:03:36 -07:00
Kenneth Graunke
a84f66a9b6 i965/nir: Resolve source modifiers on Gen8+ logic operations.
On Gen8+, AND/OR/XOR/NOT don't support the abs() source modifier, and
negate changes meaning to bitwise-not (~, not -).  This isn't what NIR
expects, so we should resolve the source modifers via a MOV.

+30 Piglits (fs-op-bit{and,or,xor}-not-abs-*).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-03-08 20:03:35 -07:00
Dave Airlie
7c25a4a84d st/mesa: drop unused texture function
This has no users.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-09 10:43:27 +10:00
Dave Airlie
c5e69409d7 mesa/st: remove unused TexData
this isn't hooked up to anything at all from what I can see.

Seems like a left over from commit 5d67d4fbebb(st/mesa: remove
st_TexImage(), use core Mesa code instead).

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-09 09:48:49 +10:00
Rob Clark
fd17db6fe5 freedreno: replace glsl130 debug flag with glsl120
Now that relative-dst works, we should never fall back to the old
compiler.  (Which is almost true, other than a couple edge case sched
fails in piglit).

So replace glsl130 flag to force GLSL 130 and integers on a3xx/a4xx with
a glsl120 flag to force GLSL 120 and !integers.

If this commit breaks any game/app/etc use FD_MESA_DEBUG=glsl120 as a
workaround and please let me know.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
0e8d58b80a gallium/docs: add some freedreno compiler docs
Enable the 'sphinx.ext.graphviz' extension, and add in a section for
driver specific docs, with freedreno compiler docs beneath.  The
goal is for more complete compiler docs, and hopefully some docs about
other parts of the driver (such as how tiling works, etc).

Note that there is also a Distribution -> Drivers section.  Although
that appears to be simply just a list of drivers.  Not sure if that
should move under the 'Drivers' section or left alone.  I did add a
one-line section for freedreno in the existing Distribution -> Drivers
section.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
060d349920 freedreno/ir3: relative dst
To simplify RA, assign arrays that are written to first.  Since enough
dependency information is in the graph to preserve order of reads and
writes of array, so all SSA names for the array collapse into one, just
assign the entire thing by array-id.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
b7703212d8 freedreno/ir3: split out array_fanin() helper
We'll need this too for relative dst..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
17754b70d7 freedreno/ir3: drop deref nodes
The meta-deref instruction doesn't really do what we need for relative
destination.  Instead, since each instruction can reference at most a
single address value, track the dependency on the address register via
instr->address.  This lets us express the dependency regardless of
whether it is used for dst and/or src.

The foreach_ssa_src{_n} iterator macros now also iterates the address
register so, at least in SSA form, the address register behaves as an
additional virtual src to the instruction.  Which is pretty much what
we want, as far as scheduling/etc.

TODO:
For now, the foreach_src{_n} iterators are unchanged.  We could wrap
the address in an ir3_register and make the foreach_src_{_n} iterators
behave the same way.  But that seems unnecessary at this point, since
we mainly care about the address dependency when in SSA form.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
f8f7548f46 freedreno/ir3: helpful iterator macros
I remembered that we are using c99.. which makes some sugary iterator
macros easier.  So introduce iterator macros to iterate all src
registers and all SSA src instructions.  The _n variants also return
the src #, since there are a handful of places that need this.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
26b79ac3e4 freedreno/ir3: fix register usage calculations
For cat1 instructions, use reg() as well for relative src, to ensure
proper accounting of register usage.  Also, for relative instructions,
use reg->size rather than reg->wrmask to determine the number of
components read/written.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
3ecc834e75 freedreno/ir3: couple tweaks for cmdline compiler
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
0f797f7b7d freedreno/ir3: split up ssa_dst
And a couple other trivial renames, to prepare for relative dst.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
27648efa20 freedreno/ir3: fix failed assert in grouping
Turns out there are scenarios where we need to insert mov's in "front"
of an input.  Triggered by shaders like:

  VERT
  DCL IN[0]
  DCL IN[1]
  DCL OUT[0], POSITION
  DCL OUT[1], GENERIC[9]
  DCL SAMP[0]
  DCL TEMP[0], LOCAL
    0: MOV TEMP[0].xy, IN[1].xyyy
    1: MOV TEMP[0].w, IN[1].wwww
    2: TXF TEMP[0], TEMP[0], SAMP[0], 1D_ARRAY
    3: MOV OUT[1], TEMP[0]
    4: MOV OUT[0], IN[0]
    5: END

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Jon TURNEY
72d4f6c67f c99_alloca.h: Also use <alloca.h> for cygwin
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-07 18:18:32 +00:00
Vinson Lee
1ca39ec03c i915: Fix GCC unused-variable warning in release build.
i915_debug_fp.c: In function ‘i915_disassemble_program’:
i915_debug_fp.c:302:11: warning: unused variable ‘size’ [-Wunused-variable]
    GLuint size = program[0] & 0x1ff;
           ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-03-06 21:41:46 -08:00
Mark Janes
b28c037d64 r300g: Fix build, invalid extern "C" around header inclusion.
A previous patch to fix header inclusion within extern "C" neglected
to fix the occurences of this pattern in r300 files.

When the helper to detect this issue was pushed to master, it broke
the build for the r300 driver.  This patch fixes the r300 build.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89477
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 22:08:44 -05:00
Mark Janes
c4b91a1f5c nouveau: Fix build, invalid extern "C" around header inclusion.
A previous patch to fix header inclusion within extern "C" neglected
to fix the occurences of this pattern in nouveau files.

When the helper to detect this issue was pushed to master, it broke
the build for the nouveau driver.  This patch fixes the nouveau build.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89477
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 22:08:11 -05:00
Ilia Mirkin
20346808cf nv50,nvc0: remove bogus 64_FLOAT formats
There is no HW support for these and the VBO pusher doesn't know about
them. No need to, either, since the st will be lowering them to 2x32.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-06 22:06:05 -05:00
Emil Velikov
1e5f833a0d docs: add news item and link release notes for mesa 10.4.6/10.5.0
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-07 00:33:06 +00:00
Emil Velikov
ac9679b1c5 docs: Add sha256 sums for the 10.5.0 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 0d3e4ed134)
2015-03-07 00:25:05 +00:00
Emil Velikov
b48774e7d8 docs: Update 10.5.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 97357d475f)
2015-03-07 00:25:01 +00:00
Emil Velikov
19c5bee101 docs: Add sha256 sums for the 10.4.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit fc9dd495b2)
2015-03-07 00:24:57 +00:00
Emil Velikov
9fe27c7b99 Add release notes for the 10.4.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 542a754524)
2015-03-07 00:24:54 +00:00
Chia-I Wu
bca6c8572f ilo: clarify valid and preferred tilings
We did it right until the switch to gen_surface_tiling, which has
GEN8_TILING_W.  Generally, GEN8_TILING_W may be valid but not preferred.
2015-03-07 04:32:39 +08:00
Chia-I Wu
bf061a3d2e ilo: clean up Gen6 WAs
Add a help function for each WA and make PIPE_CONTROL flags match the WA
descriptions.  Call gen6_wa_pre_pipe_contro() only before PIPE_CONTROLs.
Fix missing gen6_wa_pre_3dstate_vs_toggle() in the rectlist path.
2015-03-07 02:17:54 +08:00
Chia-I Wu
ba5670fc50 ilo: add generic ilo_render_3dprimitive()
It replaces gen[6-8]_3dprimitive().
2015-03-07 01:45:52 +08:00
Chia-I Wu
8b2eecfbf8 ilo: add generic ilo_render_pipe_control()
It replaces gen[6-8]_pipe_control() and a direct gen6_PIPE_CONTROL() call in
ilo_render_emit_flush().
2015-03-07 01:40:23 +08:00
Chia-I Wu
35b713ad75 ilo: fix padding of linear sampler views
Should use the temporary variable in the loop instead of layout->bo_height.
2015-03-07 01:38:35 +08:00
Chia-I Wu
dda4823844 ilo: do not check for interleaved_samples
interleaved_samples is only zero-initialized when layout_want_mcs() is called.
We should not check for it.  There is also no need to.
2015-03-07 01:38:35 +08:00
Emil Velikov
56ede80940 Revert "egl/main: use c11/threads' mutex directly"
This reverts commit 6cee785c69.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:40 +00:00
Emil Velikov
eb14d28e6d Revert "egl/main: convert thread management to use c11 threads"
This reverts commit 33eff85336.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:34 +00:00
Emil Velikov
3b1d69910d Revert "configure: require pthreads for POSIX builds"
This reverts commit 50714cec2b.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:29 +00:00
Emil Velikov
8f2eaae10c Revert "glx: remove final reference to THREADS"
This reverts commit 8b15a883e0.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:23 +00:00
Emil Velikov
5e3276f5c7 Revert "glx: remove support for non-multithreaded platforms"
This reverts commit 38591295cd.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:11 +00:00
Emil Velikov
1c1fd82b4b glx: remove unneeded ifdef _WIN32 guard
The C99 header exists on other platforms as well.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-06 16:49:03 +00:00
Emil Velikov
3f16751639 util: rework _MSC_VER >= 1200 checks
Replace the _MSC_VER >= 1200 with defined (_MSC_VER) and compact if/else
statements. We require MSVC 2008 or later with commit 46110c5d564.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 16:48:50 +00:00
Emil Velikov
38591295cd glx: remove support for non-multithreaded platforms
Implicitly required for a while, although commit 9385c592c6 (mapi:
remove u_thread.h) was the one that put the final nail on the
coffin.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:18 +00:00
Emil Velikov
8b15a883e0 glx: remove final reference to THREADS
Left over from commit 18db13f5865(mapi: THREADS was always defined,
remove it)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:18 +00:00
Emil Velikov
50714cec2b configure: require pthreads for POSIX builds
This has been an implicit rule for building mesa for a long time. Let's
make it official and just bail out at configure time. This way we can
cleaning up some of our glx code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
Emil Velikov
33eff85336 egl/main: convert thread management to use c11 threads
Convert the code to use the C11 threads implementation, and nuke the
Windows non-pthreads code-path. The c11/threads_win32.h abstraction
should be better than the current code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
Emil Velikov
6cee785c69 egl/main: use c11/threads' mutex directly
Remove the inline wrappers/abstraction layer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
José Fonseca
bfb4db83b6 include: Add helper header to help trap includes inside extern C.
This is just to help repro and fixing these issues with any C++ compiler --

Commiting this will of course wait until all issues are addressed.

$ scons src/glsl/
scons: Reading SConscript files ...
Checking for GCC ...  yes
Checking for Clang ...  no
Checking for X11 (x11 xext xdamage xfixes glproto >= 1.4.13)... yes
Checking for XCB (x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8)... yes
Checking for XF86VIDMODE (xxf86vm)... yes
Checking for DRM (libdrm >= 2.4.38)... yes
Checking for UDEV (libudev >= 151)... yes
warning: LLVM disabled: not building llvmpipe
scons: done reading SConscript files.
scons: Building targets ...
scons: building associated VariantDir targets: build/linux-x86_64-debug/glsl
  Compiling src/glsl/ast_array_index.cpp ...
  Compiling src/glsl/ast_expr.cpp ...
  Compiling src/glsl/ast_function.cpp ...
  Compiling src/glsl/ast_to_hir.cpp ...
  Compiling src/glsl/ast_type.cpp ...
  Compiling src/glsl/builtin_functions.cpp ...
In file included from include/c99_compat.h:28:0,
                 from src/mapi/u_compiler.h:4,
                 from src/mapi/u_thread.h:47,
                 from src/mapi/glapi/glapi.h:47,
                 from src/mesa/main/mtypes.h:42,
                 from src/mesa/main/errors.h:47,
                 from src/mesa/main/imports.h:41,
                 from src/mesa/main/core.h:44,
                 from src/glsl/builtin_functions.cpp:58:
include/no_extern_c.h:48:1: error: template with C linkage
 template<class T> class _IncludeInsideExternCNotPortable;
 ^
In file included from include/c99_compat.h:28:0,
                 from include/c11/threads.h:38,
                 from src/mapi/u_thread.h:49,
                 from src/mapi/glapi/glapi.h:47,
                 from src/mesa/main/mtypes.h:42,
                 from src/mesa/main/errors.h:47,
                 from src/mesa/main/imports.h:41,
                 from src/mesa/main/core.h:44,
                 from src/glsl/builtin_functions.cpp:58:
include/no_extern_c.h:48:1: error: template with C linkage
 template<class T> class _IncludeInsideExternCNotPortable;
 ^
  Compiling src/glsl/builtin_types.cpp ...
  Compiling src/glsl/builtin_variables.cpp ...
scons: *** [build/linux-x86_64-debug/glsl/builtin_functions.os] Error 1
scons: building terminated because of errors.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-06 12:38:55 +00:00
Iago Toral Quiroga
7f10e1678e i965: free scratch buffers when destroying the context
If scratch space is needed for a shader stage we try to reuse the last scratch
buffer bound to that stage. If we can't, we free the old scratch buffer and
allocate a new one. This means we always keep the last scratch buffer for a
particular shader stage around for the entire life span of the context.

These buffers are being reported by Valgrind as definitely lost after
destroying the OpenGL context. For example, for the geometry shader stage:

==18350== 248 bytes in 1 blocks are definitely lost in loss record 85 of 150
==18350==    at 0x4C2CC70: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==18350==    by 0xA1B35D6: drm_intel_gem_bo_alloc_internal (intel_bufmgr_gem.c:724)
==18350==    by 0xA1B383F: drm_intel_gem_bo_alloc (intel_bufmgr_gem.c:794)
==18350==    by 0xA1AEFA3: drm_intel_bo_alloc (intel_bufmgr.c:52)
==18350==    by 0x9D08E31: brw_get_scratch_bo (brw_program.c:226)
==18350==    by 0x9D2A0F2: do_gs_prog (brw_vec4_gs.c:280)
==18350==    by 0x9D2A635: brw_gs_precompile (brw_vec4_gs.c:401)
==18350==    by 0x9D14F68: brw_shader_precompile(gl_context*, gl_shader_program*) (brw_shader.cpp:76)
==18350==    by 0x9D157B8: brw_link_shader (brw_shader.cpp:269)
==18350==    by 0x9B0941E: _mesa_glsl_link_shader (ir_to_mesa.cpp:3038)
==18350==    by 0x99AE4ED: link_program (shaderapi.c:917)
==18350==    by 0x99AF365: _mesa_LinkProgram (shaderapi.c:1385)

So make sure that by the time we destroy the context we check if we have live
scratch buffers for the various stages and release them if that is the case.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-06 13:13:24 +01:00
Ville Syrjälä
970dc23603 i965: Fix URB size for CHV
Increase the device info .urb.size for CHV to match the default URB
size (192kB).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-06 11:50:49 +02:00