Commit graph

92 commits

Author SHA1 Message Date
Marek Olšák
e281b7b653 amd/packets: remove the underscore between opcode number and word index, use %x
we are more used to this format

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40588>
2026-04-10 03:42:45 +00:00
Marek Olšák
796e1749c6 ac: replace some packet field definitions in sid.h by generated ones
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40183>
2026-03-11 18:54:20 +00:00
Marek Olšák
c20245832d amd: add gfx11 and gfx12 CP packet definitions
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40084>
2026-02-28 05:23:59 +00:00
Samuel Pitoiset
c91ed27582 radv: use the SQTT enable bit for PKT3_DISPATCH_TASKMESH_INDIRECT_MULTI_ACE
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39425>
2026-01-26 08:10:53 +00:00
Samuel Pitoiset
c7da19e2bf radv: use the SQTT enable bit for PKT3_DRAW_{INDEX}_INDIRECT_MULTI
This reports more info in RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39425>
2026-01-26 08:10:52 +00:00
Yogesh Mohan Marimuthu
9beb668d8d winsys/amdgpu: fwm packet pre-emption for gfx 11.5
gfx 11.5 uses f32 firmware. f32 firmware requires COND_EXEC
packet to flush the ring buffer when pre-emption occured.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36700>
2025-11-23 19:44:06 +00:00
Timur Kristóf
0d20bdbe2c ac: Improve description of some HW workarounds
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Also add references to their conterparts in old PAL code.
This makes it easier to remember whether we mitigated the
same issues as PAL did.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:25:07 +01:00
Samuel Pitoiset
47f5d25f93 radv,radeonsi: emit UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This try to mitigate the HiZ GPU hang by increasing a timeout. Loosely
based on PAL but I can confirm it delays the hang when
BOTTOM_OF_PIPE_TS is used as a workaround.

This must be emitted when the GFX queue is idle.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35212>
2025-06-02 07:30:18 +00:00
Marek Olšák
40aac0681b ac,radeonsi: define all SDMA DCC fields & use them, enable compressed writes
SDMA supports HTILE, but SURF_TYPE must be set correctly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:54 +00:00
Samuel Pitoiset
fe6494559d ac,radeonsi: add SDMA DCC tiling for GFX12+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
2025-01-30 08:18:22 +00:00
Pierre-Eric Pelloux-Prayer
6c0e4a0ece ac/virtio: add virtio-only AMDGPU_GEM_CREATE flag
On the host side virglrenderer creates dmabuf on demand when:
* cpu mapping is requested
* setting up scan out
* sharing buffers between guest processes

On-demand dmabuf creation only works if the ctx that created the
BO still exists and knows about this BO. This assumption works ok for
the first 2 cases, but can break with the last one (and it does cause
issues on Android). eg:
* process A allocates BO and exports it as a guest dmabuf
* process A closes its handle to the BO (-> detach_resource)
* process B imports the guest dmabuf -> this triggers the attach_resource
  function in virglrenderer. If the given resource isn't a
  VIRGL_RESOURCE_FD_DMABUF it'll try to get one... But for this to work,
  process A needs to be used -> this fails because this resource was
  detached from it.

The reason we create dmabuf on demand is to avoid hitting the number of
open file descriptor limit. So to cover the 3rd case, we'll use the
VIRTGPU_BLOB_FLAG_USE_SHAREABLE flag, but try to limit to as few possible
buffers as possible.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21658>
2025-01-16 12:24:33 +00:00
Marek Olšák
c20c46cf7b ac: update ATOMIC_MEM definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32877>
2025-01-07 20:24:19 +00:00
Yogesh Mohan Marimuthu
8447cb563f winsys/amdgpu: send hdp flush packet for userq
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu
94c41852bd ac: add inherit vmid field to indirect buffer packet
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu
cda75d6497 ac: add new userq signal and wait packet id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Marek Olšák
724b6d667c amd: add gfx12 register definitions
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
2024-05-11 22:14:05 -04:00
Timur Kristóf
d09ad16fd4 ac: Remove CIK prefix from SDMA opcodes.
The vast majority of AMD GPUs (except the very first GCN) have
the same SDMA packet format, so let's just call it SDMA instead
of CIK_SDMA.

(And leave the oldest GPUs with SI_SDMA as they are now.)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
2023-11-18 17:11:00 +01:00
Timur Kristóf
6413b860c4 ac: Rename SDMA max copy size macros to reflect SDMA version.
This naming is more accurate and closer to the HW.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
2023-11-18 17:10:56 +01:00
Marek Olšák
e7c8d32bfc ac/gpu_info,llvm: trivial cosmetic changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26095>
2023-11-07 19:27:43 +00:00
Timur Kristóf
b442de86c1 radv: Support SDMA in radv_cp_wait_mem.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>
2023-10-24 23:12:45 +00:00
Rhys Perry
23cb0b00db radv: implement mesh shader gs_fast_launch=2
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
2023-10-24 21:36:06 +00:00
Timur Kristóf
b44a616253 ac: Clarify SDMA opcode defines.
Make the naming of these defines consistent with others.
And add a few new opcodes and related definitions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
2023-10-18 16:29:01 +00:00
Marek Olšák
8e4ba537a1 ac: minor updates to packet documentation and definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
2023-08-19 19:36:55 +00:00
Marek Olšák
789a3b24c1 amd: improve the IB parser, parse more packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
95a85d1b37 amd: update SET_*_REG_PAIRS* documentation and remove radeon_info options
All released firmware supports the packets.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
218c00319b amd: remove unused PKT0 definitions
We never use type 0 packets.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
e18344dd24 ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT
excluding: aco, radv, addrlib

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23113>
2023-05-24 21:48:19 +00:00
Timur Kristóf
948a122f30 amd: Rename INDIRECT_BUFFER_CIK to just INDIRECT_BUFFER.
This packet is supported on GFX6 too, its name should relect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:48 +00:00
Harri Nieminen
f85f511a38 amd: fix typos in code
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Timur Kristóf
da3eb6e6a5 ac: Add more defines for mesh shading packets.
Add some set macro defines for mesh shading packets.
The naming convention is:
S_(packet opcode)(dword index)_FIELD_NAME

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>
2023-03-23 11:49:35 +00:00
Marek Olšák
4f246f27b1 amd: define new SET_*_REG_PAIRS packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Marek Olšák
35fa57dfae amd: sort and re-indent packet definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:02 +00:00
Marek Olšák
711c4bddb2 radeonsi/gfx11: use new packet EVENT_WRITE_ZPASS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
2023-02-03 00:18:01 +00:00
Samuel Pitoiset
f10f2c9bbb ac: add TC_OP_ATOMIC_SUB_32
This will be used by SQTT to implement a workaround on GFX11

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20529>
2023-01-18 13:36:50 +00:00
Bas Nieuwenhuizen
10211913e1 radv: Add perf counter lock/unlock commandbuffers.
These set the pass and make sure we don't have multiple submissions
at the same time touching the perf counters/pass at the same time.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
6cfc2e91e8 radv: Add performance counter reg write.
Needed for reliably writing performance counter selectors.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Timur Kristóf
086e499b47 ac: Add RDNA2 task+mesh shader draw packet opcodes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16737>
2022-06-08 08:43:51 +00:00
Yogesh Mohanmarimuthu
6e537680c4 radeonsi/gfx11: use PIXEL_PIPE_STATE_DUMP event instead of ZPASS_DONE
Use PIXEL_PIPE_STATE_CONTROL/DUMP event instead of ZPASS_DONE for gfx11.

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Samuel Pitoiset
53ccfbb996 amd: add PKT3_LOAD_SH_REG_INDEX
It seems only available on GFX8+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15053>
2022-03-14 08:54:23 +00:00
Marek Olšák
3394f0ae14 ac: define PKT3_ATOMIC_MEM
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15209>
2022-03-01 22:30:24 +00:00
Pierre-Eric Pelloux-Prayer
148b2d0040 amd: add SDMA_NOP_PAD
And use it in amdgpu_cs.c.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Samuel Pitoiset
23461897fe radv: add support for emitting PS_DONE/CS_DONE on GFX6-8
On GFX6, EOS events are always emitted with EVENT_WRITE_EOS.
On GFX7+, EOS events are emitted with EVENT_WRITE_EOS on the
graphics queue, and with RELEASE_MEM on the compute queue.

Fixes: 9c65f1f111 ("radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE events")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8710>
2021-01-26 09:26:58 +00:00
Samuel Pitoiset
3494551d08 radv: set the predication boolean as 32-bit if necessary
CTS is missing tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7897>
2020-12-07 09:30:05 +00:00
Pierre-Eric Pelloux-Prayer
e5fb9dca2a amd/common: switch to 3-spaces style
Follow-up of !4319 using the same clang-format config.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5310>
2020-09-07 10:00:29 +02:00
Marek Olšák
5a5467ccc8 ac: add tables for CP register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
556f4458fe amd: add proper definitions for NOP packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
a54bcb9429 radeonsi: enable larger SDMA clears and copies on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
3509d3bd53 ac: update register and packet definitions for preemption
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:07 -04:00
Marek Olšák
2e94cb6693 radeonsi: add PKT3_CONTEXT_REG_RMW
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-08-27 16:16:08 -04:00
Dave Airlie
82a2f10529 radv/gfx10: set the pgm rsrc3/4 regs using index sh reg set
This is ported from AMDVLK, it's probably not requires unless
we want to use "real time queues", but it might be nice to just have
in place.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-18 10:24:26 +10:00