amd: update SET_*_REG_PAIRS* documentation and remove radeon_info options

All released firmware supports the packets.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
This commit is contained in:
Marek Olšák 2023-06-03 03:04:50 -04:00 committed by Marge Bot
parent 9078301ff8
commit 95a85d1b37
3 changed files with 16 additions and 22 deletions

View file

@ -1500,9 +1500,6 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info)
info->attribute_ring_size_per_se = align(info->attribute_ring_size_per_se, 64 * 1024);
assert(info->attribute_ring_size_per_se * info->max_se <= 16 * 1024 * 1024);
info->has_set_reg_pairs = info->pfp_fw_version >= SET_REG_PAIRS_PFP_VERSION;
info->has_set_sh_reg_pairs_n = info->pfp_fw_version >= SET_REG_PAIRS_PACKED_N_COUNT14_PFP_VERSION;
info->conformant_trunc_coord =
info->drm_minor >= 52 &&
device_info.ids_flags & AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD;
@ -1713,8 +1710,6 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
fprintf(f, " mec_fw_feature = %i\n", info->mec_fw_feature);
fprintf(f, " pfp_fw_version = %i\n", info->pfp_fw_version);
fprintf(f, " pfp_fw_feature = %i\n", info->pfp_fw_feature);
fprintf(f, " has_set_reg_pairs = %i\n", info->has_set_reg_pairs);
fprintf(f, " has_set_sh_reg_pairs_n = %i\n", info->has_set_sh_reg_pairs_n);
fprintf(f, "Multimedia info:\n");
fprintf(f, " vce_encode = %u\n", info->ip[AMD_IP_VCE].num_queues);

View file

@ -167,8 +167,6 @@ struct radeon_info {
uint32_t mec_fw_feature;
uint32_t pfp_fw_version;
uint32_t pfp_fw_feature;
bool has_set_reg_pairs;
bool has_set_sh_reg_pairs_n;
/* Multimedia info. */
uint32_t uvd_fw_version;

View file

@ -256,31 +256,32 @@
#define S_AD4_XYZ_DIM_REG(x) ((x & 0xFFFF))
#define PKT3_EVENT_WRITE_ZPASS 0xB1 /* GFX11+ & PFP version >= 1458 */
#define EVENT_WRITE_ZPASS_PFP_VERSION 1458
/* All PAIRS packets require GFX11+ and PFP version >= 1448.
/* All PAIRS packets require GFX11+.
*
* SET_CONTEXT_REG_PAIRS:
* SET_SH_REG_PAIRS:
* Format: header, (offset, value)^n.
* Consecutive offsets must not be equal. Not recommended because the PACKED variants are better.
* Don't use these because the PACKED variants are faster.
* - Consecutive offsets must not be equal.
* - RESET_FILTER_CAM must be set to 1.
*
* SET_CONTEXT_REG_PAIRS_PACKED:
* SET_SH_REG_PAIRS_PACKED:
* SET_SH_REG_PAIRS_PACKED_N:
* Format: header, count, (offset0 | (offset1 << 16), value0, value1)^(count / 2)
* Consecutive offsets must not be equal. "count" is the register count and must be aligned to 2.
* If the register count is odd, it's recommended to duplicate the first register in the last register.
* The SH_*_PACKED* variants require register shadowing to be enabled. The *_N variant is
* identical to the non-N variant, but is faster with the following limitation:
* If PFP version >= 1463, "count" must be at most 14, else "count" must be at most 8. If "count"
* is greater than the limit, use the non-N variant.
* - "count" is the register count and must be aligned to 2.
* - Consecutive offsets must not be equal.
* - RESET_FILTER_CAM must be set to 1.
* - If the register count is odd, write the first register again at the end to make it even.
* - The SH_*_PACKED* variants require register shadowing to be enabled.
* - The *_N variant is identical to the non-N variant, but the maximum allowed "count" is 14
* and it's faster.
*/
#define PKT3_SET_CONTEXT_REG_PAIRS 0xB8 /* GFX11+, PFP version >= 1448 */
#define PKT3_SET_CONTEXT_REG_PAIRS_PACKED 0xB9 /* GFX11+, PFP version >= 1448 */
#define PKT3_SET_SH_REG_PAIRS 0xBA /* GFX11+, PFP version >= 1448 */
#define PKT3_SET_SH_REG_PAIRS_PACKED 0xBB /* GFX11+, PFP version >= 1448 */
#define PKT3_SET_SH_REG_PAIRS_PACKED_N 0xBD /* GFX11+, PFP version >= 1448 */
#define SET_REG_PAIRS_PFP_VERSION 1448
#define SET_REG_PAIRS_PACKED_N_COUNT14_PFP_VERSION 1463
#define PKT3_SET_CONTEXT_REG_PAIRS 0xB8 /* GFX11+, don't use */
#define PKT3_SET_CONTEXT_REG_PAIRS_PACKED 0xB9 /* GFX11+ */
#define PKT3_SET_SH_REG_PAIRS 0xBA /* GFX11+, don't use */
#define PKT3_SET_SH_REG_PAIRS_PACKED 0xBB /* GFX11+ */
#define PKT3_SET_SH_REG_PAIRS_PACKED_N 0xBD /* GFX11+ */
#define PKT_TYPE_S(x) (((unsigned)(x)&0x3) << 30)
#define PKT_TYPE_G(x) (((x) >> 30) & 0x3)