Commit graph

26061 commits

Author SHA1 Message Date
Marek Olšák
f3943614ff radeonsi: fix build with LLVM 3.6
Broken by this cleanup: 3dc1cb0cc7

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-12 00:41:36 +01:00
Samuel Pitoiset
d759f0ddf1 nv50,nvc0: remove unused parameter in nvXX_state_validate()
This 'words' parameter is there since 2011 but it has never been used.
While we are at it, get rid of the extern declaration.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-11 23:14:16 +01:00
Jose Fonseca
0d4898ae80 include,gallium: Remove pre-MSVC 2013 compatibility.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-11 21:36:00 +00:00
Jose Fonseca
a97a955b92 scons: Eliminate MSVC2008 compatibility.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-11 21:36:00 +00:00
Jose Fonseca
1cadfe08c4 configure: Eliminate MSVC2008 compatibility.
We no longer need to build any part of Mesa with Windows SDK 7.0.7600 or
MSVC 2008.  MSVC 2013 will be the oldest we support.

In practice this means people are now free to declare variables in the
middle of blocks, on the whole Mesa tree.

Care should still be taken with variable length arrays and void pointer
arithmetic.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Hella-acked-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-11 21:36:00 +00:00
Marek Olšák
100796c15c gallium/radeon: drop support for LLVM 3.5
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

v2: adjust the comment in the amdgpu winsys
2016-02-11 16:48:30 +01:00
Marek Olšák
3dc1cb0cc7 radeonsi: obtain commonly used LLVM types only once
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-11 16:48:30 +01:00
Marek Olšák
1643dca513 radeonsi: cleanup shader codegen
si_shader_ctx -> ctx
type * ptr -> type *ptr
si_shader_context *shader -> si_shader_context *ctx

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-11 16:48:30 +01:00
Marek Olšák
1c8a1a8fed radeonsi: fix a crash when binding a sampler buffer
Buffers don't contain r600_texture.

Broken by 7aedbbacae:
"radeonsi: put image, fmask, and sampler descriptors into one array"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94091
2016-02-11 16:48:30 +01:00
Jason Ekstrand
8750299a42 nir: Remove the const_offset from nir_tex_instr
When NIR was originally drafted, there was no easy way to determine if
something was constant or not.  The result was that we had lots of
special-casing for constant values such as this.  Now that load_const
instructions are SSA-only, it's really easy to find constants and this
isn't really needed anymore.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@gmail.com>
2016-02-10 16:33:50 -08:00
Marek Olšák
6ee1c386fe radeonsi: don't emit unnecessary NULL exports for unbound targets (v3)
v2: remove semantic index == 0 checks
    add the else statement to remove shadowing of args
v3: fix fbo-alphatest-nocolor regression

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
2016-02-10 23:53:17 +01:00
Marek Olšák
79d0082c64 radeon/uvd: silence a warning 2016-02-10 20:16:17 +01:00
Marek Olšák
d9c8a8fe61 r300g: silence warnings 2016-02-10 20:16:17 +01:00
Marek Olšák
7aedbbacae radeonsi: put image, fmask, and sampler descriptors into one array
The texture slot is expanded to 16 dwords containing 2 descriptors.
Those can be:
- Image and fmask, or
- Image and sampler state

By carefully choosing the locations, we can put all three into one slot,
with the fmask and sampler state being mutually exclusive.

This improves shaders in 2 ways:
- 2 user SGPRs are unused, shaders can use them as temporary registers now
- each pair of descriptors is always on the same cache line

v2: cosmetic changes: add back v8i32, don't load a sampler state & fmask
    at the same time

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-10 19:41:49 +01:00
Marek Olšák
796ee76e2e winsys/radeon: fix the num_tile_pipes comment to silence warnings 2016-02-10 19:41:49 +01:00
Alexandre Demers
111602e159 winsys/radeon: better explain the num_tile_pipes fixup for TAHITI (v2)
v2: Clarify the relation between num_tiles_pipes and GB_TILE_MODE and the fix
 needed for Tahiti as suggested by Marek.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-02-10 19:29:41 +01:00
Bernhard Rosenkränzer
e86ba7844f freedreno/ir3: Get rid of nested functions
This allows building Freedreno with clang

Signed-off-by: Bernhard Rosenkränzer <bero@linaro.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-10 11:26:48 -05:00
Jason Ekstrand
5ec456375e nir: Separate texture from sampler in nir_tex_instr
This commit adds the capability to NIR to support separate textures and
samplers.  As it currently stands, glsl_to_nir only sets the texture deref
and leaves the sampler deref alone as it did before and nir_lower_samplers
assumes this.  Backends can still assume that they are combined and only
look at only at the texture index.  Or, if they wish, they can assume that
they are separate because nir_lower_samplers, tgsi_to_nir, and prog_to_nir
all set both texture and sampler index whenever a sampler is required (the
two indices are the same in this case).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-09 15:00:17 -08:00
Jason Ekstrand
ee85014b90 nir/tex_instr: Rename sampler to texture
We're about to separate the two concepts.  When we do, the sampler will
become optional.  Doing a rename first makes the separation a bit more
safe because drivers that depend on GLSL or TGSI behaviour will be fine to
just use the texture index all the time.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-09 15:00:17 -08:00
Rob Clark
8b0fb1c152 freedreno/ir3: use const_index helpers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-09 17:30:33 -05:00
Rob Clark
ead05e8670 ttn: use const_index helpers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-02-09 17:30:33 -05:00
Rob Clark
b1770235ed ttn: small logic cleanup
The only case where dim!=NULL is where op==load_ubo.  But using
op==load_ubo is less confusing.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-09 17:30:33 -05:00
Marek Olšák
329181ae33 radeonsi: enable denorms for 64-bit and 16-bit floats
This fixes FP16 conversion instructions for VI, which has 16-bit floats,
but not SI & CI, which can't disable denorms for those instructions.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
17fe3fa312 gallium: pass the robust buffer access context flag to drivers
radeonsi will not do bounds checking for loads if this is not set.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
d611fce23d gallium/radeon: add a function for adding llvm function attributes
This will be used for setting the new InitialPSInputAddr attribute.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
de2e28366a radeonsi: compile geometry shaders immediately
they have only 1 variant

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
f7a8b6fff5 radeonsi: split out code for deleting si_shader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
e21142087c radeonsi: move code writing tess factors into a separate function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
dc5fc3c2f6 radeonsi: make LLVM IR dumping less messy
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
c1041366db radeonsi: move a few r600_can_dump_shader calls to where they're needed
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
b6d5666fbf radeonsi: remove useless code that handles dx10_clamp_mode
"enable-no-nans-fp-math" is a wrong string and there was a disagreement
about fixing it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
57271d5364 radeonsi: dump SPI_PS_INPUT values along with shader stats
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
5a53628f45 radeonsi: read SPI_PS_INPUT_ADDR from LLVM if it returns it
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
9483fcc7f2 radeonsi: don't force gl_SampleMaskIn to 1 for smoothing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
c379c2540b radeonsi: split PS input interpolation code into its own function
This will be used by the fragment shader prolog.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
b9126dcda8 radeonsi: implement forcing per-sample_interpolation using the shader key only
It was partly a state and partly emulated by shader code, but since we want
to do this in a fragment shader prolog, we need to put it into the shader
key, which will be used to generate the prolog.

This also removes the spi_ps_input states and moves the registers
to the PS state.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
4596f3c1b8 radeonsi: remove si_shader::ps_input_interpolate
tgsi_shader_info has this too.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
6dda2455c8 radeonsi: move BCOLOR PS input locations after all other inputs
BCOLOR inputs were immediately after COLOR inputs. Thus, all following inputs
were offset by 1 if color_two_side was enabled, and not offset if it was not
enabled, which is a variation that's problematic if we want to have 1 variant
per shader and the variant doesn't care about color_two_side (that should be
handled by other bytecode attached at the beginning).

Instead, move BCOLOR inputs after all other inputs, so BCOLOR0 is at location
"num_inputs" if it's present. BCOLOR1 is next.

This also allows removing si_shader::nparam and
si_shader::ps_input_param_offset, which are useless now.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
606e4185f3 radeonsi: move SPI_PS_INPUT_CNTL value computation to a separate function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
90cbbe1c12 radeonsi: generate a color_two_side variant only if the shader reads colors
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Marek Olšák
4bbbaaf191 radeonsi: move si_shader_context initialization into a separate function
This will be re-used later.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-09 21:19:51 +01:00
Ilia Mirkin
50235ab3ab nv50: add PIPE_QUERY_OCCLUSION_PREDICATE support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-02-09 11:59:35 -05:00
Ilia Mirkin
0cb1dda36e nv30: add PIPE_QUERY_OCCLUSION_PREDICATE support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-09 11:59:35 -05:00
Ilia Mirkin
0d04ec2fd2 ilo: add PIPE_QUERY_OCCLUSION_PREDICATE support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2016-02-09 11:59:27 -05:00
Nicolai Hähnle
c260175677 draw: use util_pstipple_* function for stipple pattern textures and samplers
This reduces code duplication.

Suggested-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-09 10:01:57 -05:00
Nicolai Hähnle
452e51bf1e draw: use util_pstipple_create_fragment_shader
This reduces code duplication. It also adds support for drivers where the
fragment position is a system value.

Suggested-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-09 10:01:32 -05:00
Marek Olšák
83b4d701c0 winsys/radeon: fix a wrong NUM_TILE_PIPES value from the kernel
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94019

Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-09 15:26:40 +01:00
Brian Paul
59251610ed tgsi: minor whitespace fixes in tgsi_scan.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00
Brian Paul
42246ab1f5 tgsi: s/true/TRUE/ in tgsi_scan.c
Just to be consistent.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00
Brian Paul
da6e879a6c tgsi: use switches instead of big if/else ifs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00