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radeonsi: move si_shader_context initialization into a separate function
This will be re-used later. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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a3e9a5f9f8
commit
4bbbaaf191
1 changed files with 59 additions and 42 deletions
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@ -4250,47 +4250,26 @@ void si_dump_shader_key(unsigned shader, union si_shader_key *key, FILE *f)
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}
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}
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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static void si_init_shader_ctx(struct si_shader_context *ctx,
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struct si_screen *sscreen,
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struct si_shader *shader,
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LLVMTargetMachineRef tm,
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struct tgsi_shader_info *info)
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{
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struct si_shader_selector *sel = shader->selector;
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struct tgsi_token *tokens = sel->tokens;
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struct si_shader_context si_shader_ctx;
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struct lp_build_tgsi_context * bld_base;
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struct tgsi_shader_info stipple_shader_info;
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LLVMModuleRef mod;
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int r = 0;
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bool poly_stipple = sel->type == PIPE_SHADER_FRAGMENT &&
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shader->key.ps.poly_stipple;
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bool dump = r600_can_dump_shader(&sscreen->b, sel->info.processor);
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struct lp_build_tgsi_context *bld_base;
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if (poly_stipple) {
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tokens = util_pstipple_create_fragment_shader(tokens, NULL,
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SI_POLY_STIPPLE_SAMPLER,
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TGSI_FILE_SYSTEM_VALUE);
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tgsi_scan_shader(tokens, &stipple_shader_info);
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}
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memset(ctx, 0, sizeof(*ctx));
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radeon_llvm_context_init(&ctx->radeon_bld);
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ctx->tm = tm;
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ctx->screen = sscreen;
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if (shader && shader->selector)
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ctx->type = shader->selector->info.processor;
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else
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ctx->type = -1;
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ctx->shader = shader;
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/* Dump TGSI code before doing TGSI->LLVM conversion in case the
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* conversion fails. */
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if (dump && !(sscreen->b.debug_flags & DBG_NO_TGSI)) {
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si_dump_shader_key(sel->type, &shader->key, stderr);
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tgsi_dump(tokens, 0);
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si_dump_streamout(&sel->so);
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}
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assert(shader->nparam == 0);
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memset(&si_shader_ctx, 0, sizeof(si_shader_ctx));
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radeon_llvm_context_init(&si_shader_ctx.radeon_bld);
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bld_base = &si_shader_ctx.radeon_bld.soa.bld_base;
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if (sel->type != PIPE_SHADER_COMPUTE)
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shader->dx10_clamp_mode = true;
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shader->uses_instanceid = sel->info.uses_instanceid;
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bld_base->info = poly_stipple ? &stipple_shader_info : &sel->info;
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bld_base = &ctx->radeon_bld.soa.bld_base;
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bld_base->info = info;
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bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = fetch_constant;
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bld_base->op_actions[TGSI_OPCODE_INTERP_CENTROID] = interp_action;
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@ -4326,12 +4305,50 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
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bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
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}
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}
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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{
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struct si_shader_selector *sel = shader->selector;
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struct tgsi_token *tokens = sel->tokens;
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struct si_shader_context si_shader_ctx;
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struct lp_build_tgsi_context * bld_base;
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struct tgsi_shader_info stipple_shader_info;
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LLVMModuleRef mod;
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int r = 0;
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bool poly_stipple = sel->type == PIPE_SHADER_FRAGMENT &&
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shader->key.ps.poly_stipple;
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bool dump = r600_can_dump_shader(&sscreen->b, sel->info.processor);
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if (poly_stipple) {
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tokens = util_pstipple_create_fragment_shader(tokens, NULL,
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SI_POLY_STIPPLE_SAMPLER,
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TGSI_FILE_SYSTEM_VALUE);
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tgsi_scan_shader(tokens, &stipple_shader_info);
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}
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/* Dump TGSI code before doing TGSI->LLVM conversion in case the
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* conversion fails. */
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if (dump && !(sscreen->b.debug_flags & DBG_NO_TGSI)) {
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si_dump_shader_key(sel->type, &shader->key, stderr);
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tgsi_dump(tokens, 0);
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si_dump_streamout(&sel->so);
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}
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assert(shader->nparam == 0);
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si_init_shader_ctx(&si_shader_ctx, sscreen, shader, tm,
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poly_stipple ? &stipple_shader_info : &sel->info);
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if (sel->type != PIPE_SHADER_COMPUTE)
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shader->dx10_clamp_mode = true;
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shader->uses_instanceid = sel->info.uses_instanceid;
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bld_base = &si_shader_ctx.radeon_bld.soa.bld_base;
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si_shader_ctx.radeon_bld.load_system_value = declare_system_value;
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si_shader_ctx.shader = shader;
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si_shader_ctx.type = tgsi_get_processor_type(tokens);
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si_shader_ctx.screen = sscreen;
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si_shader_ctx.tm = tm;
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switch (si_shader_ctx.type) {
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case TGSI_PROCESSOR_VERTEX:
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