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radeonsi: move SPI_PS_INPUT_CNTL value computation to a separate function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
90cbbe1c12
commit
606e4185f3
1 changed files with 40 additions and 34 deletions
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@ -1087,14 +1087,50 @@ static void si_delete_shader_selector(struct pipe_context *ctx, void *state)
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free(sel);
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}
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static unsigned si_get_ps_input_cntl(struct si_context *sctx,
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struct si_shader *vs, unsigned name,
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unsigned index, unsigned interpolate)
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{
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struct tgsi_shader_info *vsinfo = &vs->selector->info;
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unsigned j, ps_input_cntl = 0;
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if (interpolate == TGSI_INTERPOLATE_CONSTANT ||
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(interpolate == TGSI_INTERPOLATE_COLOR && sctx->flatshade))
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ps_input_cntl |= S_028644_FLAT_SHADE(1);
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if (name == TGSI_SEMANTIC_PCOORD ||
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(name == TGSI_SEMANTIC_TEXCOORD &&
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sctx->sprite_coord_enable & (1 << index))) {
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ps_input_cntl |= S_028644_PT_SPRITE_TEX(1);
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}
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for (j = 0; j < vsinfo->num_outputs; j++) {
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if (name == vsinfo->output_semantic_name[j] &&
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index == vsinfo->output_semantic_index[j]) {
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ps_input_cntl |= S_028644_OFFSET(vs->vs_output_param_offset[j]);
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break;
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}
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}
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if (name == TGSI_SEMANTIC_PRIMID)
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/* PrimID is written after the last output. */
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ps_input_cntl |= S_028644_OFFSET(vs->vs_output_param_offset[vsinfo->num_outputs]);
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else if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(ps_input_cntl)) {
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/* No corresponding output found, load defaults into input.
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* Don't set any other bits.
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* (FLAT_SHADE=1 completely changes behavior) */
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ps_input_cntl = S_028644_OFFSET(0x20);
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}
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return ps_input_cntl;
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}
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static void si_emit_spi_map(struct si_context *sctx, struct r600_atom *atom)
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{
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struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
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struct si_shader *ps = sctx->ps_shader.current;
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struct si_shader *vs = si_get_vs_state(sctx);
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struct tgsi_shader_info *psinfo;
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struct tgsi_shader_info *vsinfo = &vs->selector->info;
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unsigned i, j, tmp, num_written = 0;
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unsigned i, num_written = 0;
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if (!ps || !ps->nparam)
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return;
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@ -1109,38 +1145,8 @@ static void si_emit_spi_map(struct si_context *sctx, struct r600_atom *atom)
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unsigned interpolate = psinfo->input_interpolate[i];
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unsigned param_offset = ps->ps_input_param_offset[i];
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bcolor:
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tmp = 0;
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if (interpolate == TGSI_INTERPOLATE_CONSTANT ||
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(interpolate == TGSI_INTERPOLATE_COLOR && sctx->flatshade))
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tmp |= S_028644_FLAT_SHADE(1);
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if (name == TGSI_SEMANTIC_PCOORD ||
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(name == TGSI_SEMANTIC_TEXCOORD &&
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sctx->sprite_coord_enable & (1 << index))) {
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tmp |= S_028644_PT_SPRITE_TEX(1);
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}
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for (j = 0; j < vsinfo->num_outputs; j++) {
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if (name == vsinfo->output_semantic_name[j] &&
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index == vsinfo->output_semantic_index[j]) {
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tmp |= S_028644_OFFSET(vs->vs_output_param_offset[j]);
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break;
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}
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}
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if (name == TGSI_SEMANTIC_PRIMID)
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/* PrimID is written after the last output. */
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tmp |= S_028644_OFFSET(vs->vs_output_param_offset[vsinfo->num_outputs]);
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else if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(tmp)) {
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/* No corresponding output found, load defaults into input.
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* Don't set any other bits.
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* (FLAT_SHADE=1 completely changes behavior) */
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tmp = S_028644_OFFSET(0x20);
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}
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assert(param_offset == num_written);
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radeon_emit(cs, tmp);
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radeon_emit(cs, si_get_ps_input_cntl(sctx, vs, name, index,
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interpolate));
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num_written++;
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if (name == TGSI_SEMANTIC_COLOR &&
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