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195 commits

Author SHA1 Message Date
Samuel Pitoiset
7729ea3d67 radv: only disable CU2 & CU3 when NGG is enabled 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7769>
 2020-11-30 09:31:29 +00:00
Marek Olšák
603b5340b9 ac: rename num_render_backends -> max_render_backends 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
 2020-11-18 06:19:59 +00:00
Marek Olšák
989cc76f0c amd: replace 0x028848 with the register definition 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7264>
 2020-10-23 20:51:22 -04:00
Bas Nieuwenhuizen
78165ea3e2 radv: Record cache flushes for RGP. 
Not doing the EOP TS cacheflush event because that break wave counting
in RGP for some reason. But the rest looks to be all there.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
 2020-09-28 15:46:08 +00:00
Bas Nieuwenhuizen
cc73182152 radv: Include flushes in the barrier. 
Since the flushes really happen on the next draw delay the barrier
end to include the flushes.

This fixes the barrier duration in RGP.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
 2020-09-28 15:46:08 +00:00
Samuel Pitoiset
24a74b352c radv: add a tweak for PS wave CU utilization for gfx10.3 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>
 2020-09-24 10:41:21 +00:00
Bas Nieuwenhuizen
8ae4cec95f Revert "radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time" 
This reverts commit d6bc0f26c9.

These registers are now constant.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
 2020-09-21 10:34:46 +00:00
Marek Olšák
b7a6333ee4 amd/registers: switch to new generated register definitions 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
 2020-09-01 08:45:54 -04:00
Samuel Pitoiset
d6bc0f26c9 radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time 
The upcoming patch will set BIG_PAGE if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
 2020-08-28 05:53:41 +00:00
Samuel Pitoiset
638a09b827 radv: fix emitting the border color pointer on the compute queue 
This was just missing.

Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: John Galt <johngaltfirstrun@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6276>
 2020-08-12 09:13:11 +02:00
Samuel Pitoiset
e4c6204d65 radv: limit LATE_ALLOC_GS to prevent a GPU hang on GFX10 
Found by inspection, doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6279>
 2020-08-11 12:47:33 +00:00
Samuel Pitoiset
0256250547 radv/gfx10: add missing initialization of registers 
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6277>
 2020-08-11 13:48:32 +02:00
Samuel Pitoiset
05b09d6549 radv: fix sample shading on GFX 10.3 
Based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
 2020-08-05 12:57:48 +02:00
Samuel Pitoiset
934d6ac949 radv: emit more invariant registers as part of the initial gfx state 
This reduces the number of emitted packets for pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
 2020-07-24 12:30:02 +00:00
Samuel Pitoiset
d1bba2eee7 radv: disable CPU caching for IBS to reduce fetch latency 
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5959>
 2020-07-20 11:23:19 +00:00
Samuel Pitoiset
d6c1e5051e radv: add support for dynamic primitive topology 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
 2020-07-13 08:31:54 +00:00
Samuel Pitoiset
40526451ca radv: compute prim_vertex_count at draw time 
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
 2020-07-09 06:31:39 +00:00
Samuel Pitoiset
972081c688 radv: adjust IA_MULTI_VGT_PARAM.PARTIAL_VS_WAVE at draw time 
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
 2020-07-09 06:31:39 +00:00
Samuel Pitoiset
5f1b0f4b48 radv: adjust IA_MULTI_VGT_PARAM.WD_SWITCH_ON_EOP at draw time 
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
 2020-07-09 06:31:39 +00:00
Samuel Pitoiset
53372175c9 radv: fix wide points and lines 
The maximum value for both points and lines is 65536. This doesn't
fix anything known (just found this while looking in that area).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5696>
 2020-07-02 08:26:03 +02:00
Marek Olšák
556f4458fe amd: add proper definitions for NOP packets 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
 2020-06-26 07:02:57 +00:00
Samuel Pitoiset
dc698fb5dc radv: add support for Sienna Cichlid 
Bits copied from RadeonSI. Totally untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
 2020-06-19 08:18:41 +02:00
Marek Olšák
2a3806ffa3 amd: replace SH -> SA (shader array) in comments 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
 2020-05-26 06:00:54 -04:00
Marek Olšák
2cf46f2e3d ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa 
Perf counters use the new max number.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
 2020-05-26 06:00:54 -04:00
Marek Olšák
3509d3bd53 ac: update register and packet definitions for preemption 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
 2020-05-23 03:45:07 -04:00
Joshua Ashton
57e796a12a radv: Implement VK_EXT_custom_border_color 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4877>
 2020-05-15 01:33:10 +00:00
Joshua Ashton
0b44582394 radv: Pass logical device to si_emit_graphics 
We'll need this in order to retrieve the va of a bo for a future ext.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4728>
 2020-04-25 00:32:20 +00:00
Samuel Pitoiset
ff3f775476 radv: simplify checking for Navi1x chips 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4702>
 2020-04-23 15:54:32 +02:00
Albert Astals Cid
06c5875fd6 Fix promotion of floats to doubles 
Use the f variants of the math functions if the input parameter is a
float, saves converting from float to double and running the double
variant of the math function for gaining no precision at all

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3969>
 2020-04-18 19:55:45 +00:00
Marek Olšák
013b65635f radv: stop including files from mesa/main 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
 2020-03-27 21:00:10 +00:00
Samuel Pitoiset
a46e9f4d9a radv: use ac_gpu_info::use_late_alloc 
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
 2020-03-12 18:17:47 +00:00
Samuel Pitoiset
741dd9e32b radv: rewrite late alloc computation 
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
 2020-03-12 18:17:47 +00:00
Samuel Pitoiset
22d3e047e5 radv: use better tessellation tunables on GFX9+ 
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
 2020-03-12 18:17:47 +00:00
Samuel Pitoiset
6d27022ce1 radv/gfx10: cache metadata in L2 on small chips 
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
 2020-03-12 18:17:47 +00:00
Samuel Pitoiset
53b50be35c radv/gfx10: enable all CUs if NGG is never used 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
 2020-01-15 07:45:29 +00:00
Samuel Pitoiset
4a3bdc6d22 Revert "radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+" 
This reverts commit 2ca8629fa9.

This was initially ported from RadeonSI, but in the meantime it has
been reverted because it might hang. Be conservative and re-introduce
this packet emission.

Unfortunately this doesn't fix anything known.

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-15 15:58:34 +02:00
Timur Kristóf
c372dc762d radv: Fix L2 cache rinse programming. 
According to radeonsi, GLM doesn't support WB alone, so
we have to set INV too when WB is set.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-09-26 22:18:16 +00:00
Marek Olšák
2c62b461e9 ac: move PBB MAX_ALLOC_COUNT into radeon_info 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-09-18 14:39:06 -04:00
Samuel Pitoiset
d62d2840c4 ac: add has_clear_state to ac_gpu_info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-08-27 08:04:05 +02:00
Samuel Pitoiset
0813c27d8d radv/gfx10: don't initialize VGT_INSTANCE_STEP_RATE_0 
Only gfx9 and older use it to get InstanceID in VGPR1.
Ported from RadeonSI.

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-08-23 09:54:06 +02:00
Samuel Pitoiset
83a63a5b12 radv/gfx10: do not emit PA_SC_TILE_STEERING_OVERRIDE twice 
CLEAR_STATE emits it for us.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-08-20 12:13:44 +02:00
Samuel Pitoiset
2ca8629fa9 radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+ 
It's emitted by the kernel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-08-20 12:13:41 +02:00
Bas Nieuwenhuizen
6c5d983865 radv: Add Renoir support. 
Took the freedom to enable dfsm even though I don't have benchmark
results yet, but it seems Raven-like.

Rest is from radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-08-19 22:34:11 +00:00
Bas Nieuwenhuizen
66ecc3eac8 radv: Fix off by one for S_028C48_MAX_ALLOC_COUNT. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-08-08 14:08:21 +02:00
Samuel Pitoiset
bb8f25233a radv/gfx10: disable LATE_ALLOC_GS on Navi14 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-07-31 12:14:29 +02:00
Samuel Pitoiset
e041a74588 radv/gfx10: implement a bug workaround for GE_PC_ALLOC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-07-31 12:14:29 +02:00
Samuel Pitoiset
0e1724af61 radv/gfx10: implement a bug workaround for NGG -> legacy transitions 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-07-31 12:14:29 +02:00
Samuel Pitoiset
6a504ab473 radv/gfx10: use L2 for DMA copy/fill operations 
It's coherent and faster. GFX7-GFX9 should also support this but
for now only uses L2 for GFX10 because it's untested on previous gens.

This fixes dEQP-VK.memory.pipeline_barrier.transfer_*

This also fixes some missing geometry in Dawn Of War III because
VBOs weren't updated correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-07-25 15:48:21 +02:00
Samuel Pitoiset
e7c356866e radv: change a bunch of >= GFX9 to == GFX9 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-07-22 09:02:26 +02:00
Dave Airlie
248161123c radv: reset the window scissor with no clear state. 
If we don't have clear state (which gfx10 doesn't currently)
we will fix to reset the scissor. AMDVLK will leave it set
to something else.

Marek also has this fix for radeonsi pending.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 11:00:44 +10:00