Commit graph

13969 commits

Author SHA1 Message Date
Kenneth Graunke
1013158227 intel: Disable 16x MSAA support on Xe3
16x MSAA isn't supported at all on certain Xe3 variants, and on its way
out on the rest.  Most vendors choose not to support it, and many apps
offer more modern multisampling and upscaling techniques these days.

Only 2/4/8x are supported going forward.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36592>
(cherry picked from commit dc2c3cf06b)
2025-08-13 12:59:03 +02:00
Rohan Garg
71812c719c intel/compiler: use the WA framework when emitting WA 14014595444
Fixes: d276ad4 "intel/compiler: implement Wa_14014595444 for DG2"
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36262>
(cherry picked from commit c978394e00)
2025-08-13 12:59:03 +02:00
Kenneth Graunke
2586692ed1 brw: Update copy propagation into EOT sends handling for Xe2 units
We're counting in REG_SIZE units here, but g112-127 is twice as large on
Xe2.  Check against 15 * reg_unit() to avoid missing out on propagation.

fossil-db results on Arc B580:

   Totals:
   Instrs: 233779396 -> 233779098 (-0.00%)
   Cycle count: 32601212742 -> 32601187382 (-0.00%); split: -0.00%, +0.00%
   Max live registers: 72695253 -> 72694326 (-0.00%); split: -0.00%, +0.00%

   Totals from 232 (0.03% of 789301) affected shaders:
   Instrs: 41071 -> 40773 (-0.73%)
   Cycle count: 1756714 -> 1731354 (-1.44%); split: -2.01%, +0.57%
   Max live registers: 22092 -> 21165 (-4.20%); split: -4.48%, +0.28%

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
(cherry picked from commit c12497f943)
2025-08-13 12:59:03 +02:00
Kenneth Graunke
407ab472bb brw: Fix units in copy propagation EOT restriction size calculation
size_read() counts in bytes.  s.alloc.sizes[] counts in REG_SIZE units.

(Affects 4 raytracing shaders in Cyberpunk 2077.)

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
(cherry picked from commit 946f768359)
2025-08-13 12:59:03 +02:00
Kenneth Graunke
733c4abb11 brw: Refactor copy propagation checks for EOT send restrictions
These are identical, pull them into a helper so we only have one place
to fix bugs.

(Marked fixes because the next two patches depend on the refactor.)

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
(cherry picked from commit 4151a39b8a)
2025-08-13 12:59:03 +02:00
Caio Oliveira
d2918b7b86 brw: Remove extra iteration on instructions from brw_opt_address_reg_load
The helper function already iterate instructions.

Fixes: 8ac7802ac8 ("brw: move final send lowering up into the IR")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36478>
(cherry picked from commit f222b16f92)
2025-08-13 12:59:02 +02:00
Lionel Landwerlin
f8f761f21f anv: fix wsi image aliasing
The private BO can get removed due to WSI aliasing and that breaks the
submission code (expecting one).

Delay the registration on the device to when the image actually gets
bound and there is a private BO.

Fixes: b21e62b71a ("anv: avoid leaking private binding for aliased wsi image")
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36474>
(cherry picked from commit 9efb3ee511)
2025-08-13 12:59:01 +02:00
Lionel Landwerlin
4a675e246f brw: fixup coarse_z computation
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The delivered values in the coarse pixel size are 0 when coarse pixel
dispatch is disabled and that is screwing up our half pixel offset
adjustment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
(cherry picked from commit 9371e8d370)
2025-07-30 11:31:15 +02:00
Lionel Landwerlin
909af54768 brw: fixup source depth enabling with coarse pixel shading
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
(cherry picked from commit 9dac7dda87)
2025-07-30 11:31:15 +02:00
Lionel Landwerlin
a10f4b9aab brw: fix NIR metadata invalidation with closest-hit shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
(cherry picked from commit 68c50d129e)
2025-07-30 11:31:15 +02:00
Iago Toral Quiroga
3bc1756734 frontend/dri: don't call set_damage_region with a null resource
This can happen if texture allocation failed.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34668>
(cherry picked from commit 103a16e4fa)
2025-07-30 11:31:15 +02:00
Juston Li
5423643b87 anv/android: refactor anb resolve to fix align assertion
Retrieving memory requirement size and alignment via
anv_image_get_memory_requirements() return's 0 before surfaces are added
by resolve_anb_image() and will assert in align64() when align is 0:

Abort message: '../src/util/u_math.h:713: uint64_t align64(uint64_t, uint64_t): assertion "util_is_power_of_two_nonzero64(alignment)" failed'

Refactor out anv_image_bind_from_gralloc() into resolve_anb_image() so
the checks are performed after the surface is adds.

Resolving also requires API 29 so return VK_ERROR_EXTENSION_NOT_PRESENT
without it.

Fixes: 43cb986d9e ("anv/android: resolve ANB swapchain images on bind")
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36060>
(cherry picked from commit e1ca09317e)
2025-07-30 11:31:15 +02:00
Mike Blumenkrantz
9f7f82a447 anv: fix format compatibility check typo
the view format is above this

Fixes: 03cdb3078a ("anv: Support multi-planar formats in anv_formats_are_compatible")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36224>
(cherry picked from commit 8a4ef5977e)
2025-07-30 11:31:13 +02:00
Jordan Justen
63e3a021f9 intel/dev: Add WCL PCI IDs
Tested with:

commit 3a252ff9d8b6dc22b20463bfcb31a4e8992b0e8f
Merge: 9800bf6fae3b 11895f375939
Author: Simona Vetter <simona.vetter@ffwll.ch>
Date:   Fri Jul 11 11:25:34 2025 +0200

Note that the kernel treats WCL similar to PTL, so 94de1dfd4729
("drm/xe/ptl: Drop force_probe requirement") also removed the
force_probe for WCL.

Backport-to: 25.1
Ref: 3c0f211bc8fc ("drm/xe: Add Wildcat Lake device IDs to PTL list")
Ref: 94de1dfd4729 ("drm/xe/ptl: Drop force_probe requirement")
Ref: drm/drm-next 3a252ff9d8b6dc22b20463bfcb31a4e8992b0e8f
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36148>
(cherry picked from commit bca1acbb42)
2025-07-30 11:31:11 +02:00
Jordan Justen
ef3ed3d281 intel/dev: Add WCL device info
Backport-to: 25.1
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36148>
(cherry picked from commit 8b771e8937)
2025-07-30 11:31:11 +02:00
Jordan Justen
63ed30ab7c intel/dev/mesa_defs.json: Add WCL WA entries
Backport-to: 25.1
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36148>
(cherry picked from commit ffabca9101)
2025-07-30 11:31:11 +02:00
Jordan Justen
7dd1466bf0 intel/dev: Add WCL platform enum
Backport-to: 25.1
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36148>
(cherry picked from commit 23bc204faa)
2025-07-30 11:31:11 +02:00
Calder Young
eac79122c1 isl: Set tiling requirements for video surfaces
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35927>
(cherry picked from commit 389ce946fd)
2025-07-16 16:23:12 +02:00
Calder Young
d8d6f3ef6f anv: Fix tiling for H.265 and VP9 video surfaces on GFX 12.5+
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35927>
(cherry picked from commit 07097c84ca)
2025-07-16 16:23:12 +02:00
Lionel Landwerlin
233754b67f genxml: fix 3DSTATE_TE definition on Gfx12.[05]
Since Gfx12+ the instruction is 5 dwords.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36146>
(cherry picked from commit 440e2e9200)
2025-07-16 16:23:12 +02:00
Jordan Justen
19bb041f72 anv: Set Xe3 as supported
Backport-to: 25.1
Ref: 16a835ed3d ("anv: Drop "not yet supported" warning for Xe2")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31893>
(cherry picked from commit f19e2e69e9)
2025-07-16 16:23:12 +02:00
Yiwei Zhang
1c3798ed86 hasvk: avoid leaking private binding for aliased wsi image
This time for hasvk and is the same with
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35893

Aliased wsi image has to share the same private binding with the
original wsi image for memory consistency. If the private binding
exists, it needs to be released before being overridden.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36095>
(cherry picked from commit c647c422db)
2025-07-16 16:23:11 +02:00
Caleb Callaway
beab312508 anv: Increase max VBs to 33 on Gen11+
Prior to Gen 11, we had to upload a bunch of SGVs
(FirstVertex, BaseVertex, BaseInstance, DrawID) via
3DSTATE_VERTEX_BUFFERS.

For Gen11+, we upload via 3DSTATE_SGVS_2 instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35376>
(cherry picked from commit 111005066d)
2025-07-16 16:23:10 +02:00
Yiwei Zhang
7769fc3af0 anv: fix ANB gralloc usage query to not append display usage bits
The consumer of the Android surface may or may not be display. e.g. it
can also be a media encoder. When BufferQueue makes the allocation, it
takes the gralloc usage bits from both the client API (EGL/Vulkan) and
the consumer side.

Cc: mesa-stable
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35785>
(cherry picked from commit 8f4c938c1e)
2025-07-16 16:23:09 +02:00
Sviatoslav Peleshko
ff529f9582 brw/disasm: Fix Gfx11 3src-instructions dst register disassembly
The conversion from bit value to register file type is already done
by the brw_eu_inst_3src_a1_dst_reg_file in the FFC macro now, so doing it
again produced incorrect results.

Fixes: e7179232 ("intel/brw: Move encoding of Gfx11 3-src inside the inst helpers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13141
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35960>
(cherry picked from commit 8d22eb960b)
2025-07-16 16:23:09 +02:00
Lionel Landwerlin
a4fd95c97c anv: do not rely on sampler objects for pipeline compilation
Descriptor set layout lifetime can be shorter than what the
implementation requires. One example is :
  * create descriptor set layout
  * create graphics pipeline library
  * destroy descriptor set layout
  * link optimize library in a final pipeline

The last step might need the descriptor set layout information again.

We've so far worked around this by taking a reference on the
descriptor set layout in the pipelines. But we forgot that descriptor
set layouts have pointers to samplers (for immutable & embedded
samplers).

We could take a reference to samplers but that sucks for various
reasons :
  - it consumes dynamic state heap space
  - it could cause issues with capture-replay placement

So instead we copy the information from the samplers that might be
needed in cases like link optimization. This includes :
  - ycbcr conversion state (used for NIR lowering)
  - embedded sampler data (to recreate the sampler)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35955>
(cherry picked from commit 67e452669e)
2025-07-16 16:23:09 +02:00
Lionel Landwerlin
48b38a86f0 anv: rework embedded sampler hashing
Create a hashing key on all samplers so we can just copy that anywhere
we need it. That key already contains the needed parameters for
embedded samplers, so the sha1 stuff can go away.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35955>
(cherry picked from commit 98bc185376)
2025-07-16 16:23:09 +02:00
Yiwei Zhang
a50e474842 anv: avoid leaking private binding for aliased wsi image
Aliased wsi image has to share the same private binding with the
original wsi image for memory consistency. If the private binding
exists, it needs to be released before being overridden.

Fixes: d85a9d658f ("anv/image: Call into WSI to create swapchain images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35893>
(cherry picked from commit b21e62b71a)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
b379dca31d anv: Do not emit batch_emit_fast_color_dummy_blit() for video engine
Wa_16018063123 don't apply to video engine also video engine don't
support XY_FAST_COLOR_BLT.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Fixes: ec43c20182 ("anv: implement dummy blit for Wa_16018063123")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit 926e6a94ad)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
a52ae19823 anv: Flush before invalidate aux map in copy and video engines
BSpec: 43904
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 46f5359238 ("anv: Invalidate aux map for copy/video engine")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit 4618a99a4c)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
57c189dbc8 anv: Read the correct register for aux table invalidation when in GPGPU mode in render engine
For 3D or GPGPU modes the same render engine should be used, CCS
register should only be used when using compute engine.

Fixes: 46f5359238 ("anv: Invalidate aux map for copy/video engine")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit e68f81eaf6)
2025-07-16 16:23:08 +02:00
Caio Oliveira
580c4c56e9 brw: Use the right width in brw_nir_apply_key for BS shaders
Fixes: 23c7142cd6 ("anv: disable SIMD16 for RT shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35798>
(cherry picked from commit c733f07378)
2025-07-16 16:23:07 +02:00
Iván Briano
61761d49d5 anv: move view_usage check to before setting the protected bit on it
Otherwise the comparison will always be false for protected content.

Also remove extra setting of the protected bit that was happening later.

Fixes: 8d9cc6aa23 ("anv: properly flag image/imageviews for ISL protection")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35870>
(cherry picked from commit 5b58b838fe)
2025-07-02 16:19:33 +02:00
Calder Young
e09031bbd3 anv: Fix typo when checking format's extended usage flag
Fixes: f4c1753c1a ("anv: report color/storage features on YCbCr images with EXTENDED_USAGE")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35703>
(cherry picked from commit 646977348b)
2025-07-02 16:19:32 +02:00
Lionel Landwerlin
8a951265e0 anv: fix sampler hashing in set layouts
The logic needs to handle embedded samplers without conversion state.

Fixes vkd3d-proton's test_sampler_border_color

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35679>
(cherry picked from commit 786bace191)
2025-07-02 16:19:31 +02:00
Lionel Landwerlin
1dde4bccd4 anv: fix clears on single aspect of YCbCr images
Fixes vkd3d-proton's test_planar_video_formats

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35679>
(cherry picked from commit 32b53a7c6a)
2025-07-02 16:19:30 +02:00
Lionel Landwerlin
e4f52e75ef isl: handle DISABLE_AUX in get_mcs_surf
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35679>
(cherry picked from commit 691ac65000)
2025-07-02 16:19:30 +02:00
Eric Engestrom
d994ff9c89 intel/compiler tests: fix variable type for getopt_long() return value
`getopt_long()` returns an `int`, not a `char`; putting the value in
a `char` before comparing it to `-1` was making the comparison always
fail, resulting in the invalid codepath taken that then fails with:

    option `-' is invalid: ignored

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34756>
(cherry picked from commit 99e8d804bf)
2025-07-02 16:19:30 +02:00
Eric Engestrom
08edf564a7 intel/compiler tests: fix "is there something after the options" check
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34756>
(cherry picked from commit f545f9eed4)
2025-07-02 16:19:30 +02:00
Eric Engestrom
f36dcedc36 intel/compiler tests: fix path-to-string conversion
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34756>
(cherry picked from commit 729922cdae)
2025-07-02 16:19:30 +02:00
Eric Engestrom
aea08bbb1f intel/compiler tests: rewrite subprocess handling in run-test.py
`subprocess.Popen()` returns immediately, and the subprocess might not
have finished by the time `stdout` is read on the next line, spuriously
failing the tests.

`subprocess.check_output()` makes sure the output is available before
returning, solving this issue; it additionally raises an error if the
subprocess failed, giving a better error than a failed diff later in the
script.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34756>
(cherry picked from commit de6ab1beda)
2025-07-02 16:19:30 +02:00
Eric Engestrom
22debc9b65 hasvk: only run tests on x86 (32 & 64 bit)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13305
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35635>
(cherry picked from commit 6addaca3d4)
2025-07-02 16:19:30 +02:00
Lionel Landwerlin
cd001c54a5 anv: only use compressed memory types on Xe2+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 252cac1e5c ("anv: avoid memory type changes with INTEL_DEBUG=noccs")
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35615>
(cherry picked from commit bfee389f0c)
2025-07-02 16:19:29 +02:00
Emma Anholt
312c62a6d7 intel/shim: Report support for PXP status.
Otherwise drm-shim complains on every shader-db run.

Fixes: e358173fbf ("iris: Add GET_PARAM for protected context capability support")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
(cherry picked from commit 1b6689d79e)
2025-07-02 16:19:29 +02:00
Sagar Ghuge
1cf750367a anv: Apply flush during WriteAccelerationStructures
We are reading accel header parameter those are updated by CS, so we
need to apply flushes to make L3 coherent with CS.

This fixes ray query tests on MTL:
- dEQP-VK.ray_query.*.serialization.*

Cc: mesa-stable

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35590>
(cherry picked from commit a676ba9294)
2025-07-02 16:19:29 +02:00
José Roberto de Souza
b09fcbc09b Revert "anv: Enable preemption due 3DPRIMITIVE in GFX 12"
Enabling preemption in 3DPRIMITIVE is causing glitches on Dota 2,
so reverting this until the issue with preemption is fixed.

This reverts commit 3cd972a2d3.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13289
Fixes: 12ddaa6b8b ("anv: Enable preemption due 3DPRIMITIVE in GFX 12")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35586>
(cherry picked from commit 37f4182ac3)
2025-07-02 16:19:29 +02:00
Yiwei Zhang
9fe545c99b hasvk: use narrow range to match up with mesa EGL
This matches up with the native gl drivers as well as the media stack.

- VK_SAMPLER_YCBCR_RANGE_ITU_NARROW <=> EGL_YUV_NARROW_RANGE_EXT

Cc: mesa-stable
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35597>
(cherry picked from commit 5cb50c3cf5)
2025-06-18 17:55:48 +02:00
Yiwei Zhang
edfea2d928 anv: use narrow range to match up with mesa EGL
This matches up with the native gl drivers as well as the media stack.

- VK_SAMPLER_YCBCR_RANGE_ITU_NARROW <=> EGL_YUV_NARROW_RANGE_EXT

Cc: mesa-stable
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35597>
(cherry picked from commit c169ad60c1)
2025-06-18 17:55:48 +02:00
Calder Young
44e5299310 anv: Support multi-planar formats in anv_formats_are_compatible
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
(cherry picked from commit 03cdb3078a)
2025-06-18 17:55:48 +02:00
Lionel Landwerlin
28fd73a459 anv: report color/storage features on YCbCr images with EXTENDED_USAGE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13219
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
(cherry picked from commit f4c1753c1a)
2025-06-18 17:55:48 +02:00