José Roberto de Souza 57c189dbc8 anv: Read the correct register for aux table invalidation when in GPGPU mode in render engine ... For 3D or GPGPU modes the same render engine should be used, CCS register should only be used when using compute engine. Fixes: 46f5359238 ("anv: Invalidate aux map for copy/video engine") Reviewed-by: Ivan Briano <ivan.briano@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700> (cherry picked from commit e68f81eaf6)		2025-07-16 16:23:08 +02:00
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blorp	intel: Fix the MOCS values in XY_BLOCK_COPY_BLT for Xe2+	2025-04-23 12:21:56 +02:00
ci	ci/lava: Consolidate piglit trace job definitions	2025-04-11 07:05:07 +00:00
common	intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs	2025-03-10 17:23:07 -07:00
compiler	brw: Use the right width in brw_nir_apply_key for BS shaders	2025-07-16 16:23:07 +02:00
decoder	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
dev	intel/dev: update mesa_defs.json from internal database	2025-04-30 14:16:00 +02:00
ds	perfetto/android: align datasource names with tooling expectations	2025-04-08 18:29:10 +00:00
executor	intel/executor: Fix bfloat example for converting F to packed BF	2025-04-30 14:15:56 +02:00
genxml	intel: Fix the MOCS values in XY_BLOCK_COPY_BLT for Xe2+	2025-04-23 12:21:56 +02:00
isl	isl: handle DISABLE_AUX in get_mcs_surf	2025-07-02 16:19:30 +02:00
nullhw-layer	build: pass licensing information in SPDX form	2024-06-29 12:42:49 -07:00
perf	intel/perf: Update intel_perf to match xe_drm.h	2025-04-11 18:35:49 +00:00
shaders	intel: use common CL args	2025-03-06 00:43:59 +00:00
tools	intel/shim: Report support for PXP status.	2025-07-02 16:19:29 +02:00
vulkan	anv: Read the correct register for aux table invalidation when in GPGPU mode in render engine	2025-07-16 16:23:08 +02:00
vulkan_hasvk	hasvk: only run tests on x86 (32 & 64 bit)	2025-07-02 16:19:30 +02:00
meson.build	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00