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brw: Use the right width in brw_nir_apply_key for BS shaders
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Fixes: 23c7142cd6 ("anv: disable SIMD16 for RT shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35798>
This commit is contained in:
Caio Oliveira 2025-06-27 08:07:03 -07:00 • committed by Marge Bot
parent 8911437038
commit c733f07378
1 changed files with 7 additions and 7 deletions
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14
src/intel/compiler/brw_compile_bs.cpp
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@ -78,19 +78,19 @@ compile_single_bs(const struct brw_compiler *compiler,
prog_data->max_stack_size = MAX2(prog_data->max_stack_size,
shader->scratch_size);
const unsigned max_dispatch_width = 16;
brw_nir_apply_key(shader, compiler, &key->base, max_dispatch_width);
/* Since divergence is a lot more likely in RT than compute, it makes
* sense to limit ourselves to the smallest available SIMD for now.
*/
const unsigned required_width = compiler->devinfo->ver >= 20 ? 16u : 8u;
brw_nir_apply_key(shader, compiler, &key->base, required_width);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_flags);
brw_simd_selection_state simd_state{
.devinfo = compiler->devinfo,
.prog_data = prog_data,
/* Since divergence is a lot more likely in RT than compute, it makes
* sense to limit ourselves to the smallest available SIMD for now.
*/
.required_width = compiler->devinfo->ver >= 20 ? 16u : 8u,
.required_width = required_width,
};
std::unique_ptr<brw_shader> v[2];