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106 commits

Author SHA1 Message Date
Samuel Pitoiset
19c712c8ef radv: rename rast_prim to vgt_outprim_type everywhere 
To avoid confusion between the primitive topology and the output
rasterized primitive.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
 2025-08-25 12:17:38 +00:00
Samuel Pitoiset
12f8508363 radv: add a new dirty bit for the VGT prim state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
 2025-08-25 12:17:31 +00:00
Samuel Pitoiset
4096009ea1 radv: add a new dirty bit for the patch control points state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
 2025-08-25 12:17:30 +00:00
Samuel Pitoiset
0c3680bea3 radv: add a new dirty bit for the tess domain origin state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
 2025-08-25 12:17:29 +00:00
Samuel Pitoiset
db298d1b50 radv: make radv_cmd_state::dirty a 64-bit field
Some checks are pending
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More RADV_CMD_DIRTY states will be added later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:05 +00:00
Samuel Pitoiset
772f185fc0 radv: add a new dirty bit for the scissor state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:05 +00:00
Samuel Pitoiset
54b79d0f50 radv: add a new dirty bit for the sample locations state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:04 +00:00
Samuel Pitoiset
dc3371332e radv: add a new dirty bit for the blend constants state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:04 +00:00
Samuel Pitoiset
1be9cd43a8 radv: add a new dirty bit for the VS prolog state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:03 +00:00
Samuel Pitoiset
7694ad969e radv: add a new dirty bit for the depth bias state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
 2025-08-22 08:12:00 +00:00
Samuel Pitoiset
cbe42a4c43 radv: rename RADV_CMD_DIRTY_TESS_STATE to RADV_CMD_DIRTY_TCS_TES_STATE 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
 2025-08-21 18:36:35 +00:00
Samuel Pitoiset
3d1efbce98 radv: add a new dirty bit for the rast samples state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
 2025-08-21 18:36:35 +00:00
Samuel Pitoiset
ea6cb5e7bf radv: add a new dirty bit for the FSR state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
 2025-08-21 18:36:35 +00:00
Samuel Pitoiset
604296a282 radv: add a new dirty bit for the ngg culling state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
 2025-08-21 18:36:34 +00:00
Samuel Pitoiset
5db8a16053 radv: add a new dirty bit for the binning state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
 2025-08-21 18:36:32 +00:00
Samuel Pitoiset
5024c02d45 radv: precompute the depth clip enable 
This should avoid re-emitting some states if it doesn't actually change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36852>
 2025-08-21 08:23:04 +00:00
Samuel Pitoiset
2b5844df0e radv: precompute the depth clamp mode 
This should avoid re-emitting the state if it doesn't actually change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36852>
 2025-08-21 08:23:04 +00:00
Samuel Pitoiset
413f781234 radv: add a new dirty bit for the viewport state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36852>
 2025-08-21 08:23:03 +00:00
Samuel Pitoiset
95d2f009a9 radv: emit compute pipeline with buffered SH regs on GFX12 
This also includes RT, task shaders and DGC IES for compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
 2025-08-19 18:01:21 +00:00
Samuel Pitoiset
81ec36edb8 radv: determine if push constants need to be uploaded earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
 2025-08-18 07:25:34 +00:00
Samuel Pitoiset
e6c485afb0 radv: initialize HiZ metadata during image layout transitions 
This will allow us to enable HiZ for all levels of the image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
 2025-08-12 13:48:10 +00:00
Faith Ekstrand
22a1f34728 radv: Delete radv_video_session_params 
It was just a dummy wrapper around the runtime struct.  We do, however,
have to keep at least the Create/Update entrypoints because RADV has to
do some patching for video encode.  Since we're keeping Create, we keep
Destroy as well.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36646>
 2025-08-11 20:34:56 +00:00
Samuel Pitoiset
a520f75229 radv: move tracked registers to radv_cmd_stream 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
 2025-08-08 11:49:24 +00:00
Samuel Pitoiset
e2def79e2a radv: move context_roll_without_scissor_emitted to radv_cmd_stream 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
 2025-08-08 11:49:24 +00:00
Samuel Pitoiset
cc85f33b57 radv: move buffered registers for GFX12 to radv_cmd_stream 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
 2025-08-08 11:49:23 +00:00
Samuel Pitoiset
3ccb48ec46 radv: switch to radv_cmd_stream everywhere 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
 2025-08-08 11:49:23 +00:00
Samuel Pitoiset
5982e8f331 radv: introduce radv_cmd_stream 
radeon_cmdbuf is too low level for stuff like tracked registers and
buffered registers on GFX11+.

This commit introduces radv_cmd_stream which is defined like:

struct radv_cmd_stream {
   struct radeon_cmdbuf *b;
   // TODO: add tracked regs
   // TODO: add buffered regs
};

It will be much easier/cleaner to implement tracked/buffered registers
with this new structure.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
 2025-08-08 11:49:23 +00:00
Samuel Pitoiset
2e51b50db2 radv: regroup CB related states emission together 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
 2025-08-08 08:16:26 +00:00
Samuel Pitoiset
fa677ca0c3 radv: track more CB related context registers on < GFX12 
The tracked registers mechanism isn't used yet on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
 2025-08-08 08:16:25 +00:00
Qiang Yu
196569b1a4 all: rename gl_shader_stage to mesa_shader_stage 
It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:40 +08:00
Samuel Pitoiset
1323a1194e radv: fix reporting instance/vertex_count for direct draws with RGP on GFX12
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This is a cursed interaction with RGP...

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36188>
 2025-07-22 05:52:10 +00:00
Samuel Pitoiset
ea742877f6 radv: re-run clang-format 
For style consistency.

$ clang-format -i $(find src/amd/vulkan/ -name "*.h" -o -name "*.c" -o -name "*.cpp")

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36118>
 2025-07-16 09:10:33 +02:00
Samuel Pitoiset
7425b5a82f radv: move radv_push_descriptor_set to radv_cmd_buffer.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35732>
 2025-06-27 07:55:37 +00:00
Dave Airlie
37e71a5cb2 radv/video: add support for AV1 encoding
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Co-authored-by: Charlie Turner <cturner@igalia.com>
Co-authored-by: Benjamin Cheng <benjamin.cheng@amd.com>
Co-authored-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32440>
 2025-06-26 15:41:01 +00:00
Samuel Pitoiset
098c15bfc9 radv: use paired shader registers for graphics on GFX12
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Loosely based on RadeonSI.

This is supposed to be faster because parsing the packet header seems
to be the main bottleneck on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35282>
 2025-06-04 09:17:51 +00:00
Samuel Pitoiset
c8f9e0fb05 radv: add a new dirty state for emitting tess user SGPRs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35282>
 2025-06-04 09:17:51 +00:00
Samuel Pitoiset
6528bb76b1 radv: stop using GDS for emulated prims gen/xfb queries on GFX11-GFX11.5 
Use the same path as GFX12 using SSBO atomics because performance
should be equal or slightly better due to less synchronization.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35017>
 2025-05-21 08:48:04 +02:00
Samuel Pitoiset
266c3bdeaf radv: adjust comments describing GDS needs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35017>
 2025-05-21 08:46:12 +02:00
Samuel Pitoiset
4d1fcd75f9 radv: fix non-indexed draws with primitive restart enable
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On GFX11+, DISABLE_FOR_AUTO_INDEX=1 automatically disables primitive
restart enable for non-indexed draws.

On GFX10-GFX10.3 the hw considers primitive restart enable for
non-indexed draws and the driver must disable it explicitly.

GFX9 and older gens aren't affected but applying the change for them
simplifies the implementation.

To fix that, move emitting primitive restart enable at draw time
because it needs to know if the draw is indexed or not.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13037
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34996>
 2025-05-20 13:57:35 +00:00
Samuel Pitoiset
3ca2f71f3d radv: fix conditional rendering with DGC and non native 32-bit predicate 
When the hardware doesn't natively support 32-bit predication, the
driver has a fallback which allocates a 64-bit predicate to the upload
BO in order to copy the original value.

But when conditional rendering is enabled in the stateCommandBuffer
which is used by preprocess() and the execute() is recorded also in the
stateCommandBuffer. If the preprocess() is recorded in a different
cmdbuf which is submitted before the cmdbuf that contains execute(),
the fallback (ie. alloc + COPY_DATA) will be performed after. This would
cause the predicate value to be always 0.

To fix that, keep track of the user predication VA which is the only
VA that needs to be used by DGC because it reads 32-bit from the shader.

This fixes a very weird corner case with vkd3d-proton.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13143
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34953>
 2025-05-15 05:51:04 +00:00
Samuel Pitoiset
9a07ccbc89 radv: fix emitting dynamic viewports/scissors when the count is static 
In a scenario where the viewports/scissors are a dynamic state but the
count is static (ie. updated when a graphics pipeline is bound), the
driver wasn't considering that and it was re-emitting the previous
number of viewports/scissors.

This fixes rendering issue with Blender.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13127
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34921>
 2025-05-13 16:08:14 +00:00
Samuel Pitoiset
c1ebf82700 radv: track redundant DB_RENDER_OVERRRIDE register writes on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34420>
 2025-04-10 06:56:25 +00:00
Samuel Pitoiset
0ba3a8b3cc radv: add clip rects state bit for emitting discard rectangles
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Better match the hw naming.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
 2025-04-08 08:42:17 +00:00
Samuel Pitoiset
08918f0880 radv: regroup emitting all MSAA states in one function 
All register writes are optimized out. Also this will allow to use
paired context register writes on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
 2025-04-08 08:42:17 +00:00
Samuel Pitoiset
e8d787e1ef radv: track more MSAA related register writes 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
 2025-04-08 08:42:17 +00:00
Samuel Pitoiset
11b6d2ba60 radv: determine if HiZ/HiS is enabled earlier on GFX12 
To lower CPU overhead of the hardware workaround.

Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
 2025-04-08 08:03:11 +02:00
Samuel Pitoiset
4bc971a0bd radv: add new helper to suspend/resume user conditional rendering 
Instead of duplicating same code everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
 2025-04-03 08:54:36 +00:00
Samuel Pitoiset
391da996ed radv: rework the shader pointer emit as macros 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset
0e0a393a4a radv/video: use a pointer to write the total task size 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34150>
 2025-03-26 14:59:12 +00:00
Samuel Pitoiset
b2a2d197f9 radv: track redundant register writes for PA_SC_HISZ_CONTROL on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34070>
 2025-03-14 09:46:58 +00:00