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radv: add a new dirty bit for the depth bias state

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
This commit is contained in:
Samuel Pitoiset 2025-08-21 10:05:42 +02:00 • committed by Marge Bot
parent 76c16c4480
commit 7694ad969e
2 changed files with 14 additions and 8 deletions
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19
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -3355,7 +3355,7 @@ radv_emit_blend_constants(struct radv_cmd_buffer *cmd_buffer)
}
static void
radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer)
radv_emit_depth_bias_state(struct radv_cmd_buffer *cmd_buffer)
{
const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct radv_rendering_state *render = &cmd_buffer->state.render;
@ -3391,6 +3391,8 @@ radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer)
radeon_set_context_reg(R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, pa_su_poly_offset_db_fmt_cntl);
radeon_end();
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_DEPTH_BIAS_STATE;
}
static void
@ -5385,9 +5387,6 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const ui
if (states & RADV_DYNAMIC_BLEND_CONSTANTS)
radv_emit_blend_constants(cmd_buffer);
if (states & RADV_DYNAMIC_DEPTH_BIAS)
radv_emit_depth_bias(cmd_buffer);
if (states & (RADV_DYNAMIC_SAMPLE_LOCATIONS | RADV_DYNAMIC_SAMPLE_LOCATIONS_ENABLE))
radv_emit_sample_locations(cmd_buffer);
@ -9361,15 +9360,15 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
render->has_hiz_his = has_hiz_his;
render->vrs_att = vrs_att;
render->vrs_texel_size = vrs_texel_size;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER | RADV_CMD_DIRTY_BINNING_STATE | RADV_CMD_DIRTY_FBFETCH_OUTPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER | RADV_CMD_DIRTY_BINNING_STATE |
RADV_CMD_DIRTY_FBFETCH_OUTPUT | RADV_CMD_DIRTY_DEPTH_BIAS_STATE;
if (pdev->info.rbplus_allowed)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RBPLUS;
if (pdev->info.gfx_level >= GFX10_3)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FSR_STATE;
cmd_buffer->state.dirty_dynamic |=
RADV_DYNAMIC_DEPTH_BIAS | RADV_DYNAMIC_STENCIL_TEST_ENABLE | RADV_DYNAMIC_COLOR_BLEND_ENABLE;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_STENCIL_TEST_ENABLE | RADV_DYNAMIC_COLOR_BLEND_ENABLE;
if (pdev->info.gfx_level >= GFX12)
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_RASTERIZATION_SAMPLES;
@ -11462,6 +11461,9 @@ radv_validate_dynamic_states(struct radv_cmd_buffer *cmd_buffer, uint64_t dynami
if (dynamic_states & (RADV_DYNAMIC_RASTERIZATION_SAMPLES | RADV_DYNAMIC_LINE_RASTERIZATION_MODE |
RADV_DYNAMIC_POLYGON_MODE | RADV_DYNAMIC_SAMPLE_LOCATIONS_ENABLE))
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RAST_SAMPLES_STATE;
if (dynamic_states & RADV_DYNAMIC_DEPTH_BIAS)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DEPTH_BIAS_STATE;
}
static void
@ -11566,6 +11568,9 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RASTER_STATE)
radv_emit_raster_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DEPTH_BIAS_STATE)
radv_emit_depth_bias_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DEPTH_STENCIL_STATE)
radv_emit_depth_stencil_state(cmd_buffer);

3
src/amd/vulkan/radv_cmd_buffer.h
View file

@ -110,7 +110,8 @@ enum radv_cmd_dirty_bits {
RADV_CMD_DIRTY_NGGC_STATE = 1ull << 24,
RADV_CMD_DIRTY_FSR_STATE = 1ull << 25,
RADV_CMD_DIRTY_RAST_SAMPLES_STATE = 1ull << 26,
RADV_CMD_DIRTY_ALL = (1ull << 27) - 1,
RADV_CMD_DIRTY_DEPTH_BIAS_STATE = 1ull << 27,
RADV_CMD_DIRTY_ALL = (1ull << 28) - 1,
RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE,
};