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radv: add a new dirty bit for the VS prolog state

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
This commit is contained in:
Samuel Pitoiset 2025-08-21 10:21:38 +02:00 • committed by Marge Bot
parent cc7b5ab0c9
commit 1be9cd43a8
2 changed files with 15 additions and 9 deletions
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21
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -5190,13 +5190,15 @@ emit_prolog_inputs(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader
}
static void
radv_emit_vertex_input(struct radv_cmd_buffer *cmd_buffer)
radv_emit_vs_prolog_state(struct radv_cmd_buffer *cmd_buffer)
{
const struct radv_shader *vs_shader = radv_get_shader(cmd_buffer->state.shaders, MESA_SHADER_VERTEX);
struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
assert(!cmd_buffer->state.mesh_shading);
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VS_PROLOG_STATE;
if (!vs_shader->info.vs.has_prolog)
return;
@ -5394,9 +5396,6 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const ui
(pdev->info.gfx_level >= GFX12 && states & RADV_DYNAMIC_PATCH_CONTROL_POINTS))
radv_emit_primitive_topology(cmd_buffer);
if (states & RADV_DYNAMIC_VERTEX_INPUT)
radv_emit_vertex_input(cmd_buffer);
if (states & RADV_DYNAMIC_PATCH_CONTROL_POINTS)
radv_emit_patch_control_points(cmd_buffer);
@ -6874,7 +6873,7 @@ radv_CmdBindVertexBuffers2(VkCommandBuffer commandBuffer, uint32_t firstBinding,
cmd_buffer->state.vbo_misaligned_mask_invalid = misaligned_mask_invalid;
cmd_buffer->state.vbo_misaligned_mask &= ~misaligned_mask_invalid;
cmd_buffer->state.vbo_unaligned_mask &= ~misaligned_mask_invalid;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VS_PROLOG_STATE;
}
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER;
@ -7300,7 +7299,7 @@ radv_bind_vs_input_state(struct radv_cmd_buffer *cmd_buffer, const struct radv_g
cmd_buffer->state.vbo_unaligned_mask = 0;
cmd_buffer->state.vbo_misaligned_mask_invalid = src->attribute_mask;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VS_PROLOG_STATE;
}
static void
@ -7858,7 +7857,7 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline
/* Re-emit the VS prolog when a new vertex shader is bound. */
if (vs->info.vs.has_prolog) {
cmd_buffer->state.emitted_vs_prolog = NULL;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VS_PROLOG_STATE;
}
/* Re-emit the vertex buffer descriptors because they are really tied to the pipeline. */
@ -11462,6 +11461,9 @@ radv_validate_dynamic_states(struct radv_cmd_buffer *cmd_buffer, uint64_t dynami
if (dynamic_states & RADV_DYNAMIC_DEPTH_BIAS)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DEPTH_BIAS_STATE;
if (dynamic_states & RADV_DYNAMIC_VERTEX_INPUT)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VS_PROLOG_STATE;
}
static void
@ -11557,6 +11559,9 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (dynamic_states)
radv_cmd_buffer_flush_dynamic_state(cmd_buffer, dynamic_states);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_VS_PROLOG_STATE)
radv_emit_vs_prolog_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_CLIP_RECTS_STATE)
radv_emit_clip_rects_state(cmd_buffer);
@ -11692,7 +11697,7 @@ radv_bind_graphics_shaders(struct radv_cmd_buffer *cmd_buffer)
/* Re-emit the VS prolog when a new vertex shader is bound. */
if (vs->info.vs.has_prolog) {
cmd_buffer->state.emitted_vs_prolog = NULL;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VS_PROLOG_STATE;
}
/* Re-emit the vertex buffer descriptors because they are really tied to the pipeline. */

3
src/amd/vulkan/radv_cmd_buffer.h
View file

@ -111,7 +111,8 @@ enum radv_cmd_dirty_bits {
RADV_CMD_DIRTY_FSR_STATE = 1ull << 25,
RADV_CMD_DIRTY_RAST_SAMPLES_STATE = 1ull << 26,
RADV_CMD_DIRTY_DEPTH_BIAS_STATE = 1ull << 27,
RADV_CMD_DIRTY_ALL = (1ull << 28) - 1,
RADV_CMD_DIRTY_VS_PROLOG_STATE = 1ull << 28,
RADV_CMD_DIRTY_ALL = (1ull << 29) - 1,
RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE,
};