Commit graph

406 commits

Author SHA1 Message Date
Georg Lehmann
a87cdfc6b7 radv/nir/rt: preserve inf/nan for emulated RT intersect
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39641>
2026-02-10 18:42:02 +00:00
Marek Olšák
61bfc298ba ac: set missing dest_type for image_deref_load
required for lowering to load_buffer_amd

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:53 +00:00
Natalie Vock
3275be503c radv/rt: Fix discardable attributes on chit and traversal shaders
It was incorrect to mark chit/miss arguments as discardable without
the equivalent in the traversal shader. Also, tail calls with modified
parameters that aren't marked discardable are incorrect.

This could lead to random corruption by clobbering parameter values
across two levels of nested calls: A Raygen shader calls traversal,
expecting e.g. the ray tMax parameter to be preserved. Traversal
overwrites the parameter's register with the hit t and tail-calls chit,
which immediately returns to raygen. Now the raygen shader still has the
clobbered tMax (which is actually the ray hit t) - if it calls traversal
multiple times, the second traversal iteration may use the previous
ray's hit t as tMax instead of the intended value.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39579>
2026-01-31 14:26:58 +00:00
Natalie Vock
0d7705c206 radv/rt: Fix some tail-call compatibility checks
There were two issues here:
1. Tail calls where the tail-callee receives modified parameters are
hazardous and only work if the parameter is return or discardable.
Otherwise, the caller of the function that executes the tail-call may
not expect some of the parameters to be clobbered.
2. There was also an indexing confusion with the call instruction vs.
call signature parameters. The call instruction has not been adapted
to the new lowered signatures, where the system args are prepended. To
make things clearer, split the loop into two, one iterating over
parameters in the call signature and one for parameters of the call
instruction.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39579>
2026-01-31 14:26:58 +00:00
Samuel Pitoiset
5911ba5ff5 radv/meta: fix 3D color resolves with compute when base slice isn't zero
Needs to consider the base offset, otherwise it's resolving to the
first 3D slice.

Fixes very recent VKCTS coverage dEQP-VK.pipeline.*.multisample.m10_resolve.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39393>
2026-01-27 14:14:19 +00:00
Natalie Vock
30f6eacfad radv/rt: Call ahit/isec shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:55 +00:00
Natalie Vock
a03e9287c3 radv/rt: Compile ahit/isec shaders to asm
We can express any-hit/intersection shaders as functions, too.
Any-hit/Intersection shaders need the usual parameters like launch
IDs/descriptor data/ray properties, origin, direction/etc., but also
some special parameters related to traversal state. Any-hit/intersection
shaders need to return whether the hit was accepted and/or traversal
should be terminated, as well as the intersection T value (for
intersection shaders). Both any-hit and intersection shaders also need
to be passed hit attributes via parameters. Closest-Hit shaders need
those too, but we pass them out-of-band via LDS. LDS is used for the
traversal stack when any-hit/intersection shaders, so we need to pass
them via parameters.

Hit attributes are similar to ray payloads in the sense that they're
dynamically sized depending on how much space the application uses.
However, unlike ray payloads, hit attribute sizes have a strict upper
bound of 8 dwords. To make managing parameters easier, we put all hit
attributes in a single vector parameter with 0-8 components. This
prevents having a function with two sets of arbitrary numbers of
parameters.

This commit sets up ahit/isec function signatures and implements
lowering for ahit/isec-specific intrinsics in the context of these
functions. Subsequent commits will merely have to call into these
functions to execute a separate-compiled any-hit/intersection shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:55 +00:00
Natalie Vock
e74e0983a7 radv/rt: Fix terminate_ray handling for intersection shaders
terminate_ray should only return from any-hit shaders, it should not
skip the intersection shader. If we insert a nir_jump_return when
processing the already-inlined any-hit shader, the intersection shader
will be skipped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:54 +00:00
Natalie Vock
646d3b9645 radv/nir: Make nir_lower_intersection_shader public
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:54 +00:00
Natalie Vock
1fb005b487 radv/nir: Add and use radv_nir_return_param_from_type helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:54 +00:00
Natalie Vock
bde7bebc01 radv/rt: Don't consider non-internal INTERSECTION shaders as the traversal shader
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
2026-01-20 21:49:54 +00:00
Rhys Perry
f5f2f9110c radv/rt: lower non-return load_param to variable loads
nir_intrinsic_load_param can't be CSE'd, which can prevent phi cleanup
and potentially unneeded scratch access.

fossil-db (navi31):
Totals from 4 (0.01% of 79825) affected shaders:
Instrs: 2504 -> 2384 (-4.79%)
CodeSize: 13584 -> 12784 (-5.89%)
Latency: 96124 -> 96056 (-0.07%)
InvThroughput: 12016 -> 12008 (-0.07%)
Copies: 664 -> 504 (-24.10%)
Branches: 92 -> 88 (-4.35%)
VALU: 1232 -> 1112 (-9.74%)
VOPD: 308 -> 228 (-25.97%)

fossil-db (navi31, monolithic pipelines disabled):
Totals from 52 (0.06% of 80095) affected shaders:
Instrs: 126296 -> 124734 (-1.24%)
CodeSize: 718272 -> 707864 (-1.45%)
Latency: 2866019 -> 2865125 (-0.03%)
InvThroughput: 502663 -> 502537 (-0.03%)
Copies: 19616 -> 17536 (-10.60%)
Branches: 4344 -> 4292 (-1.20%)
VALU: 65432 -> 63872 (-2.38%)
VOPD: 14543 -> 13503 (-7.15%)

fossil-db (navi31, monolithic pipelines disabled, any-hit function calls):
Totals from 52 (0.06% of 80304) affected shaders:
Instrs: 38232 -> 34956 (-8.57%)
CodeSize: 184616 -> 171400 (-7.16%)
Latency: 944112 -> 941483 (-0.28%)
InvThroughput: 122152 -> 121817 (-0.27%)
Copies: 13065 -> 10302 (-21.15%)
Branches: 1471 -> 1419 (-3.54%)
PreSGPRs: 2673 -> 2598 (-2.81%)
VALU: 22576 -> 19368 (-14.21%)
SALU: 6549 -> 6474 (-1.15%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39344>
2026-01-19 08:55:39 +00:00
Samuel Pitoiset
1199f91a2f radv/meta: use 2D array for color resolves with compute
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39285>
2026-01-16 11:35:34 +00:00
Emma Anholt
b375da7f2a nir: Let nir_eval_const_opcode() return a poison mask in case of UB.
This is unused by any callers currently, but will be useful for nir
algebraic pattern testing, and as a way to turn our comments in
nir_opcodes.py into actual C code.  For now, always returns false.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Natalie Vock
c5d796c902 radv/rt: Use function call structure in NIR lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
2026-01-14 14:19:06 +00:00
Alyssa Rosenzweig
e98728de3c radv: cleanup texture builder
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39271>
2026-01-14 08:18:15 +00:00
Konstantin Seurer
58a35647e1 radv: Fix crash if proceed comes before initialize
Some checks are pending
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"initialize" can be NULL if the rq_proceed was visited before
rq_initialize.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14626
cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39251>
2026-01-12 22:34:32 +00:00
Dave Airlie
ab9e904f24 radv/coopmat: fix deref stride
Some checks are pending
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This at least fixes the nir debug output to have correct values.

Fixes: 48fc8c8d1c ("radv/nir/lower_cmat: set optimal load/store alignment")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39256>
2026-01-12 10:39:05 +00:00
Natalie Vock
1f6ac3fa93 radv/rt,aco: Always dispatch 1D workgroups for RT
We will swizzle the workgroups ourselves in the next commit.
Removes the need for 1D dispatch workarounds.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
2026-01-08 19:49:54 +01:00
Natalie Vock
8baa95e4aa radv/rt: Use subgroup invocation for stack index
Workgroup == subgroup anyway, and we don't have the workgroup thread IDs
in RT shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
2026-01-08 19:49:45 +01:00
Georg Lehmann
a706769a0b nir: move exact bit to nir_fp_math_control
Unifies nir per instruction float control.

In the future this can be split into contract/reassoc/transform
like SPIR-V.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (except SPIR-V)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>
2026-01-07 09:40:57 +00:00
Timur Kristóf
8e6bff4caa radv: Lower 64-bit VS inputs to 32-bit
In RADV, we already lower all 64-bit I/O to 32-bit,
except VS inputs. Most of the newer NIR passes that
deal with I/O do not support 64-bit I/O, so now it's
time for us to also lower 64-bit VS inputs to 32-bit.

No Fossil DB changes on Strix Halo (GFX11.5).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
2026-01-01 17:44:40 -06:00
Timur Kristóf
fc57fa4589 radv, radeonsi: Don't pass task ring info to mesh/task payload lowering
The pass now uses the ring descriptors to figure these out.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
2025-12-22 15:17:59 +00:00
Samuel Pitoiset
044e7f6017 radv/nir: fix front_face opts for points/lines and unknown prim
Fixes new VKCTS coverage dEQP-VK.glsl.builtin_var.frontfacing.*.

Fixes: af375c6756 ("radv: Optimize fs builtins using static gfx state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39041>
2025-12-22 07:59:30 +00:00
Daniel Schürmann
1e8d367537 amd: add and use ac_cu_info::has_vtx_format_alpha_adjust_bug
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
2025-12-22 07:34:48 +00:00
Daniel Schürmann
f7c4aa48a0 ac/gpu_info: add some more flags to ac_cu_info
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
2025-12-22 07:34:46 +00:00
Mauro Rossi
e8134e6eaf radv/rt: Fix gnu-empty-initializer error
Some checks are pending
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Fixes the following building error happening with clang:

FAILED: src/amd/vulkan/libvulkan_radeon.so.p/nir_radv_nir_rt_traversal_shader.c.o
...
../src/amd/vulkan/nir/radv_nir_rt_traversal_shader.c:1159:49: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_nir_rt_traversal_params params = {};
                                                ^
1 error generated.

Fixes: f692ac76 ("radv/rt: Use traversal vars for object origin/direction in ahit/isec")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38954>
2025-12-15 22:27:29 +01:00
Georg Lehmann
fee87679bf radv/nir: fix front_face_fsign opt
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If front facing primitives are culled, there are only back facing fragments left.

Fixes: 0fe8250bf4 ("radv: optimize known front_face_fsign too")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38937>
2025-12-13 10:22:21 +01:00
Georg Lehmann
17e597093d radv: eliminate unused FS output channels
For formats that don't have all color channels, there is no reason to
output all of them.
Games often write to R only or RGB formats with non trivial remaining channels.

Foz-DB Navi21:
Totals from 10270 (10.55% of 97347) affected shaders:
MaxWaves: 249166 -> 250950 (+0.72%); split: +0.73%, -0.01%
Instrs: 8442016 -> 8354715 (-1.03%); split: -1.05%, +0.01%
CodeSize: 45939644 -> 45487156 (-0.98%); split: -1.01%, +0.02%
VGPRs: 472584 -> 463784 (-1.86%); split: -1.98%, +0.12%
SpillSGPRs: 1502 -> 1448 (-3.60%)
LDS: 6024192 -> 6011904 (-0.20%)
Inputs: 42463 -> 41773 (-1.62%)
Outputs: 24601 -> 23955 (-2.63%)
Latency: 78011745 -> 77653907 (-0.46%); split: -0.56%, +0.10%
InvThroughput: 19767826 -> 19274046 (-2.50%); split: -2.53%, +0.03%
VClause: 177891 -> 176681 (-0.68%); split: -0.80%, +0.12%
SClause: 236784 -> 235324 (-0.62%); split: -0.72%, +0.10%
Copies: 621048 -> 616096 (-0.80%); split: -1.03%, +0.23%
Branches: 202608 -> 201811 (-0.39%); split: -0.44%, +0.05%
PreSGPRs: 441032 -> 437698 (-0.76%); split: -0.77%, +0.01%
PreVGPRs: 378067 -> 369564 (-2.25%); split: -2.26%, +0.01%
VALU: 5906415 -> 5833179 (-1.24%); split: -1.25%, +0.01%
SALU: 973428 -> 968088 (-0.55%); split: -0.61%, +0.06%
VMEM: 298277 -> 296504 (-0.59%); split: -0.61%, +0.01%
SMEM: 402244 -> 399612 (-0.65%); split: -0.71%, +0.06%

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
a1fbf91ff2 radv/nir: fix radv_nir_remap_color_attachment progress
And switch to SPDX header.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
0fe8250bf4 radv: optimize known front_face_fsign too
Some checks are pending
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Foz-DB Navi21:
Totals from 1941 (1.99% of 97581) affected shaders:
MaxWaves: 44196 -> 44612 (+0.94%); split: +0.97%, -0.03%
Instrs: 1553182 -> 1548823 (-0.28%); split: -0.36%, +0.08%
CodeSize: 8261308 -> 8261496 (+0.00%); split: -0.17%, +0.18%
VGPRs: 98488 -> 97968 (-0.53%); split: -0.56%, +0.03%
SpillSGPRs: 1288 -> 1347 (+4.58%)
Latency: 19136399 -> 19094748 (-0.22%); split: -0.38%, +0.16%
InvThroughput: 5424693 -> 5409469 (-0.28%); split: -0.32%, +0.04%
VClause: 29941 -> 29943 (+0.01%); split: -0.26%, +0.27%
SClause: 39922 -> 39972 (+0.13%); split: -1.02%, +1.14%
Copies: 109736 -> 109684 (-0.05%); split: -1.45%, +1.40%
Branches: 24523 -> 24499 (-0.10%); split: -0.12%, +0.02%
PreSGPRs: 99206 -> 99191 (-0.02%); split: -0.02%, +0.00%
PreVGPRs: 79019 -> 78240 (-0.99%); split: -1.00%, +0.02%
VALU: 1145088 -> 1140731 (-0.38%); split: -0.44%, +0.06%
SALU: 164035 -> 164077 (+0.03%); split: -0.48%, +0.51%
SMEM: 80668 -> 80658 (-0.01%)

We used to call this pass before front_face_fsign is created
but that has changed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38906>
2025-12-12 08:24:38 +00:00
Konstantin Seurer
85e8f815e0 radv/nir: Use fmt_idx correctly
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38462>
2025-12-11 16:26:01 +00:00
Marek Olšák
308da55f1a radv,radeonsi: use FRAG_RESULT_DUAL_SRC_BLEND
this is slightly nicer

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604>
2025-12-10 19:16:46 +00:00
Natalie Vock
f692ac76ca radv/rt: Use traversal vars for object origin/direction in ahit/isec
Some checks are pending
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We already did the work of transforming the ray data, no need to do it
multiple times.

Should theoretically be a lot better. However, none of the fossils
appear to use object-space ray data in anyhit/intersection shaders. :(

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38809>
2025-12-08 18:29:49 +00:00
Natalie Vock
a488203e85 radv/rt: Refactor and split radv_nir_rt_shader.c
This splits up radv_nir_rt_shader.c into several parts.
The first part is all ray traversal lowering for RT pipelines, located
at radv_nir_rt_traversal_shader.c. It implements building the traversal
loop, including inlined any-hit/intersection shaders (optionally as a
completely separate shader).

The second part is lowering for individual RT stages (right now,
monolithic vs. CPS-style separate compilation). Each lowering technique
lives in its own file (radv_nir_rt_stage_{monolithic,cps}.c).

Code shared between RT lowering techniques (shader inlining helpers and
storage lowering passes) gets moved into radv_nir_rt_stage_common.c.

One header, radv_nir_rt_stage.h, is the public interface for RT pipeline
stage lowering. Functions exposed to users (really just
radv_pipeline_rt.c) go there. The header for internal shared helpers is
radv_nir_rt_stage_common.c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38809>
2025-12-08 18:29:49 +00:00
Marek Olšák
fa0bea5ff8 nir: remove nir_io_add_const_offset_to_base
Some checks are pending
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nir_opt_constant_folding does it now.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38277>
2025-11-29 00:16:38 +00:00
Dave Airlie
3eef0c0245 radv: add support for cooperative matrix per element operations.
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Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36992>
2025-11-22 13:16:20 +10:00
Anna Maniscalco
3e01031f10 radv: consistently use the value in bytes for esgs_itemsize
Some checks are pending
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Previosuly this value was in bytes for vs/tes and in dwords for gs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38514>
2025-11-20 16:45:37 +00:00
Marek Olšák
9e339f4b32 nir: rename nir_lower_indirect_derefs -> nir_lower_indirect_derefs_to_if_else_trees
This describes better what it does.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38471>
2025-11-20 05:42:11 +00:00
Dave Airlie
ad25196d35 radv: add support for cooperative matrix reductions.
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This add support to the lowering the reduction operations.

Thanks to Georg Lehmann for a lot of the ideas and optimising in
this.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38389>
2025-11-17 23:33:59 +00:00
Marek Olšák
e372365cf4 nir: rename nir_copy_prop -> nir_opt_copy_prop
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38411>
2025-11-15 02:16:38 +00:00
Konstantin Seurer
de32f9275f treewide: add & use parent instr helpers
We add a bunch of new helpers to avoid the need to touch >parent_instr,
including the full set of:

* nir_def_is_*
* nir_def_as_*_or_null
* nir_def_as_* [assumes the right instr type]
* nir_src_is_*
* nir_src_as_*
* nir_scalar_is_*
* nir_scalar_as_*

Plus nir_def_instr() where there's no more suitable helper.

Also an existing helper is renamed to unify all the names, while we're
churning the tree:

* nir_src_as_alu_instr -> nir_src_as_alu

..and then we port the tree to use the helpers as much as possible, using
nir_def_instr() where that does not work.

Acked-by: Marek Olšák <maraeo@gmail.com>

---

To eliminate nir_def::parent_instr we need to churn the tree anyway, so I'm
taking this opportunity to clean up a lot of NIR patterns.

Co-authored-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38313>
2025-11-12 21:22:13 +00:00
Samuel Pitoiset
0dba538643 radv/meta: fuse depth/stencil aspects copy with the GFX path
Depth/stencil copies on graphics are twice as fast now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:33 +00:00
Samuel Pitoiset
9d3dd174b8 radv/meta: rework radv_meta_nir_texel_fetch_build_func
This add a binding parameter that will be used for fused depth/stencil
copies.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:33 +00:00
Faith Ekstrand
35cdddf632 nir: Simplify assign_io_var_locations()
The size and stage parameters are left-overs from history.  Originally,
the function acted on a list and so it needed an explicit stage and size
output.  Now that it takes a NIR shader and a mode, we can just take the
stage from the shader and set num_(in|out)puts.

The one caller that actually used the explicit output parameter was
turnip.  However, given that the helper sorts and re-numbers all the I/O
variables, it's not like changing num_(in|out)puts instead of writing it
to some other location is that big of a deal.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38297>
2025-11-07 16:29:56 +00:00
Daniel Schürmann
e1bcbbf3dd radv/shader_info: rename gs_ring_info -> legacy_gs_info and use union with ngg_info
Reduces the size of radv_shader_info from 784 bytes to 760 bytes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37931>
2025-11-03 13:38:38 +01:00
Marek Olšák
9125e34372 amd: lower get_ssbo_size in ac_nir_lower_resinfo
The code for lowering get_ssbo_size will be different in future chips,
so do it in common code to reduce duplication in the future.

Lower get_ssbo_size to ssbo_descriptor_amd + nir_channel.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38097>
2025-11-02 01:42:07 +00:00
Daniel Schürmann
ef9ecc4058 nir: add nir_imul_nuw() and nir_imul_imm_nuw() helpers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37195>
2025-10-30 19:28:06 +00:00
Marek Olšák
966cb36722 amd: constify struct radeon_surf
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38093>
2025-10-29 12:50:44 +00:00
Rhys Perry
241bbb4977 radv: remove NIR_PASS in insert_rt_case
When NIR_DEBUG=serialize or NIR_DEBUG=clone is used, NIR_PASS recreates
nir_function_impl and nir_variable objects, causing use-after-free since
insert_rt_case() keeps pointers to those in local variables and var_remap.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37573>
2025-10-23 10:44:38 +00:00