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radv/nir: fix front_face opts for points/lines and unknown prim

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Fixes new VKCTS coverage dEQP-VK.glsl.builtin_var.frontfacing.*.

Fixes: af375c6756 ("radv: Optimize fs builtins using static gfx state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39041>
This commit is contained in:
Samuel Pitoiset 2025-12-19 18:17:26 +01:00 • committed by Marge Bot
parent 7b1f6fa6fc
commit 044e7f6017
3 changed files with 41 additions and 16 deletions
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3
src/amd/vulkan/nir/radv_nir.h
View file

@ -97,7 +97,8 @@ typedef struct radv_nir_opt_tid_function_options {
bool radv_nir_opt_tid_function(nir_shader *shader, const radv_nir_opt_tid_function_options *options);
bool radv_nir_opt_fs_builtins(nir_shader *shader, const struct radv_graphics_state_key *gfx_state);
bool radv_nir_opt_fs_builtins(nir_shader *shader, const struct radv_graphics_state_key *gfx_state,
unsigned vgt_outprim_type);
bool radv_nir_lower_immediate_samplers(nir_shader *shader, struct radv_device *device,
const struct radv_shader_stage *stage);

52
src/amd/vulkan/nir/radv_nir_opt_fs_builtins.c
View file

@ -9,28 +9,47 @@
#include "radv_nir.h"
#include "radv_pipeline_graphics.h"
typedef struct {
const struct radv_graphics_state_key *gfx;
unsigned vgt_outprim_type;
} opt_fs_builtins_state;
static bool
pass(nir_builder *b, nir_intrinsic_instr *intr, void *data)
{
const struct radv_graphics_state_key *gfx_state = data;
opt_fs_builtins_state *state = data;
b->cursor = nir_before_instr(&intr->instr);
nir_def *replacement = NULL;
if (intr->intrinsic == nir_intrinsic_load_front_face) {
if (gfx_state->rs.cull_mode == VK_CULL_MODE_FRONT_BIT) {
replacement = nir_imm_false(b);
} else if (gfx_state->rs.cull_mode == VK_CULL_MODE_BACK_BIT) {
replacement = nir_imm_true(b);
if (intr->intrinsic == nir_intrinsic_load_front_face || intr->intrinsic == nir_intrinsic_load_front_face_fsign) {
int force_front_face = 0;
switch (state->vgt_outprim_type) {
case V_028A6C_POINTLIST:
case V_028A6C_LINESTRIP:
force_front_face = 1;
break;
case V_028A6C_TRISTRIP:
if (state->gfx->rs.cull_mode == VK_CULL_MODE_FRONT_BIT) {
force_front_face = -1;
} else if (state->gfx->rs.cull_mode == VK_CULL_MODE_BACK_BIT) {
force_front_face = 1;
}
break;
default:
break;
}
} else if (intr->intrinsic == nir_intrinsic_load_front_face_fsign) {
if (gfx_state->rs.cull_mode == VK_CULL_MODE_FRONT_BIT) {
replacement = nir_imm_float(b, -1.0);
} else if (gfx_state->rs.cull_mode == VK_CULL_MODE_BACK_BIT) {
replacement = nir_imm_float(b, 1.0);
if (force_front_face) {
if (intr->intrinsic == nir_intrinsic_load_front_face) {
replacement = nir_imm_bool(b, force_front_face == 1);
} else {
replacement = nir_imm_float(b, force_front_face == 1 ? 1.0 : -1.0);
}
}
} else if (intr->intrinsic == nir_intrinsic_load_sample_id) {
if (!gfx_state->dynamic_rasterization_samples && gfx_state->ms.rasterization_samples == 0) {
if (!state->gfx->dynamic_rasterization_samples && state->gfx->ms.rasterization_samples == 0) {
replacement = nir_imm_intN_t(b, 0, intr->def.bit_size);
}
}
@ -43,7 +62,12 @@ pass(nir_builder *b, nir_intrinsic_instr *intr, void *data)
}
bool
radv_nir_opt_fs_builtins(nir_shader *shader, const struct radv_graphics_state_key *gfx_state)
radv_nir_opt_fs_builtins(nir_shader *shader, const struct radv_graphics_state_key *gfx_state, unsigned vgt_outprim_type)
{
return nir_shader_intrinsics_pass(shader, pass, nir_metadata_control_flow, (void *)gfx_state);
opt_fs_builtins_state state = {
.gfx = gfx_state,
.vgt_outprim_type = vgt_outprim_type,
};
return nir_shader_intrinsics_pass(shader, pass, nir_metadata_control_flow, &state);
}

2
src/amd/vulkan/radv_pipeline_graphics.c
View file

@ -2883,7 +2883,7 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac
!gfx_state->dynamic_rasterization_samples && gfx_state->ms.rasterization_samples == 0)
NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, nir_opt_fragdepth);
NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_opt_fs_builtins, gfx_state);
NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_opt_fs_builtins, gfx_state, vgt_outprim_type);
}
if (stages[MESA_SHADER_VERTEX].nir && !gfx_state->vs.has_prolog)