fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-03-17 08:10:33 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radv, radeonsi: Don't pass task ring info to mesh/task payload lowering

Browse source 
The pass now uses the ring descriptors to figure these out.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
This commit is contained in:
Timur Kristóf 2025-12-18 22:46:58 -06:00 • committed by Marge Bot
parent 4d381c9136
commit fc57fa4589
4 changed files with 6 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/amd/common/nir/ac_nir.h
View file

@ -238,14 +238,10 @@ ac_nir_lower_ngg_mesh(nir_shader *shader,
bool
ac_nir_lower_task_outputs_to_mem(nir_shader *shader,
unsigned task_payload_entry_bytes,
unsigned task_num_entries,
bool has_query);
bool
ac_nir_lower_mesh_inputs_to_mem(nir_shader *shader,
unsigned task_payload_entry_bytes,
unsigned task_num_entries);
ac_nir_lower_mesh_inputs_to_mem(nir_shader *shader);
bool
ac_nir_lower_global_access(nir_shader *shader);

9
src/amd/common/nir/ac_nir_lower_taskmesh_io_to_mem.c
View file

@ -305,11 +305,8 @@ lower_task_intrinsics(nir_builder *b,
bool
ac_nir_lower_task_outputs_to_mem(nir_shader *shader,
unsigned task_payload_entry_bytes,
unsigned task_num_entries,
bool has_query)
{
assert(util_is_power_of_two_nonzero(task_num_entries));
bool progress = false;
nir_lower_task_shader_options lower_ts_opt = {
@ -368,12 +365,8 @@ lower_mesh_intrinsics(nir_builder *b,
}
bool
ac_nir_lower_mesh_inputs_to_mem(nir_shader *shader,
unsigned task_payload_entry_bytes,
unsigned task_num_entries)
ac_nir_lower_mesh_inputs_to_mem(nir_shader *shader)
{
assert(util_is_power_of_two_nonzero(task_num_entries));
lower_tsms_io_state state = {
.draw_entry_bytes = 16,
};

5
src/amd/vulkan/nir/radv_nir_lower_io.c
View file

@ -262,11 +262,10 @@ radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *s
NIR_PASS(_, nir, ac_nir_lower_gs_inputs_to_mem, map_input, pdev->info.gfx_level, false);
return true;
} else if (nir->info.stage == MESA_SHADER_TASK) {
ac_nir_lower_task_outputs_to_mem(nir, pdev->task_info.payload_entry_size, pdev->task_info.num_entries,
info->cs.has_query);
ac_nir_lower_task_outputs_to_mem(nir, info->cs.has_query);
return true;
} else if (nir->info.stage == MESA_SHADER_MESH) {
ac_nir_lower_mesh_inputs_to_mem(nir, pdev->task_info.payload_entry_size, pdev->task_info.num_entries);
ac_nir_lower_mesh_inputs_to_mem(nir);
return true;
}

8
src/gallium/drivers/radeonsi/si_shader_nir.c
View file

@ -324,13 +324,9 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
NIR_PASS(_, nir, nir_lower_gs_intrinsics, flags);
} else if (nir->info.stage == MESA_SHADER_TASK) {
NIR_PASS(_, nir, ac_nir_lower_task_outputs_to_mem,
sscreen->task_info.payload_entry_size,
sscreen->task_info.num_entries, false);
NIR_PASS(_, nir, ac_nir_lower_task_outputs_to_mem, false);
} else if (nir->info.stage == MESA_SHADER_MESH) {
NIR_PASS(_, nir, ac_nir_lower_mesh_inputs_to_mem,
sscreen->task_info.payload_entry_size,
sscreen->task_info.num_entries);
NIR_PASS(_, nir, ac_nir_lower_mesh_inputs_to_mem);
}
if (mesa_shader_stage_is_compute(nir->info.stage)) {