Commit graph

167486 commits

Author SHA1 Message Date
Giancarlo Devich
623a01827c d3d12: Compare shader keys with union-encompassing fields all at once
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21610>
2023-03-01 19:40:06 +00:00
Giancarlo Devich
ebd925e79c d3d12: Compare shader keys with a switch, instead of cascading if's
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21610>
2023-03-01 19:40:06 +00:00
Iván Briano
4887b88d22 anv: use the parameter passed to the macro
The two points calling this macro pass dyn->rs.provoking_vertex to it,
which is why it works, but it's cleaner to use the parameter instead.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21613>
2023-03-01 19:07:41 +00:00
Dylan Baker
a8691f916b intel/mi: use 64bit constant for bitshift
Coverity complains that we could end up rolling over on a 32bit
platform, which isn't really true because of the assertion, but there's
also no harm in ensuring that we have exactly the same behavior for both
32 bit and 64 bit platforms.

CID: 1515989
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21572>
2023-03-01 18:42:25 +00:00
Yiwei Zhang
054a83492d venus: fix VK_EXT_image_view_min_lod feature query
Fixes: 8b81098519 ("venus: enable VK_EXT_image_view_min_lod")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21617>
2023-03-01 17:24:26 +00:00
Karmjit Mahil
1dfd535124 pvr: Setup SPM background object
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21575>
2023-03-01 17:10:53 +00:00
Timothy Arceri
d75a36a9ee glsl: remove do_copy_propagation_elements() optimisation pass
Since 13b859de do_copy_propagation_elements() has a flaw where
the time it takes to complete grows exponentially slowers as the number
of nested loops increases. It can also hurt rather than help verses
just letting NIR optimise the code. So if the NIR linker is enabled we
let it handle it instead.

shader-db results Iris (BDW):

total instructions in shared programs: 11177181 -> 11199739 (0.20%)
instructions in affected programs: 119424 -> 141982 (18.89%)
helped: 109
HURT: 65
total cycles in shared programs: 368946819 -> 372277173 (0.90%)
cycles in affected programs: 116539428 -> 119869782 (2.86%)

total spills in shared programs: 3983 -> 8785 (120.56%)
spills in affected programs: 2072 -> 6874 (231.76%)
helped: 0
HURT: 6

total fills in shared programs: 2016 -> 6068 (200.99%)
fills in affected programs: 230 -> 4282 (1761.74%)
helped: 0
HURT: 6

LOST:   85
GAINED: 77

freedreno results:

total instructions in shared programs: 11011122 -> 11011620 (<.01%)
instructions in affected programs: 939829 -> 940327 (0.05%)
total full in shared programs: 762725 -> 762674 (<.01%)
full in affected programs: 1096 -> 1045 (-4.65%)
total constlen in shared programs: 1772092 -> 1771596 (-0.03%)
constlen in affected programs: 2780 -> 2284 (-17.84%)
total stp in shared programs: 4040 -> 4058 (0.45%)
stp in affected programs: 3656 -> 3674 (0.49%)
total ldp in shared programs: 2160 -> 2178 (0.83%)
ldp in affected programs: 1748 -> 1766 (1.03%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/13.shader_test CL: 1231 -> 1234 (0.24%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/13.shader_test CL: 1231 -> 1234 (0.24%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/15.shader_test CL: 453 -> 456 (0.66%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/15.shader_test CL: 453 -> 456 (0.66%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/17.shader_test CL: 144 -> 147 (2.08%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/17.shader_test CL: 144 -> 147 (2.08%)

however, those stp counts are misleading -- gfxbench gl-5-normal actually
gets its scratch (ldp/stp) stored as 16 bits instead of 32 thanks to
better NIR copy prop, and the result is 2.64398% +/- 0.0991923% perf
improvement!

i915 results:

total instructions in shared programs: 510528 -> 510489 (<.01%)
instructions in affected programs: 3303 -> 3264 (-1.18%)
total tex_indirect in shared programs: 16708 -> 16717 (0.05%)
tex_indirect in affected programs: 134 -> 143 (6.72%)
total temps in shared programs: 30181 -> 30169 (-0.04%)
temps in affected programs: 1268 -> 1256 (-0.95%)
LOST:   0
GAINED: 1

i915 highlights:
instructions HURT:   shaders/closed/steam/legend-of-grimrock/47.shader_test FS: 141 -> 144 (2.13%)
instructions HURT:   shaders/closed/steam/steamworld-dig/22.shader_test FS: 84 -> 108 (28.57%)
temps HURT:   shaders/closed/steam/left-4-dead-2/medium/3682.shader_test FS: 7 -> 13 (85.71%)

r300 results:

total instructions in shared programs: 1340439 -> 1340845 (0.03%)
instructions in affected programs: 32354 -> 32760 (1.25%)
total temps in shared programs: 179394 -> 179329 (-0.04%)
temps in affected programs: 1505 -> 1440 (-4.32%)
total consts in shared programs: 1177742 -> 1177885 (0.01%)
consts in affected programs: 1107 -> 1250 (12.92%)
total lits in shared programs: 24992 -> 25019 (0.11%)
lits in affected programs: 138 -> 165 (19.57%)
instructions HURT:   shaders/closed/steam/legend-of-grimrock/26.shader_test FS: 47 -> 52 (10.64%)
instructions HURT:   shaders/closed/steam/sanctum-2/6072.shader_test FS: 43 -> 48 (11.63%)
instructions HURT:   shaders/closed/steam/champions-of-regnum/2378.shader_test VS: 35 -> 40 (14.29%)

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13288>
2023-03-01 16:09:25 +00:00
Emma Anholt
106019a5d8 nir/split_64bit_vec3_and_vec4: Handle 64-bit matrix types.
The offset handling should already work for flattening to our split vars,
just need to make sure we have enough (or any!) array elements.

Fixes: #7154
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13288>
2023-03-01 16:09:25 +00:00
Caio Oliveira
5f79e78911 spirv: Add skip_os_break_in_debug_build option to use in unit tests
When running in the CI environment, instead of crashing the test
binary, it is preferable to just fail gracefully (in this case return
a NULL shader) like is done in release mode, so other tests continue
to be executed.

For convenience add a variable break_on_failure to the test so the
breaking behavior can be re-enable in individual tests when debugging.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21512>
2023-03-01 13:47:57 +00:00
Caio Oliveira
8a91a33b7c spirv/tests: Add some basic control flow tests
The DISABLED test currently fails parsing.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21512>
2023-03-01 13:47:57 +00:00
Caio Oliveira
4e5b520286 spirv/tests: Parametrize stage in get_nir() helper
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21512>
2023-03-01 13:47:57 +00:00
Caio Oliveira
131f328a18 spirv/tests: Add script to generate C array from SPIR-V source
This is useful for generating the C code to embed the SPIR-V
when adding a new test.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21512>
2023-03-01 13:47:57 +00:00
Caio Oliveira
17e0c75441 spirv/tests: Subclass spirv_test helper to namespace the tests
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21512>
2023-03-01 13:47:57 +00:00
David Heidelberg
4cc0cec473 ci: implement unified sections
in after_script, variable $SCRIPTS_DIR is lost

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20272>
2023-03-01 12:02:24 +00:00
David Heidelberg
5bfc17b2da ci: alpine: install bash and coreutils for date -d
bash is needed for consistency.
coreutils is needed for `date -d`.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20272>
2023-03-01 12:02:24 +00:00
David Heidelberg
6f0fcb0a0c ci/alpine: keep the curl inside the image
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20272>
2023-03-01 12:02:24 +00:00
Georg Lehmann
aeb68c29b4 nir/opt_algebraic: add patterns for iand/ior of feq/fneu with 0
Foz-DB Navi21:
Totals from 1245 (0.92% of 134913) affected shaders:
VGPRs: 66232 -> 66248 (+0.02%); split: -0.01%, +0.04%
CodeSize: 5874976 -> 5868168 (-0.12%); split: -0.17%, +0.05%
MaxWaves: 25278 -> 25274 (-0.02%); split: +0.01%, -0.02%
Instrs: 1087502 -> 1085267 (-0.21%); split: -0.21%, +0.00%
Latency: 6531489 -> 6531672 (+0.00%); split: -0.04%, +0.05%
InvThroughput: 1531774 -> 1532327 (+0.04%); split: -0.02%, +0.05%
VClause: 22218 -> 22202 (-0.07%); split: -0.08%, +0.00%
SClause: 45906 -> 45873 (-0.07%); split: -0.08%, +0.01%
Copies: 64004 -> 64102 (+0.15%); split: -0.24%, +0.39%
Branches: 21529 -> 21534 (+0.02%); split: -0.00%, +0.03%
PreSGPRs: 51936 -> 51850 (-0.17%)
PreVGPRs: 55393 -> 55398 (+0.01%); split: -0.02%, +0.03%

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21576>
2023-03-01 11:24:43 +00:00
Samuel Pitoiset
3ced4ae816 radv: only expose EXT_pipeline_library_group_handles if RT is enabled
VK_EXT_pipeline_library_group_handles requires
VK_KHR_ray_tracing_pipeline to be enabled.

Fixes dEQP-VK.info.device_extensions.

Fixes: ed76833705 ("radv: Implement & expose VK_EXT_pipeline_library_group_handles.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21618>
2023-03-01 10:55:00 +00:00
Caio Oliveira
863cbb3e02 spirv: Don't specify nir_var_uniform or nir_var_mem_ubo in barriers
These are constant read-only data and don't need to be synchronized.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21517>
2023-03-01 09:53:29 +00:00
Sai Teja Pottumuttu
530ae32c5d iris: Fix to release BO immediately if not busy
Currently the iris driver is adding the buffer objects to zombie list
without checking if it is busy or not. It checks for it after 1 second
which adds delay to buffer release.

This fix checks if the bo is busy or not before adding it to zombie list.

Without this fix, the applications expecting immediate buffer release would
fail.

The fix is identified while debugging below android cts tests:
android.graphics.cts.BitmapTest#testDrawingHardwareBitmapNotLeaking
android.graphics.cts.BitmapTest#testHardwareBitmapNotLeaking

Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21460>
2023-03-01 09:17:48 +00:00
Lionel Landwerlin
42e8a2c1d6 genxml: fix border color offset field on Gfx12+
I wonder if the docs are correct for Gfx11 because this is the
generation that gave us the Bindless Sampler Heap of 4Gb. So it would
make sense that the border colors can also be placed anywhere in that
4Gb heap.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21600>
2023-03-01 08:45:11 +00:00
Lionel Landwerlin
58b687d77b genxml: Fix STATE_BASE_ADDRESS::BindlessSurfaceStateSize field size
BSpec 44507

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21600>
2023-03-01 08:45:11 +00:00
Dave Airlie
24c09d4b16 radv: add video format support to format probing.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21457>
2023-03-01 07:16:47 +00:00
Tatsuyuki Ishi
bab235106e radv: Replace radv_trap_handler_shader with radv_shader.
Now that the upload memory is tied to the shader itself, the trap handler
shader no longer needs an additional wrapper.

This is a cleanup to ease introduction of a new shader uploading code path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21541>
2023-03-01 05:12:10 +00:00
Dave Airlie
1f0fdcb619 anv: always pick graphics queue to execute prime blits on.
This will change when we get transfer queues but this should avoid
video queues being picked by accident.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21204>
2023-03-01 03:37:36 +00:00
Asahi Lina
494cb2e5ca asahi: Flush USC caches on the first draw
It seems that when batches are submitted back to back, the USC can
retain cache contents between them. This causes a problem when the CPU
updates a VBO between batches, since some of those updates might not be
visible to the USC.

Looks like the VDM barrier command with one magic bit set fixes this, so
let's try that.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21538>
2023-03-01 01:04:29 +00:00
Asahi Lina
70169c7488 asahi: Identify USC cache invalidate
Signed-off-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21538>
2023-03-01 01:04:29 +00:00
Asahi Lina
860ac5c149 asahi: Add readonly BO flag
Signed-off-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21538>
2023-03-01 01:04:29 +00:00
Asahi Lina
0498ad3e26 asahi: Add BO_SHAREABLE flag
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21538>
2023-03-01 01:04:29 +00:00
Lionel Landwerlin
672b2f9ad1 anv: remove more Gfx7 code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21599>
2023-02-28 23:49:27 +00:00
Lionel Landwerlin
fc7680b7df iris: fix Wa_16011107343 for Gfx12
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: df9f71d795 ("iris: emit 3DSTATE_HS for each primitive on gfx12")
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21605>
2023-02-28 23:03:21 +00:00
Lionel Landwerlin
3cd72a2840 anv: fixup Wa_16011107343 for Gfx12 only
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 75968398f3 ("anv: emit 3DSTATE_HS for each primitive on gfx12")
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21605>
2023-02-28 23:03:21 +00:00
Guilherme Gallo
6cb0c8b6d7 ci: Reuse MESA_CI_PERFORMANCE_ENABLED in performance-rules
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492>
2023-02-28 22:19:48 +00:00
Guilherme Gallo
5b9a610604 ci: Use workflow to make CI aware of performance jobs
With the workflow keyword, we can have more control over how pipelines
are created.

One of the features is to set a variable for the entire pipeline
depending on the rule. These variables would be available for all jobs
manifest and can be used inside job rules, for example.

We can use that to set a variable to enable performance jobs in the
pipeline, both at the YAML and script levels.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492>
2023-02-28 22:19:48 +00:00
Guilherme Gallo
c91f4b2efb ci: Use release builds in perf jobs
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492>
2023-02-28 22:19:48 +00:00
Guilherme Gallo
2fcd6df107 ci: Create debian-arm64-release job
To be able to upload the mesa's release build for arm64 to S3 and use it
in performance jobs.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492>
2023-02-28 22:19:48 +00:00
Guilherme Gallo
c65eb88f0b ci: Upload debian-release artifact to S3
This will enable performance jobs to use release versions for
performance tracking, since they download the artifacts from S3.

We were using debugoptimized versions, which are not the most performant
ones.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492>
2023-02-28 22:19:48 +00:00
Dave Airlie
53dda476a9 llvmpipe: fix compute address bits to return native pointer size.
On 32-bit systems llvm will only be dealing with 32-bit ptrs

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21601>
2023-02-28 21:55:09 +00:00
Jarred Davies
67904a36a6 pvr: Don't update fragment signal sync when fragment stage is disabled
Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21577>
2023-02-28 21:39:49 +00:00
Jarred Davies
4af1cf89ab pvr: Clear wait syncs after job submission
Avoids the fw having to process redundant waits.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21577>
2023-02-28 21:39:49 +00:00
Jarred Davies
18fb8d3b55 pvr: Enable threaded submit when supported
Adds a winsys feature flag to enable threaded submit.

Currently pvrsrvkm can't support threaded submit as pvrsrvkm syncs don't
support VK_SYNC_FEATURE_WAIT_PENDING.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21577>
2023-02-28 21:39:49 +00:00
Jarred Davies
5be2e44095 pvr: Add support for VK_KHR_timeline_semaphore
pvrsrvkm will run with VK_DEVICE_TIMELINE_MODE_EMULATED and
powervr will run with VK_DEVICE_TIMELINE_MODE_ASSISTED.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21577>
2023-02-28 21:39:49 +00:00
Jarred Davies
80f864cd23 pvr: Use common queue submit implementation
A simplification of the synchronization code is also undertaken as part
of this commit to account for the implicit guarantee the FW gives the driver
that jobs submitted to the same context will be run in submission order.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21577>
2023-02-28 21:39:49 +00:00
Konstantin Seurer
5ce99bc568 radv: Only init geometry infos if RRA is enabled
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21532>
2023-02-28 20:49:33 +00:00
Konstantin Seurer
7bd265bc86 radv: Move header and geometry info init into separate functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21532>
2023-02-28 20:49:33 +00:00
Marcin Ślusarz
e74a3284f5 anv: halve the push constants space in mesh pipelines
It's only used by fragment shaders, so halving it matches the size
used in the most optimal primitive pipeline (VS + FS).

This change frees some URB space for mesh and task shaders and as
a result improves vk_meshlet_cadscene performance by up to 2%,
depending on the model.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21559>
2023-02-28 20:18:01 +00:00
Dylan Baker
814eb9e2ce iris: consider bufmgr creation to have failed if duping of the fd fails
Coverity points out that we can pass a negative value to `close()`,
which results in an unchecked error. While this is technically true, it
really isn't a problem as `close()` is speced to return -1 in that case
(which we ignore). However, what is true is that if we fail to dup the
fd (the only case where we could end up with a negative value), then
we're in an unrecoverable error state anyway, and should go to the error
cleanup code.

CID: 1521539
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21568>
2023-02-28 19:58:58 +00:00
David Heidelberg
0912b14b3a ci/freedreno: add flaking KHR-GL45.buffer_storage.map_persistent_flush
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21598>
2023-02-28 17:28:06 +00:00
David Heidelberg
baea3b328b intel/vulkan: add missing dependency on generated headers
Adding correct dependencies prevents occasional build flakes with parallel builds.

```
FAILED: src/intel/vulkan/libanv_common.a.p/anv_generated_indirect_draws.c.o
ccache cc -Isrc/intel/vulkan/libanv_common.a.p -Isrc/intel/vulkan -I../src/intel/vulkan -Iinclude -I../include -Isrc -I../src -Isrc/mapi -I../src/mapi -Isrc/mesa -I../src/mesa -I../src/gallium/include -Isrc/intel -I../src/intel -Isrc/compiler -I../src/compiler -Isrc/compiler/nir -I../src/compiler/nir -Isrc/vulkan/util -I../src/vulkan/util -Isrc/vulkan/runtime -I../src/vulkan/runtime -Isrc/vulkan/wsi -I../src/vulkan/wsi -Isrc/intel/genxml -Isrc/intel/vulkan/shaders -Isrc/intel/ds -I/usr/local/include -I/usr/local/include/libdrm -fvisibility=hidden -fdiagnostics-color=always -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Werror -std=c11 -O2 -g -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS '-DPACKAGE_VERSION="23.1.0-devel"' '-DPACKAGE_BUGREPORT="https://gitlab.freedesktop.org/mesa/mesa/-/issues"' -DHAVE_OPENGL=1 -DHAVE_OPENGL_ES_1=1 -DHAVE_OPENGL_ES_2=1 -DHAVE_SWRAST -DHAVE_VIRGL -DHAVE_RADEONSI -DHAVE_ZINK -DHAVE_CROCUS -DHAVE_IRIS -DHAVE_I915 -DVIDEO_CODEC_VC1DEC=1 -DVIDEO_CODEC_H264DEC=1 -DVIDEO_CODEC_H264ENC=1 -DVIDEO_CODEC_H265DEC=1 -DVIDEO_CODEC_H265ENC=1 -DHAVE_X11_PLATFORM -DHAVE_SURFACELESS_PLATFORM -DHAVE_DRM_PLATFORM -DHAVE_XCB_PLATFORM -DHAVE_ST_VDPAU -DENABLE_ST_OMX_BELLAGIO=0 -DENABLE_ST_OMX_TIZONIA=0 -DGLX_INDIRECT_RENDERING -DGLX_DIRECT_RENDERING -DGLX_USE_DRM -DALLOW_KCMP -DENABLE_SHADER_CACHE -DHAVE___BUILTIN_BSWAP32 -DHAVE___BUILTIN_BSWAP64 -DHAVE___BUILTIN_CLZ -DHAVE___BUILTIN_CLZLL -DHAVE___BUILTIN_CTZ -DHAVE___BUILTIN_EXPECT -DHAVE___BUILTIN_FFS -DHAVE___BUILTIN_FFSLL -DHAVE___BUILTIN_POPCOUNT -DHAVE___BUILTIN_POPCOUNTLL -DHAVE___BUILTIN_UNREACHABLE -DHAVE___BUILTIN_TYPES_COMPATIBLE_P -DHAVE_FUNC_ATTRIBUTE_CONST -DHAVE_FUNC_ATTRIBUTE_FLATTEN -DHAVE_FUNC_ATTRIBUTE_MALLOC -DHAVE_FUNC_ATTRIBUTE_PURE -DHAVE_FUNC_ATTRIBUTE_UNUSED -DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT -DHAVE_FUNC_ATTRIBUTE_WEAK -DHAVE_FUNC_ATTRIBUTE_FORMAT -DHAVE_FUNC_ATTRIBUTE_PACKED -DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL -DHAVE_FUNC_ATTRIBUTE_ALIAS -DHAVE_FUNC_ATTRIBUTE_NORETURN -DHAVE_FUNC_ATTRIBUTE_VISIBILITY -DHAVE_UINT128 -DHAVE_REALLOCARRAY -D_GNU_SOURCE -DUSE_SSE41 -DUSE_GCC_ATOMIC_BUILTINS -DUSE_X86_64_ASM -DMAJOR_IN_SYSMACROS -DHAS_SCHED_H -DHAS_SCHED_GETAFFINITY -DHAVE_LINUX_FUTEX_H -DHAVE_ENDIAN_H -DHAVE_DLFCN_H -DHAVE_SYS_SHM_H -DHAVE_CET_H -DHAVE_SYS_INOTIFY_H -DHAVE_STRTOF -DHAVE_MKOSTEMP -DHAVE_TIMESPEC_GET -DHAVE_MEMFD_CREATE -DHAVE_RANDOM_R -DHAVE_FLOCK -DHAVE_STRTOK_R -DHAVE_GETRANDOM -DHAVE_GNU_QSORT_R -DHAVE_STRUCT_TIMESPEC -DHAVE_PROGRAM_INVOCATION_NAME -DHAVE_ISSIGNALING -DHAVE_POSIX_MEMALIGN -DHAVE_DIRENT_D_TYPE -DHAVE_STRTOD_L -DHAVE_DLADDR -DHAVE_DL_ITERATE_PHDR -DSUPPORT_INTEL_INTEGRATED_GPUS -DHAVE_ZLIB -DHAVE_COMPRESSION -DHAVE_PTHREAD -DHAVE_PTHREAD_SETAFFINITY -DHAVE_LIBDRM -DLLVM_AVAILABLE '-DMESA_LLVM_VERSION_STRING="13.0.1"' -DLLVM_IS_SHARED=1 -DDRAW_LLVM_AVAILABLE -DUSE_LIBELF -DMESA_EXECMEM -DHAVE_LIBUNWIND -DHAVE_OPENMP -DHAVE_DRI -DHAVE_DRI2 -DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS -DHAVE_DRISW_KMS -DHAVE_PERFETTO -mtls-dialect=gnu2 -Werror=implicit-function-declaration -Werror=missing-prototypes -Werror=return-type -Werror=empty-body -Werror=incompatible-pointer-types -Werror=int-conversion -Wimplicit-fallthrough -Wmisleading-indentation -Wno-missing-field-initializers -Wno-format-truncation -Wno-nonnull-compare -fno-math-errno -fno-trapping-math -fno-common -Wno-unused-function -Werror=format -Wformat-security -ffunction-sections -fdata-sections -fPIC -DVK_USE_PLATFORM_XCB_KHR -DVK_USE_PLATFORM_XLIB_KHR -DVK_USE_PLATFORM_DISPLAY_KHR -DVK_USE_PLATFORM_XLIB_XRANDR_EXT -Wno-override-init -DANV_SUPPORT_RT=0 -MD -MQ src/intel/vulkan/libanv_common.a.p/anv_generated_indirect_draws.c.o -MF src/intel/vulkan/libanv_common.a.p/anv_generated_indirect_draws.c.o.d -o src/intel/vulkan/libanv_common.a.p/anv_generated_indirect_draws.c.o -c ../src/intel/vulkan/anv_generated_indirect_draws.c
../src/intel/vulkan/anv_generated_indirect_draws.c:34:10: fatal error: shaders/generated_draws_spv.h: No such file or directory
   34 | #include "shaders/generated_draws_spv.h"
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
```

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21592>
2023-02-28 17:09:32 +01:00
Samuel Pitoiset
c356f1b4ed radv: fix draw calls with 0-sized index buffers and robustness on NAVI10
The correct workaround is to bind an internal index buffer to handle
robustness2 correctly.

Fixes dEQP-VK.robustness.index_access.* in CTS 1.3.5.0 on NAVI10.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21471>
2023-02-28 14:12:29 +00:00