Commit graph

220024 commits

Author SHA1 Message Date
Lars-Ivar Hesselberg Simonsen
614d07c986 pan/va: Generalize opcode/opcode2
Rather than opcode/opcode2 hardcoded, treat the opcode as a list of
one or more subcodes.

This implies modifying the disassembler to hold an arbitrary depth dict
of dicts and recursively build the switch statements used to look up
each level.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:13 +00:00
Lars-Ivar Hesselberg Simonsen
11f243205c pan/va/disasm: Move instr print to function
This splits the printing logic from the iteration logic, making it
easier to reason about either.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:12 +00:00
Lars-Ivar Hesselberg Simonsen
adffad6adb pan/va: XMLify opcode2
Opcode2 was a bit all over the place, so utilize the new opcode modifier
to gather opcode2 information in a single place.

This cleans up the implicit va_mods "left", "descriptor_type" and
"memory_width".

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:12 +00:00
Lars-Ivar Hesselberg Simonsen
5b24568c87 pan/va: Add opcode modifier to ISA.xml
Rather than having the opcode as an attribute and the offset/mask being
implicit, make all of this information explicit in the xml.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:12 +00:00
Lars-Ivar Hesselberg Simonsen
9bd4a40233 pan/va: Clean up unused/removed instructions
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:12 +00:00
Lars-Ivar Hesselberg Simonsen
1b1f4bd35e pan/va: Remove non-existent unused CLPERs
These instructions were not generated as they do not exist.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40199>
2026-03-19 15:11:12 +00:00
Eric Engestrom
384d128164 ci: fix scheduled pipelines
Some checks are pending
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Fixes: 32a818d11d ("ci: drop workaround for jobs not being created in fork pipelines")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40505>
2026-03-19 13:23:00 +00:00
Eric Engestrom
d38916d673 ci: fix rebase mistake
Fixes: 32a818d11d ("ci: drop workaround for jobs not being created in fork pipelines")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40505>
2026-03-19 13:23:00 +00:00
Erik Faye-Lund
982f567b19 pan/lib: drop redundant assign
Some checks are pending
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This is already the default value, so there's no point in overriding it
to itself.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40489>
2026-03-19 12:00:47 +00:00
Erik Faye-Lund
5280b80281 pan/lib: divide extent by tile-extend, not itself
Dividing this by itself is nonsensical, and just always gives us one.
That's obviously not what we want here.

But in this case we also know that the extent is divisible by the tile
extent, so there's no need for DIV_ROUND_UP, we can just divide.

Fixes: e6f8cab698 ("pan/layout: Split the logic per modifier")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40489>
2026-03-19 12:00:47 +00:00
Erik Faye-Lund
b0c32fcc66 pan/lib: set srgb-flag for afrc render-targets
Without this, sRGB rendering to AFRC is broken.

Fixes: 7a763bb0a3 ("pan/genxml: Rework the RT/ZS emission logic")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40489>
2026-03-19 12:00:47 +00:00
Erik Faye-Lund
322aaa88c6 pan/lib: do not try to use stencil-aspect of color attachment
We can't use the stencil-aspect of a color-attachment. That's going to
fail, so let's use the color-aspect instead. We already have it around
anyway.

Fixes: 7a763bb0a3 ("pan/genxml: Rework the RT/ZS emission logic")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40489>
2026-03-19 12:00:46 +00:00
Erik Faye-Lund
15e0ac0731 pan/genxml: remove non-existent YUV Enable for AFRC
This is controlled by the writeback-mode when using AFRC, not by an YUV
Enable field. This Filed doesn't exist in these, and should according to
the spec be zero.

Fixes: 7a763bb0a3 ("pan/genxml: Rework the RT/ZS emission logic")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40489>
2026-03-19 12:00:46 +00:00
Faith Ekstrand
3418525a82 pan/bi: Lower VS outputs in NIR
Co-authored-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:32 +00:00
Lorenzo Rossi
8127f5a88a pan/bi: Resize varyings IO early
In preparation for IO lowering in NIR. The varying size does not change
between variants and we'll need the real store width in NIR if we want
to lower it correctly.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:30 +00:00
Lorenzo Rossi
636aba5811 panfrost: Lower indirect derefs before lower_io
This will surely lose performance in some cases, this is a temporary fix
to align ourselves with how the Vulkan compiler works.  We might be able
to us indirect varyings directly in the future depending on how we
handle their memory layout.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:30 +00:00
Lorenzo Rossi
538c3ee6c7 Revert "pan/bi: Model pos/vary segments in STORE instructions"
This reverts commit 039bb4e68c.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:30 +00:00
Lorenzo Rossi
43ffcf06f4 pan/bi,nir: Divide memory_access from segments
Valhall removed Bifrost's memory segments and added in its place memory
access.  Those were bolted on reserved bits as "pseudo-segments" and the
emitter would catch these and emit the right memory access.  This commit
cleans it up a bit by making memory_access available directly and
exposing it to NIR (this will be useful later).

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:30 +00:00
Lorenzo Rossi
c730e41ed5 pan/bi: Add is_psiz_store flag in bi_instr
This removes the previous hack that searched the psiz write by looking
for 16-bit stores with the correct pseudo segment.  We also add a new
intrinsic that mimicks global stores but tags psiz writes, this will be
used later in the series.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:30 +00:00
Faith Ekstrand
de338dc908 pan,nir: Rework converted_mem_pan intrinsics
First, rename them to make them a bit more clear.  They act on global
memory so they should be _global and they map to ld/st_cvt so so _cvt is
nice and obvious.  Second, they don't need IO semantics as they're not
IO.  But they do need ACCESS so that we can better control things like
CAN_REORDER.  Third, add a src_type to store_global_cvt even though it
won't be used just yet because we'll want it for lowering VS stores.

Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:29 +00:00
Faith Ekstrand
8541dca8ed pan/bi: Lower FS input loads in NIR
Co-authored-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:28 +00:00
Faith Ekstrand
d2f430bea9 pan/bi: Add new FS input load intrinsics
Unlike load[_interpolated]_input, which has to deal with all sorts of
ABI nonsense between driver and compiler, these new intrinsics are
dumber than bricks.  They're literally just the HW ops as NIR
intrinsics.  These will allow us do the lowering in NIR and put the
driver in total control over what goes down what path.  Among other
things, a driver could choose to lower some things to ld_var and others
to ld_var_buf.

Co-authored-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40391>
2026-03-19 11:25:28 +00:00
Valentine Burley
00fe22aa6a ci: Capture weston logs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Save the weston logs in the artifacts, similar to Xorg.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34323>
2026-03-19 09:58:59 +01:00
Georg Lehmann
1e77a2218a radv/ci: update restricted trace checksum
Some checks are pending
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Annoying because these will never be caught in the MR that regresses them.

Looking at the diff, this is fallout from the clipping/guardband changes.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40499>
2026-03-19 07:41:30 +00:00
Georg Lehmann
57c05f72f9 nir/opt_large_constants: only use 16bit float alu when supported
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:18 +00:00
Georg Lehmann
5f37788ae9 nir/opt_large_constants: handle floating point power of two fractions
Foz-DB Navi48:
Totals from 365 (0.32% of 114655) affected shaders:
MaxWaves: 10020 -> 10016 (-0.04%)
Instrs: 486252 -> 486097 (-0.03%); split: -0.21%, +0.18%
CodeSize: 2629536 -> 2628452 (-0.04%); split: -0.19%, +0.14%
VGPRs: 19884 -> 19896 (+0.06%); split: -0.06%, +0.12%
SpillSGPRs: 210 -> 212 (+0.95%)
Latency: 3818610 -> 3765549 (-1.39%); split: -1.50%, +0.11%
InvThroughput: 598445 -> 596281 (-0.36%); split: -0.58%, +0.22%
VClause: 10053 -> 9698 (-3.53%); split: -3.54%, +0.01%
SClause: 17548 -> 17334 (-1.22%); split: -1.24%, +0.02%
Copies: 43196 -> 42249 (-2.19%); split: -2.34%, +0.14%
Branches: 16695 -> 16628 (-0.40%); split: -0.47%, +0.07%
PreSGPRs: 17988 -> 17971 (-0.09%)
PreVGPRs: 13552 -> 13520 (-0.24%)
VALU: 244842 -> 246611 (+0.72%); split: -0.02%, +0.74%
SALU: 79163 -> 77778 (-1.75%); split: -2.05%, +0.30%
VMEM: 13468 -> 13084 (-2.85%)
SMEM: 23571 -> 23393 (-0.76%)
VOPD: 8384 -> 8372 (-0.14%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:18 +00:00
Georg Lehmann
372c1a23dc nir/opt_large_constants: support negative small constants
Foz-DB Navi48:
Totals from 511 (0.45% of 114655) affected shaders:
MaxWaves: 14554 -> 14552 (-0.01%)
Instrs: 767577 -> 768334 (+0.10%); split: -0.17%, +0.27%
CodeSize: 4171036 -> 4181400 (+0.25%); split: -0.10%, +0.35%
VGPRs: 27676 -> 27724 (+0.17%)
SpillSGPRs: 144 -> 183 (+27.08%)
Latency: 4053919 -> 4027092 (-0.66%); split: -0.88%, +0.22%
InvThroughput: 817990 -> 819490 (+0.18%); split: -0.21%, +0.39%
VClause: 11573 -> 11172 (-3.46%); split: -3.47%, +0.01%
SClause: 14418 -> 14579 (+1.12%); split: -0.46%, +1.57%
Copies: 71638 -> 71365 (-0.38%); split: -1.54%, +1.16%
Branches: 20212 -> 20425 (+1.05%); split: -0.39%, +1.44%
PreSGPRs: 21765 -> 21743 (-0.10%); split: -0.23%, +0.12%
PreVGPRs: 19475 -> 19307 (-0.86%); split: -0.91%, +0.05%
VALU: 411365 -> 413642 (+0.55%); split: -0.02%, +0.57%
SALU: 126940 -> 125411 (-1.20%); split: -1.53%, +0.32%
VMEM: 20574 -> 20062 (-2.49%)
SMEM: 23724 -> 23677 (-0.20%); split: -0.25%, +0.05%
VOPD: 19838 -> 19847 (+0.05%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:18 +00:00
Georg Lehmann
a9f3efcae0 nir/opt_large_constants: optimize small vector constant arrays
Foz-DB Navi48:
Totals from 2956 (2.58% of 114655) affected shaders:
MaxWaves: 85080 -> 85110 (+0.04%)
Instrs: 5167735 -> 5170572 (+0.05%); split: -0.12%, +0.17%
CodeSize: 28882716 -> 28867340 (-0.05%); split: -0.14%, +0.08%
VGPRs: 164484 -> 164616 (+0.08%); split: -0.09%, +0.18%
SpillSGPRs: 612 -> 611 (-0.16%)
Latency: 35017837 -> 34391146 (-1.79%); split: -1.80%, +0.01%
InvThroughput: 6336245 -> 6323807 (-0.20%); split: -0.49%, +0.29%
VClause: 112504 -> 111117 (-1.23%); split: -1.32%, +0.09%
SClause: 121125 -> 117618 (-2.90%); split: -3.04%, +0.15%
Copies: 392203 -> 384977 (-1.84%); split: -1.88%, +0.04%
Branches: 155578 -> 155376 (-0.13%); split: -0.13%, +0.01%
PreSGPRs: 127654 -> 127205 (-0.35%); split: -0.39%, +0.04%
PreVGPRs: 112486 -> 112449 (-0.03%); split: -0.04%, +0.00%
VALU: 2577362 -> 2586379 (+0.35%); split: -0.00%, +0.35%
SALU: 889569 -> 888472 (-0.12%); split: -1.01%, +0.89%
VMEM: 167203 -> 165750 (-0.87%)
SMEM: 190438 -> 187313 (-1.64%)
VOPD: 194411 -> 194344 (-0.03%); split: +0.01%, -0.04%

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:18 +00:00
Georg Lehmann
f782524c36 nir/opt_large_constants: enable small constant optimization for non trivial strides
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:17 +00:00
Georg Lehmann
568b96f8b2 nir/opt_large_constants: set fp_math_ctrl for bit exact results
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:17 +00:00
Georg Lehmann
e810382a1e nir/opt_large_constants: don't add constants implemented with ALU to the constant data
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:16 +00:00
Konstantin Seurer
581df90a89 nir/tests: Test nir_opt_large_constants
Tests a whole bunch of cases that can be turned into literals.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:16 +00:00
Georg Lehmann
023e3554e9 ir3: set progress for nir_opt_large_constants
I guess the original intention was that ir3_nir_lower_load_constant will
always make progress if nir_opt_large_constants made progress,
but this is not the case with the small constant arrays optimizations.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33002>
2026-03-19 06:59:16 +00:00
Eric Engestrom
402bd37f9d docs: add sha sum for 26.0.3
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40494>
2026-03-18 17:01:37 +00:00
Eric Engestrom
d2e3b4b4fb docs: add release notes for 26.0.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40494>
2026-03-18 17:01:37 +00:00
Eric Engestrom
da214b0fce docs: update calendar for 26.0.3
Includes an additional 26.0.x release to make sure we still have the
expected overlap with 26.1.1.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40494>
2026-03-18 17:01:36 +00:00
Icenowy Zheng
af8923bb01 zink: skip all post-process when importing and resource_create fails
When the pipe_resource pointer returned by resource_create is NULL, the
process importing the handle into the underlying Vulkan driver is known
to have failed, and the handle importing process shouldn't continue.

Just return NULL in this case to prevent further check of pres being
non-NULL.

This also fixes the issue that renderonly code lacks check for non-NULL
pres, and the conversion of pipe_resource to zink_resource in renderonly
codepath is now gone because of a converted zink_resource is available
above.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40490>
2026-03-18 16:34:10 +00:00
Samuel Pitoiset
79ac5fd4c2 radv/amdgpu: remove dead code in radv_amdgpu_winsys_bo_create()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40461>
2026-03-18 16:03:39 +00:00
Samuel Pitoiset
02628a5eb7 radv/amdgpu: free the VA range in case the BO allocation failed
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40461>
2026-03-18 16:03:39 +00:00
Robert Mader
0bbc26d2c4 llvmpipe: Stop aligning height to raster block size for unbacked handles
This code path is usually used by lavapipe when importing dmabufs, not
for output.
The resulting size_required is then used to calculate the size
requirements for VkMemoryRequirements2 etc. Requiring a multiple of
LP_RASTER_BLOCK_SIZE - 4 - can eventually result in lavapipe rejecting
dmabuf imports.

An example is YUV420 at a resolution of 1680x1050 produced by Gstreamer
1.28 - e.g. from a screencasts. In this case we currently compute a size
of 3235840, while other drivers like radv compute 3225600. The actual
size is 3227648, fitting into the later but not the former.

Removing the alignment brings lavapipe in line with other drivers.

Cc: mesa-stable
Signed-off-by: Robert Mader <robert.mader@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40424>
2026-03-18 16:20:16 +01:00
Eric Engestrom
4466914680 ci: changing .gitlab-ci.yml itself also means the container jobs must exist
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes: 4b2a4dce78 ("ci: Skip check-only container jobs for pre-merge")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40467>
2026-03-18 14:19:02 +00:00
Juan A. Suarez Romero
04d51872dc broadcom/ci: update expected results
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40484>
2026-03-18 13:18:39 +00:00
Eric R. Smith
3945421c17 panfrost: fix typos in architecture detection
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The preprocessor symbol we want is `PAN_ARCH`, not `MALI_ARCH`.

Fixes: a21ee564e2 ("pan/bi: Make texel buffers use Attribute Buffers")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40459>
2026-03-18 12:53:37 +00:00
Eric R. Smith
0142e2e5e3 panfrost: fix texel buffer calculations
We were computing some positions using `void*` rather than pointers to
the appropriate structures. This caused bad pointers, the effect of
which depended on the current memory environment -- tests related to
texel buffers could pass or not depending on what other tests had run
previously.

Fixes: a21ee564e2 ("pan/bi: Make texel buffers use Attribute Buffers")
Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40459>
2026-03-18 12:53:36 +00:00
Erico Nunes
d18db3e33d lima: add support for srgb textures
Add lowering pass to convert textures from srgb when using srgb formats.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39320>
2026-03-18 12:31:45 +00:00
Erico Nunes
bcab449924 lima: add support for srgb framebuffers
Add lowering pass to convert output to srgb when using srgb formats.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39320>
2026-03-18 12:31:45 +00:00
Karol Herbst
f3d091439a nak: make nak_mem_vectorize_cb create only aligned and supported vectors
While the idea of being aggressive sounds like a good one, in practise it
creates vectorized load/stores that are not optimal.

This makes it so that we only ever create aligned and supported vector
sizes that prevents those issues.

Totals:
CodeSize: 8662362848 -> 8662362240 (-0.00%); split: -0.00%, +0.00%
Number of GPRs: 47508046 -> 47508014 (-0.00%)
Static cycle count: 4713321839 -> 4713285952 (-0.00%); split: -0.00%, +0.00%
Spills to memory: 45073 -> 45061 (-0.03%)
Fills from memory: 45073 -> 45061 (-0.03%)
Max warps/SM: 50564816 -> 50564832 (+0.00%)

Totals from 689 (0.06% of 1163204) affected shaders:
CodeSize: 26314320 -> 26313712 (-0.00%); split: -0.02%, +0.02%
Number of GPRs: 60914 -> 60882 (-0.05%)
Static cycle count: 156504342 -> 156468455 (-0.02%); split: -0.05%, +0.02%
Spills to memory: 15453 -> 15441 (-0.08%)
Fills from memory: 15453 -> 15441 (-0.08%)
Max warps/SM: 18640 -> 18656 (+0.09%)

Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40293>
2026-03-18 12:13:03 +00:00
Eric Engestrom
32a818d11d ci: drop workaround for jobs not being created in fork pipelines
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The problem this was working around was solved by
07202111a6 ("ci/rules: make every job exist as manual in fork
pipelines"), and it prevents properly disabling jobs in other pipelines
like forks, leading to user confusion because jobs exists but can't run.

Fixes: 07202111a6 ("ci/rules: make every job exist as manual in fork pipelines")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31763>
2026-03-18 09:25:05 +00:00
Eric Engestrom
26b19e355f ci: yaml-toml-shell-test runs on generic runners, not hw farm runners
Fixes: 1ba84bc5ca ("ci: add check for misleading indentation in ci toml files")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31763>
2026-03-18 09:25:05 +00:00
Mary Guillemard
d00965651a nvk: Broacast viewport0 and scissor0 in case of FSR on Turing
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On Turing, the hardware rely on the viewport index for FSR.
If not all viewports are defined, we will end up not rendering
anything when selecting the primitive shading rate.

This patch makes it that we now broadcast the viewport and scissor 0
likes the proprietary driver.

This fixes "dEQP-VK.mesh_shader.ext.builtin.primitive_shading_rate_*" on
Turing.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: 2fb4aed9 ("nvk: Advertise VK_KHR_fragment_shading_rate")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40314>
2026-03-18 08:14:17 +00:00