Commit graph

1439 commits

Author SHA1 Message Date
Samuel Pitoiset
51eb072eb6 radv: skip DGC calls when the indirect sequence count is zero with a predicate
Starfield has a lot of empty ExecuteIndirect() calls. This optimizes
them by using the indirect sequence count as predicate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Samuel Pitoiset
63e0fcfb13 radv: avoid emitting SQTT markers for DGC calls
This confuses RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25035>
2023-09-06 07:52:50 +00:00
Samuel Pitoiset
083e7d3a92 radv: fix capturing indirect dispatches with SQTT
Looks like indirect dispatches require an event marker instead of an
event marker with dims. That makes sense somehow given the blocks size
is not known at record time with indirect dispatches.

This allows RGP to report correct block sizes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24994>
2023-09-04 06:31:40 +00:00
Samuel Pitoiset
3f517ff947 radv: fix emitting TCS epilogs if TES and GS are linked on GFX9+
TES would be NULL because everything is merged to GS.
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
01ecaca188 radv: small cleanups in radv_emit_patch_control_points()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
9314d5c6df radv: rename tcs_shader to tcs in radv_emit_tcs_epilog_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
0004d903d4 radv: fix the per-patch data offset when TES isn't linked with TCS
When TCS and TES aren't linked together and TCS exports unused outputs,
the per-patch data offset needs to be adjusted. This is similar to the
LS-HS vertex stride when VS and TCS aren't linked together.

This fixes a bunch of failures by forcing the driver to use TCS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24776>
2023-08-24 06:03:12 +00:00
Samuel Pitoiset
1a90b7a5da radv: allow DGC on the compute queue
DGC cmdbuf on ACE are executed as IB1 without chaining because IB2
isn't supported on ACE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
2023-08-23 06:05:39 +00:00
Samuel Pitoiset
559da06755 radv: implement NV_device_generated_commands_compute
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
2023-08-23 06:05:39 +00:00
Samuel Pitoiset
131c3aa3dc radv: add tcs_out_patch_fits_subgroup to radv_tcs_epilog_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset
c136169062 radv: fix emitting TCS epilogs for GFX6-9
The number of SGPRs need to be adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24747>
2023-08-18 07:52:22 +00:00
Samuel Pitoiset
b34c027cb0 radv: use the number of VS outputs for computing the tessellation info
When TCS isn't linked with VS, the vertex stride should be computed
from vertex outputs. This is only for shader object and shouldn't
change anything right now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>
2023-08-11 07:43:58 +00:00
Samuel Pitoiset
8a97302f57 radv: add support for loading the LSHS vertex stride from a SGPR
With shader object, if VS and TCS aren't linked together, the LSHS
vertex stride should be computed from the vertex outputs. Otherwise,
if an output is unused, the stride is wrong in TCS.

This is currently for GFX8 only because for merged shaders this won't
be needed but shader object on GFX9+ isn't yet a thing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>
2023-08-11 07:43:58 +00:00
Samuel Pitoiset
3f617b8e4a radv: allow VK_WHOLE_SIZE for pSizes in vkCmdBindVertexBuffers2()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
2023-08-10 03:05:02 +00:00
Samuel Pitoiset
cbfd2931bb radv: implement vkCmdBindIndexBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
2023-08-10 03:05:02 +00:00
Samuel Pitoiset
b135149986 radv: update cmdbuf scratch size info when shaders are bound
This will automatically update the scratch size info for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
ea31193532 radv: update the number of scratch waves for RT prolog at bind time
The compute scratch size is computed later because the RT stack size
can be dynamic, but the number of waves shouldn't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
9880224490 radv: use the RT prolog scratch size directly for tracing rays
It should be the same as the pipeline scratch size value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
c327ab9e33 radv: track if vertex binding stride is dynamic from the cmdbuf state
This allows us to remove one more pipeline occurence during cmdbuf
recording. Note that shader object always uses dynamic vertex input.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
976297b73a radv: re-emit binning state if the framebuffer is dirty
This used to depend on the graphics pipeline, but now that everything
is dynamic it should be fine to trigger it on fb changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
0a102d3fd6 radv: track if patch control points is dynamic from the cmdbuf state
This allows us to remove one more pipeline occurence during cmdbuf
recording. Note that patch control points is always dynamic with
shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
b56c288589 radv: remove redundant check in radv_cmd_buffer_after_draw()
RADV_CMD_FLAG_PS_PARTIAL_FLUSH is only used for draws with
RADV_DEBUG=syncshaders, which implies a valid graphics pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
e7cf235422 radv: add support for emitting TCS epilogs in cmdbuf
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:19 +00:00
Samuel Pitoiset
ce05412417 radv: add support for a TCS epilogs cache in the device
Similar to VS prologs and PS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:19 +00:00
Samuel Pitoiset
f4ec2e7bb3 radv,aco: move has_epilog to radv_shader_info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:18 +00:00
Samuel Pitoiset
f04577b789 radv: add support for dynamic TCS vertices out for TES
With shader object, if TES is compiled without a TCS, the number of
TCS vertices out might not be known at compile time and it needs to be
loaded from a user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
a50cec9e18 radv: use a packed user SGPR for the TES state
It only contains the number of tessellation patches for now, but it
will be used to pass the number of TCS vertices out for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
670bd70fa6 radv: emulate GEOMETRY_SHADER_INVOCATIONS query on RDNA1-2
The number of geometry shader invocations is correctly counted by the
hardware for both NGG and the legacy GS path but it increments for
NGG VS/TES because they are merged with GS, but it shouldn't. Fix this
by emulating the number of geometry shader invocations.

This fixes piglit/bin/arb_query_buffer_object-qbo and recent
dEQP-VK.query_pool.statistics_query.gs_invocations_no_gs.* failures
with NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:15:22 +02:00
Samuel Pitoiset
96b97ed527 radv: declare the shader query user SGPR for emulating GS counters
This user SGPR is only declared on chips that support NGG but might
fallback to legacy GS for some reasons, like XFB. It will be used to
emulate GS counters from shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:13:11 +02:00
Samuel Pitoiset
e1f8cfc2b2 radv: rename NGG query state to be more generic
To use emulated GS counters for legacy GS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:13:11 +02:00
Samuel Pitoiset
090d88247d radv: cleanup pipeline compute emit helpers
Merge both functions together and rename the function.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
2023-07-26 07:44:49 +00:00
Samuel Pitoiset
340f74e468 radv: simplify getting next VS stage for VS prologs
It's the VS shader info stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24273>
2023-07-25 06:31:08 +00:00
Samuel Pitoiset
53d35c641d radv: bind the pre-compiled PS epilog to the cmdbuf state
For PS epilogs we have two paths, the first one is to pre-compile PS
epilogs at pipeline creation time, while the second one is to compile
PS epilogs on-demand when some dynamic states are used.

Binding the pre-compiled PS epilog to the cmdbuf state allows us to
remove one more pipeline dependency when recording cmdbufs (for shader
objects).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24254>
2023-07-21 12:55:30 +00:00
Konstantin Seurer
839d6f9fa2 radv: Stop using the misleading round_up_u* functions
The functions had the same behavior as DIV_ROUND_UP but their names do
not mention a division.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24210>
2023-07-20 06:51:30 +00:00
Chia-I Wu
673d416e22 radv: fix separate depth/stencil layouts in fb state
Set S_028000_DEPTH_COMPRESS_DISABLE/S_028000_STENCIL_COMPRESS_DISABLE
depending on the depth/stencil layouts respectively.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
2023-07-19 23:46:02 +00:00
Samuel Pitoiset
f334d00a8a radv: make radv_get_pa_su_sc_mode_cntl() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24192>
2023-07-18 17:07:19 +00:00
Samuel Pitoiset
b544a6d6c3 radv: emit PA_SC_SCREEN_SCISSOR_BR with the actual fb extent
For some reasons, this register is needed for RGP to report actual
render/depth targets size instead of 0 for both width/height. It
doesn't seem to have any other effects.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9169
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23921>
2023-06-30 06:38:53 +00:00
Samuel Pitoiset
3f7ea95bc9 radv: inline more values in radv_emit_fb_ds_state()
These are no longer adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
2023-06-28 13:21:44 +00:00
Samuel Pitoiset
5010ab8fff radv: stop emitting TILE_SURFACE_ENABLE for the ZRANGE_PRECISION workaround
The only case that matters is when the fb is emitted, but HTILE is
already disabled there using DB_RENDER_CONTROL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
2023-06-28 13:21:44 +00:00
Vitaliy Triang3l Kuzmin
787a553262 radv: Apply the POPS missed overlap hardware bug workaround
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
3831860b20 radv: Handle Primitive Ordered Pixel Shading in DB_SHADER_CONTROL
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
1812819e66 radv: Ensure 1x1 shading rate on GFX10.3 with interlock execution mode
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Samuel Pitoiset
06cdf222a6 radv: only dirty the active push constant stages with DGC
It's unnecessary to dirty all stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Samuel Pitoiset
3b329e195e radv: only dirty the index type when necessary with DGC
This should only be needed for non-indexed draws and it's already
dirty if the DGC binds an index buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Mike Blumenkrantz
e15a4e6e1a radv: pre-init surface info
this is costly to do at render time, so avoid it when possible

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23770>
2023-06-22 13:36:13 +00:00
Mike Blumenkrantz
8b73109a93 radv: remove redundant intermediate variable in radv_is_mrt0_dual_src()
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23601>
2023-06-21 18:59:07 +00:00
Vitaliy Triang3l Kuzmin
9d75795087 radv: Move most of DB_SHADER_CONTROL to PS, more precise GFX11 blend WA
Move most of the DB_SHADER_CONTROL fields from the pipeline to the pixel
shader for preparation for shader objects.

Also, the GFX11 export conflict bug workaround doesn't need to be enabled
for non-1x sample counts or if blending is not enabled, so make the
application of DB_SHADER_CONTROL consider the current sample count and
blending state even if they're dynamic.

Having access to the exact sample count in DB_SHADER_CONTROL setup is also
necessary for good performance in SampleInterlock execution modes of
fragment shader interlock, for configuration of POPS_OVERLAP_NUM_SAMPLES
(GFX9-10.3) or OVERRIDE_INTRINSIC_RATE (GFX11), as PixelInterlock is
massively slower with multisampling due to overlap between adjacent
polygons sharing covered pixels among the common edge.

The name of the dynamic state controlling DB_SHADER_CONTROL is now
unambiguous - previously line rasterization mode had effect on attachment
feedback loop state emission.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23474>
2023-06-21 14:16:24 +00:00
Konstantin Seurer
48b32124c6 radv/rt: Store the prolog outside the shaders array
Avoids including it in executable statistics queries.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Samuel Pitoiset
266b2cfe5b radv: implement VK_EXT_depth_bias_control
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Samuel Pitoiset
3208844539 radv: use cs_execute_ib() for GFX, MBCP and DGC IBs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00